static void __init sp804_of_init(struct device_node *np) { static bool initialized = false; void __iomem *base; int irq; u32 irq_num = 0; struct clk *clk1, *clk2; const char *name = of_get_property(np, "compatible", NULL); base = of_iomap(np, 0); if (WARN_ON(!base)) return; /* Ensure timers are disabled */ writel(0, base + TIMER_CTRL); writel(0, base + TIMER_2_BASE + TIMER_CTRL); if (initialized || !of_device_is_available(np)) goto err; clk1 = of_clk_get(np, 0); if (IS_ERR(clk1)) clk1 = NULL; /* Get the 2nd clock if the timer has 3 timer clocks */ if (of_count_phandle_with_args(np, "clocks", "#clock-cells") == 3) { clk2 = of_clk_get(np, 1); if (IS_ERR(clk2)) { pr_err("sp804: %s clock not found: %d\n", np->name, (int)PTR_ERR(clk2)); clk2 = NULL; } } else clk2 = clk1; irq = irq_of_parse_and_map(np, 0); if (irq <= 0) goto err; of_property_read_u32(np, "arm,sp804-has-irq", &irq_num); if (irq_num == 2) { __sp804_clockevents_init(base + TIMER_2_BASE, irq, clk2, name); __sp804_clocksource_and_sched_clock_init(base, name, clk1, 1); } else { __sp804_clockevents_init(base, irq, clk1 , name); __sp804_clocksource_and_sched_clock_init(base + TIMER_2_BASE, name, clk2, 1); } initialized = true; return; err: iounmap(base); }
static int __init integrator_cp_of_init(struct device_node *np) { static int init_count = 0; void __iomem *base; int irq, ret = -EINVAL; const char *name = of_get_property(np, "compatible", NULL); struct clk *clk; base = of_iomap(np, 0); if (!base) { pr_err("Failed to iomap\n"); return -ENXIO; } clk = of_clk_get(np, 0); if (IS_ERR(clk)) { pr_err("Failed to get clock\n"); return PTR_ERR(clk); } /* Ensure timer is disabled */ writel(0, base + TIMER_CTRL); if (init_count == 2 || !of_device_is_available(np)) goto err; if (!init_count) { ret = __sp804_clocksource_and_sched_clock_init(base, name, clk, 0); if (ret) goto err; } else { irq = irq_of_parse_and_map(np, 0); if (irq <= 0) goto err; ret = __sp804_clockevents_init(base, irq, clk, name); if (ret) goto err; } init_count++; return 0; err: iounmap(base); return ret; }
static void __init sp804_of_init(struct device_node *np) { static bool initialized = false; void __iomem *base; int irq; struct clk *clk1; const char *name = of_get_property(np, "compatible", NULL); base = of_iomap(np, 0); if (WARN_ON(!base)) return; /* Ensure timers are disabled */ writel(0, base + TIMER_CTRL); if (initialized || !of_device_is_available(np)) goto err; clk1 = of_clk_get(np, 0); if (IS_ERR(clk1)) { clk1 = NULL; pr_err("ERROR clk1 is NULL!\n"); } irq = irq_of_parse_and_map(np, 0); if (irq <= 0) goto err; __sp804_clockevents_init(base, irq, clk1 , name); initialized = true; return; err: iounmap(base); }
static void __init integrator_cp_of_init(struct device_node *np) { static int init_count = 0; void __iomem *base; int irq; const char *name = of_get_property(np, "compatible", NULL); struct clk *clk; base = of_iomap(np, 0); if (WARN_ON(!base)) return; clk = of_clk_get(np, 0); if (WARN_ON(IS_ERR(clk))) return; /* Ensure timer is disabled */ writel(0, base + TIMER_CTRL); if (init_count == 2 || !of_device_is_available(np)) goto err; if (!init_count) __sp804_clocksource_and_sched_clock_init(base, name, clk, 0); else { irq = irq_of_parse_and_map(np, 0); if (irq <= 0) goto err; __sp804_clockevents_init(base, irq, clk, name); } init_count++; return; err: iounmap(base); }