int _allocCheckGPRtoX86(EEINST* pinst, int gprreg, int mode) { if( pinst->regs[gprreg] & EEINST_USED ) return _allocX86reg(-1, X86TYPE_GPR, gprreg, mode); return _checkX86reg(X86TYPE_GPR, gprreg, mode); }
void recJALR() { int newpc = pc + 4; _allocX86reg(esi, X86TYPE_PCWRITEBACK, 0, MODE_WRITE); _eeMoveGPRtoR(esi, _Rs_); if (EmuConfig.Gamefixes.GoemonTlbHack) { xMOV(ecx, esi); vtlb_DynV2P(); xMOV(esi, eax); } // uncomment when there are NO instructions that need to call interpreter // int mmreg; // if( GPR_IS_CONST1(_Rs_) ) // xMOV(ptr32[&cpuRegs.pc], g_cpuConstRegs[_Rs_].UL[0] ); // else { // int mmreg; // // if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, _Rs_, MODE_READ)) >= 0 ) { // xMOVSS(ptr[&cpuRegs.pc], xRegisterSSE(mmreg)); // } // else if( (mmreg = _checkMMXreg(MMX_GPR+_Rs_, MODE_READ)) >= 0 ) { // xMOVD(ptr[&cpuRegs.pc], xRegisterMMX(mmreg)); // SetMMXstate(); // } // else { // xMOV(eax, ptr[(void*)((int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] )]); // xMOV(ptr[&cpuRegs.pc], eax); // } // } if ( _Rd_ ) { _deleteEEreg(_Rd_, 0); if(EE_CONST_PROP) { GPR_SET_CONST(_Rd_); g_cpuConstRegs[_Rd_].UL[0] = newpc; g_cpuConstRegs[_Rd_].UL[1] = 0; } else { xMOV(ptr32[&cpuRegs.GPR.r[_Rd_].UL[0]], newpc); xMOV(ptr32[&cpuRegs.GPR.r[_Rd_].UL[1]], 0); } } _clearNeededMMXregs(); _clearNeededXMMregs(); recompileNextInstruction(1); if( x86regs[esi.GetId()].inuse ) { pxAssert( x86regs[esi.GetId()].type == X86TYPE_PCWRITEBACK ); xMOV(ptr[&cpuRegs.pc], esi); x86regs[esi.GetId()].inuse = 0; } else { xMOV(eax, ptr[&g_recWriteback]); xMOV(ptr[&cpuRegs.pc], eax); } SetBranchReg(0xffffffff); }