/* Create the device specific rendering context. */ GLboolean r200CreateContext( gl_api api, const struct gl_config *glVisual, __DRIcontext *driContextPriv, const struct __DriverContextConfig *ctx_config, unsigned *error, void *sharedContextPrivate) { __DRIscreen *sPriv = driContextPriv->driScreenPriv; radeonScreenPtr screen = (radeonScreenPtr)(sPriv->driverPrivate); struct dd_function_table functions; r200ContextPtr rmesa; struct gl_context *ctx; int i; int tcl_mode; if (ctx_config->flags & ~(__DRI_CTX_FLAG_DEBUG | __DRI_CTX_FLAG_NO_ERROR)) { *error = __DRI_CTX_ERROR_UNKNOWN_FLAG; return false; } if (ctx_config->attribute_mask) { *error = __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE; return false; } assert(driContextPriv); assert(screen); /* Allocate the R200 context */ rmesa = calloc(1, sizeof(*rmesa)); if ( !rmesa ) { *error = __DRI_CTX_ERROR_NO_MEMORY; return GL_FALSE; } rmesa->radeon.radeonScreen = screen; r200_init_vtbl(&rmesa->radeon); /* init exp fog table data */ radeonInitStaticFogData(); /* Parse configuration files. * Do this here so that initialMaxAnisotropy is set before we create * the default textures. */ driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache, screen->driScreen->myNum, "r200", NULL); rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache, "def_max_anisotropy"); if (driQueryOptionb( &rmesa->radeon.optionCache, "hyperz")) rmesa->using_hyperz = GL_TRUE; /* Init default driver functions then plug in our R200-specific functions * (the texture functions are especially important) */ _mesa_init_driver_functions(&functions); _tnl_init_driver_draw_function(&functions); r200InitDriverFuncs(&functions); r200InitIoctlFuncs(&functions); r200InitStateFuncs(&rmesa->radeon, &functions); r200InitTextureFuncs(&rmesa->radeon, &functions); r200InitShaderFuncs(&functions); radeonInitQueryObjFunctions(&functions); if (!radeonInitContext(&rmesa->radeon, api, &functions, glVisual, driContextPriv, sharedContextPrivate)) { free(rmesa); *error = __DRI_CTX_ERROR_NO_MEMORY; return GL_FALSE; } rmesa->radeon.swtcl.RenderIndex = ~0; rmesa->radeon.hw.all_dirty = 1; ctx = &rmesa->radeon.glCtx; driContextSetFlags(ctx, ctx_config->flags); /* Initialize the software rasterizer and helper modules. */ _swrast_CreateContext( ctx ); _vbo_CreateContext( ctx ); _tnl_CreateContext( ctx ); _swsetup_CreateContext( ctx ); ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache, "texture_units"); ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits = ctx->Const.MaxTextureUnits; ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits; ctx->Const.MaxCombinedTextureImageUnits = ctx->Const.MaxTextureUnits; ctx->Const.StripTextureBorder = GL_TRUE; /* FIXME: When no memory manager is available we should set this * to some reasonable value based on texture memory pool size */ ctx->Const.MaxTextureLevels = 12; ctx->Const.Max3DTextureLevels = 9; ctx->Const.MaxCubeTextureLevels = 12; ctx->Const.MaxTextureRectSize = 2048; ctx->Const.MaxRenderbufferSize = 2048; ctx->Const.MaxTextureMaxAnisotropy = 16.0; /* No wide AA points. */ ctx->Const.MinPointSize = 1.0; ctx->Const.MinPointSizeAA = 1.0; ctx->Const.MaxPointSizeAA = 1.0; ctx->Const.PointSizeGranularity = 0.0625; ctx->Const.MaxPointSize = 2047.0; /* mesa initialization problem - _mesa_init_point was already called */ ctx->Point.MaxSize = ctx->Const.MaxPointSize; ctx->Const.MinLineWidth = 1.0; ctx->Const.MinLineWidthAA = 1.0; ctx->Const.MaxLineWidth = 10.0; ctx->Const.MaxLineWidthAA = 10.0; ctx->Const.LineWidthGranularity = 0.0625; ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = R200_VSF_MAX_INST; ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 12; ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = R200_VSF_MAX_TEMPS; ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = R200_VSF_MAX_PARAM; ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1; ctx->Const.MaxDrawBuffers = 1; ctx->Const.MaxColorAttachments = 1; ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = GL_TRUE; /* Install the customized pipeline: */ _tnl_destroy_pipeline( ctx ); _tnl_install_pipeline( ctx, r200_pipeline ); /* Try and keep materials and vertices separate: */ /* _tnl_isolate_materials( ctx, GL_TRUE ); */ /* Configure swrast and TNL to match hardware characteristics: */ _swrast_allow_pixel_fog( ctx, GL_FALSE ); _swrast_allow_vertex_fog( ctx, GL_TRUE ); _tnl_allow_pixel_fog( ctx, GL_FALSE ); _tnl_allow_vertex_fog( ctx, GL_TRUE ); for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) { _math_matrix_ctr( &rmesa->TexGenMatrix[i] ); _math_matrix_set_identity( &rmesa->TexGenMatrix[i] ); } _math_matrix_ctr( &rmesa->tmpmat ); _math_matrix_set_identity( &rmesa->tmpmat ); ctx->Extensions.ARB_occlusion_query = true; ctx->Extensions.ARB_point_sprite = true; ctx->Extensions.ARB_texture_border_clamp = true; ctx->Extensions.ARB_texture_cube_map = true; ctx->Extensions.ARB_texture_env_combine = true; ctx->Extensions.ARB_texture_env_dot3 = true; ctx->Extensions.ARB_texture_env_crossbar = true; ctx->Extensions.ARB_texture_filter_anisotropic = true; ctx->Extensions.ARB_texture_mirror_clamp_to_edge = true; ctx->Extensions.ARB_vertex_program = true; ctx->Extensions.ATI_fragment_shader = (ctx->Const.MaxTextureUnits == 6); ctx->Extensions.ATI_texture_env_combine3 = true; ctx->Extensions.ATI_texture_mirror_once = true; ctx->Extensions.EXT_blend_color = true; ctx->Extensions.EXT_blend_equation_separate = true; ctx->Extensions.EXT_blend_func_separate = true; ctx->Extensions.EXT_blend_minmax = true; ctx->Extensions.EXT_gpu_program_parameters = true; ctx->Extensions.EXT_point_parameters = true; ctx->Extensions.EXT_texture_env_dot3 = true; ctx->Extensions.EXT_texture_filter_anisotropic = true; ctx->Extensions.EXT_texture_mirror_clamp = true; ctx->Extensions.MESA_pack_invert = true; ctx->Extensions.NV_fog_distance = true; ctx->Extensions.NV_texture_rectangle = true; ctx->Extensions.OES_EGL_image = true; if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) { /* yuv textures don't work with some chips - R200 / rv280 okay so far others get the bit ordering right but don't actually do YUV-RGB conversion */ ctx->Extensions.MESA_ycbcr_texture = true; } ctx->Extensions.EXT_texture_compression_s3tc = true; ctx->Extensions.ANGLE_texture_compression_dxt = true; #if 0 r200InitDriverFuncs( ctx ); r200InitIoctlFuncs( ctx ); r200InitStateFuncs( ctx ); r200InitTextureFuncs( ctx ); #endif /* plug in a few more device driver functions */ /* XXX these should really go right after _mesa_init_driver_functions() */ radeon_fbo_init(&rmesa->radeon); radeonInitSpanFuncs( ctx ); r200InitTnlFuncs( ctx ); r200InitState( rmesa ); r200InitSwtcl( ctx ); rmesa->prefer_gart_client_texturing = (getenv("R200_GART_CLIENT_TEXTURES") != 0); tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode"); if (getenv("R200_NO_RAST")) { fprintf(stderr, "disabling 3D acceleration\n"); FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1); } else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") || !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) { if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) { rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL; fprintf(stderr, "Disabling HW TCL support\n"); } TCL_FALLBACK(&rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1); } _mesa_override_extensions(ctx); _mesa_compute_version(ctx); /* Exec table initialization requires the version to be computed */ _mesa_initialize_dispatch_tables(ctx); _mesa_initialize_vbo_vtxfmt(ctx); *error = __DRI_CTX_ERROR_SUCCESS; return GL_TRUE; }
/* Create the device specific context. */ GLboolean r100CreateContext( gl_api api, const struct gl_config *glVisual, __DRIcontext *driContextPriv, const struct __DriverContextConfig *ctx_config, unsigned *error, void *sharedContextPrivate) { __DRIscreen *sPriv = driContextPriv->driScreenPriv; radeonScreenPtr screen = (radeonScreenPtr)(sPriv->driverPrivate); struct dd_function_table functions; r100ContextPtr rmesa; struct gl_context *ctx; int i; int tcl_mode, fthrottle_mode; if (ctx_config->flags & ~(__DRI_CTX_FLAG_DEBUG | __DRI_CTX_FLAG_NO_ERROR)) { *error = __DRI_CTX_ERROR_UNKNOWN_FLAG; return false; } if (ctx_config->attribute_mask) { *error = __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE; return false; } assert(driContextPriv); assert(screen); /* Allocate the Radeon context */ rmesa = calloc(1, sizeof(*rmesa)); if ( !rmesa ) { *error = __DRI_CTX_ERROR_NO_MEMORY; return GL_FALSE; } rmesa->radeon.radeonScreen = screen; r100_init_vtbl(&rmesa->radeon); /* init exp fog table data */ radeonInitStaticFogData(); /* Parse configuration files. * Do this here so that initialMaxAnisotropy is set before we create * the default textures. */ driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache, screen->driScreen->myNum, "radeon", NULL); rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache, "def_max_anisotropy"); if (driQueryOptionb(&rmesa->radeon.optionCache, "hyperz")) rmesa->using_hyperz = GL_TRUE; /* Init default driver functions then plug in our Radeon-specific functions * (the texture functions are especially important) */ _mesa_init_driver_functions( &functions ); _tnl_init_driver_draw_function( &functions ); radeonInitTextureFuncs( &rmesa->radeon, &functions ); radeonInitQueryObjFunctions(&functions); if (!radeonInitContext(&rmesa->radeon, api, &functions, glVisual, driContextPriv, sharedContextPrivate)) { free(rmesa); *error = __DRI_CTX_ERROR_NO_MEMORY; return GL_FALSE; } rmesa->radeon.swtcl.RenderIndex = ~0; rmesa->radeon.hw.all_dirty = GL_TRUE; ctx = &rmesa->radeon.glCtx; driContextSetFlags(ctx, ctx_config->flags); /* Initialize the software rasterizer and helper modules. */ _swrast_CreateContext( ctx ); _vbo_CreateContext( ctx ); _tnl_CreateContext( ctx ); _swsetup_CreateContext( ctx ); ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache, "texture_units"); ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits = ctx->Const.MaxTextureUnits; ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits; ctx->Const.MaxCombinedTextureImageUnits = ctx->Const.MaxTextureUnits; ctx->Const.StripTextureBorder = GL_TRUE; /* FIXME: When no memory manager is available we should set this * to some reasonable value based on texture memory pool size */ ctx->Const.MaxTextureLevels = 12; ctx->Const.Max3DTextureLevels = 9; ctx->Const.MaxCubeTextureLevels = 12; ctx->Const.MaxTextureRectSize = 2048; ctx->Const.MaxTextureMaxAnisotropy = 16.0; /* No wide points. */ ctx->Const.MinPointSize = 1.0; ctx->Const.MinPointSizeAA = 1.0; ctx->Const.MaxPointSize = 1.0; ctx->Const.MaxPointSizeAA = 1.0; ctx->Const.MinLineWidth = 1.0; ctx->Const.MinLineWidthAA = 1.0; ctx->Const.MaxLineWidth = 10.0; ctx->Const.MaxLineWidthAA = 10.0; ctx->Const.LineWidthGranularity = 0.0625; /* Set maxlocksize (and hence vb size) small enough to avoid * fallbacks in radeon_tcl.c. ie. guarentee that all vertices can * fit in a single dma buffer for indexed rendering of quad strips, * etc. */ ctx->Const.MaxArrayLockSize = MIN2( ctx->Const.MaxArrayLockSize, RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE ); rmesa->boxes = 0; ctx->Const.MaxDrawBuffers = 1; ctx->Const.MaxColorAttachments = 1; ctx->Const.MaxRenderbufferSize = 2048; ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = true; /* Install the customized pipeline: */ _tnl_destroy_pipeline( ctx ); _tnl_install_pipeline( ctx, radeon_pipeline ); /* Try and keep materials and vertices separate: */ /* _tnl_isolate_materials( ctx, GL_TRUE ); */ /* Configure swrast and T&L to match hardware characteristics: */ _swrast_allow_pixel_fog( ctx, GL_FALSE ); _swrast_allow_vertex_fog( ctx, GL_TRUE ); _tnl_allow_pixel_fog( ctx, GL_FALSE ); _tnl_allow_vertex_fog( ctx, GL_TRUE ); for ( i = 0 ; i < RADEON_MAX_TEXTURE_UNITS ; i++ ) { _math_matrix_ctr( &rmesa->TexGenMatrix[i] ); _math_matrix_ctr( &rmesa->tmpmat[i] ); _math_matrix_set_identity( &rmesa->TexGenMatrix[i] ); _math_matrix_set_identity( &rmesa->tmpmat[i] ); } ctx->Extensions.ARB_occlusion_query = true; ctx->Extensions.ARB_texture_border_clamp = true; ctx->Extensions.ARB_texture_cube_map = true; ctx->Extensions.ARB_texture_env_combine = true; ctx->Extensions.ARB_texture_env_crossbar = true; ctx->Extensions.ARB_texture_env_dot3 = true; ctx->Extensions.ARB_texture_filter_anisotropic = true; ctx->Extensions.ARB_texture_mirror_clamp_to_edge = true; ctx->Extensions.ATI_texture_env_combine3 = true; ctx->Extensions.ATI_texture_mirror_once = true; ctx->Extensions.EXT_texture_env_dot3 = true; ctx->Extensions.EXT_texture_filter_anisotropic = true; ctx->Extensions.EXT_texture_mirror_clamp = true; ctx->Extensions.MESA_ycbcr_texture = true; ctx->Extensions.NV_texture_rectangle = true; ctx->Extensions.OES_EGL_image = true; ctx->Extensions.EXT_texture_compression_s3tc = true; ctx->Extensions.ANGLE_texture_compression_dxt = true; /* XXX these should really go right after _mesa_init_driver_functions() */ radeon_fbo_init(&rmesa->radeon); radeonInitSpanFuncs( ctx ); radeonInitIoctlFuncs( ctx ); radeonInitStateFuncs( ctx ); radeonInitState( rmesa ); radeonInitSwtcl( ctx ); _mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0, ctx->Const.MaxArrayLockSize, 32 ); fthrottle_mode = driQueryOptioni(&rmesa->radeon.optionCache, "fthrottle_mode"); rmesa->radeon.iw.irq_seq = -1; rmesa->radeon.irqsEmitted = 0; rmesa->radeon.do_irqs = (rmesa->radeon.radeonScreen->irq != 0 && fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS); rmesa->radeon.do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS); tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode"); if (getenv("RADEON_NO_RAST")) { fprintf(stderr, "disabling 3D acceleration\n"); FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1); } else if (tcl_mode == DRI_CONF_TCL_SW || !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) { if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) { rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL; fprintf(stderr, "Disabling HW TCL support\n"); } TCL_FALLBACK(&rmesa->radeon.glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1); } if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) { /* _tnl_need_dlist_norm_lengths( ctx, GL_FALSE ); */ } _mesa_override_extensions(ctx); _mesa_compute_version(ctx); /* Exec table initialization requires the version to be computed */ _mesa_initialize_dispatch_tables(ctx); _mesa_initialize_vbo_vtxfmt(ctx); *error = __DRI_CTX_ERROR_SUCCESS; return GL_TRUE; }
bool i915CreateContext(int api, const struct gl_config * mesaVis, __DRIcontext * driContextPriv, unsigned major_version, unsigned minor_version, uint32_t flags, unsigned *error, void *sharedContextPrivate) { struct dd_function_table functions; struct i915_context *i915 = rzalloc(NULL, struct i915_context); struct intel_context *intel = &i915->intel; struct gl_context *ctx = &intel->ctx; if (!i915) { *error = __DRI_CTX_ERROR_NO_MEMORY; return false; } i915InitVtbl(i915); i915InitDriverFunctions(&functions); if (!intelInitContext(intel, api, major_version, minor_version, flags, mesaVis, driContextPriv, sharedContextPrivate, &functions, error)) { ralloc_free(i915); return false; } intel_init_texture_formats(ctx); _math_matrix_ctr(&intel->ViewportMatrix); /* Initialize swrast, tnl driver tables: */ intelInitTriFuncs(ctx); /* Install the customized pipeline: */ _tnl_destroy_pipeline(ctx); _tnl_install_pipeline(ctx, intel_pipeline); if (intel->no_rast) FALLBACK(intel, INTEL_FALLBACK_USER, 1); ctx->Const.MaxTextureUnits = I915_TEX_UNITS; ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits = I915_TEX_UNITS; ctx->Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits = I915_TEX_UNITS; ctx->Const.MaxTextureCoordUnits = I915_TEX_UNITS; ctx->Const.MaxVarying = I915_TEX_UNITS; ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = ctx->Const.MaxVarying * 4; ctx->Const.MaxCombinedTextureImageUnits = ctx->Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits + ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits; /* Advertise the full hardware capabilities. The new memory * manager should cope much better with overload situations: */ ctx->Const.MaxTextureSize = 2048; ctx->Const.Max3DTextureLevels = 9; ctx->Const.MaxCubeTextureLevels = 12; ctx->Const.MaxTextureRectSize = (1 << 11); ctx->Const.MaxTextureUnits = I915_TEX_UNITS; ctx->Const.MaxTextureMaxAnisotropy = 4.0; /* GL_ARB_fragment_program limits - don't think Mesa actually * validates programs against these, and in any case one ARB * instruction can translate to more than one HW instruction, so * we'll still have to check and fallback each time. */ ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = I915_MAX_TEMPORARY; ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 11; /* 8 tex, 2 color, fog */ ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = I915_MAX_CONSTANT; ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = I915_MAX_ALU_INSN; ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = I915_MAX_TEX_INSN; ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = (I915_MAX_ALU_INSN + I915_MAX_TEX_INSN); ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = I915_MAX_TEX_INDIRECT; ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0; /* I don't think we have one */ ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams = MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters, ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams); /* i915 stores all values in single-precision floats. Values aren't set * for other program targets because software is used for those targets. */ ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumFloat.RangeMin = 127; ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumFloat.RangeMax = 127; ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumFloat.Precision = 23; ctx->Const.Program[MESA_SHADER_FRAGMENT].LowFloat = ctx->Const.Program[MESA_SHADER_FRAGMENT].HighFloat = ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumFloat; ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt.RangeMin = 24; ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt.RangeMax = 24; ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt.Precision = 0; ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt; ctx->FragmentProgram._MaintainTexEnvProgram = true; /* FINISHME: Are there other options that should be enabled for software * FINISHME: vertex shaders? */ ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitNoIndirectSampler = true; struct gl_shader_compiler_options *const fs_options = & ctx->Const.ShaderCompilerOptions[MESA_SHADER_FRAGMENT]; fs_options->MaxIfDepth = 0; fs_options->EmitNoPow = true; fs_options->EmitNoMainReturn = true; fs_options->EmitNoIndirectInput = true; fs_options->EmitNoIndirectOutput = true; fs_options->EmitNoIndirectUniform = true; fs_options->EmitNoIndirectTemp = true; fs_options->EmitNoIndirectSampler = true; ctx->Const.MaxDrawBuffers = 1; ctx->Const.QueryCounterBits.SamplesPassed = 0; _tnl_init_vertices(ctx, ctx->Const.MaxArrayLockSize + 12, 36 * sizeof(GLfloat)); intel->verts = TNL_CONTEXT(ctx)->clipspace.vertex_buf; i915InitState(i915); /* Always enable pixel fog. Vertex fog using fog coord will conflict * with fog code appended onto fragment program. */ _tnl_allow_vertex_fog(ctx, 0); _tnl_allow_pixel_fog(ctx, 1); _mesa_override_extensions(ctx); _mesa_compute_version(ctx); _mesa_initialize_dispatch_tables(ctx); _mesa_initialize_vbo_vtxfmt(ctx); return true; }