void halAudioGenerator_HbrClockDivider(IM_UINT16 baseAddress, IM_UINT16 value)
{
LOG_TRACE1(value);
/* 9-bit width */
access_CoreWriteByte((u8) (value), baseAddress + AG_HBR_CLKDIV0);
access_CoreWrite(value >> 8, baseAddress + AG_HBR_CLKDIV1, 0, 1);
}
void api_CoreWrite(u8 data, u16 addr)
{
access_CoreWriteByte(data, addr);
}
int api_Initialize(u16 address, u8 dataEnablePolarity, u16 sfrClock, u8 force) //cmd:auto argument: 0, 1, 2500, 0
{
dtd_t dtd;
videoParams_t params;
dataEnablePolarity = 1;
api_mDataEnablePolarity = dataEnablePolarity;
api_mHpd = FALSE;
api_mSendGamutOk = FALSE; //?????????????????
api_mSfrClock = sfrClock; // sfrClock,that are required for setting the low time of the SCL clock in each speed mode
LOG_NOTICE("dwc_hdmi_tx_software_api_2.12");
LOG_NOTICE(__DATE__);
LOG_TRACE1(dataEnablePolarity);
/* reset error */
error_Set(NO_ERROR);
api_mBaseAddress = address;
if (!api_mutex_inited)
{
mutex_Initialize(&api_mMutex);
api_mutex_inited = 1;
}
control_InterruptMute(api_mBaseAddress, ~0); /* disable all interrupts */
if ((api_mCurrentState < API_HPD) || (api_mCurrentState > API_EDID_READ))
{
/* if EDID read do not re-read, if HPDetected, keep in same state
* otherwise, NOT INIT */
api_mCurrentState = API_NOT_INIT;
}
/* VGA must be supported by all sinks
* so use it as default configuration
*/
dtd_Fill(&dtd, 4, 60000);
videoParams_Reset(¶ms);
videoParams_SetHdmi(¶ms, TRUE);
videoParams_SetDtd(¶ms, &dtd); /* params->mDtd = dtd; */
pixelClock = videoParams_GetPixelClock(¶ms); /* dtd_GetPixelClock(&(params->mDtd)); */
/* reset HAPS51 DEMO BOARD, by default mask all interrupts */
if (board_Initialize(api_mBaseAddress, pixelClock, 8) != TRUE)
{
return FALSE;
}
/* get Product Identification Register 0 */
LOG_NOTICE2("Product Line", control_ProductLine(api_mBaseAddress));
/* get Product Identification Register 1*/
LOG_NOTICE2("Product Type", control_ProductType(api_mBaseAddress));
/* if ((ProductLine == 0xA0) && ((ProductType == 0x01 || ProductType == 0xC1))) */
if (control_SupportsCore(api_mBaseAddress) != TRUE)
{
error_Set(ERR_HW_NOT_SUPPORTED);
LOG_ERROR("Unknown device: aborting...");
return FALSE;
}
/* get Design Identification Register */
LOG_NOTICE2("HDMI TX Controller Design", control_Design(api_mBaseAddress));
/* get Revision Identification Register */
LOG_NOTICE2("HDMI TX Controller Revision", control_Revision(api_mBaseAddress));
/* if(ProductLine == 0xA0 && ProductType == 0xC1)*/
if (control_SupportsHdcp(api_mBaseAddress) == TRUE)
{
LOG_NOTICE("HDMI TX controller supports HDCP");
}
/* print api_mDataEnablePolarity value ,always return TRUE */
if (video_Initialize(api_mBaseAddress, ¶ms, api_mDataEnablePolarity)
!= TRUE)
{
return FALSE;
}
if (audio_Initialize(api_mBaseAddress) != TRUE)
{
return FALSE;
}
if (packets_Initialize(api_mBaseAddress) != TRUE)
{
return FALSE;
}
if (hdcp_Initialize(api_mBaseAddress, api_mDataEnablePolarity)
!= TRUE)
{
return FALSE;
}
/* clock gate == 1 => turn off all modules */
if (control_Initialize(api_mBaseAddress, api_mDataEnablePolarity,
pixelClock) != TRUE)
{
return FALSE;
}
#ifdef CONFIG_HMDI_JZ4780_DEBUG
printk("jz4780 hdmi %s %d phy init\n",__func__,__LINE__);
#endif
control_InterruptClearAll(api_mBaseAddress);
if (board_PixelClock(api_mBaseAddress, pixelClock, videoParams_GetColorResolution(¶ms))!= TRUE)
{
return FALSE;
}
#ifdef CONFIG_HMDI_JZ4780_DEBUG
printk("jz4780 hdmi %s %d video configured\n",__func__,__LINE_);
#endif
if (video_Configure(api_mBaseAddress, ¶ms, api_mDataEnablePolarity, FALSE) != TRUE)
{
return FALSE;
}
if ((api_mCurrentState < API_HPD) || (api_mCurrentState > API_EDID_READ))
{
/* if EDID read do not re-read, if HPDetected, keep in same state
* otherwise, set to INIT */
api_mCurrentState = API_INIT;
}
/*
* By default no pixel repetition and color resolution is 8
*/
#ifdef CONFIG_HMDI_JZ4780_DEBUG
printk("jz4780 hdmi %s %d control configured\n",__func__,__LINE_);
#endif
if (control_Configure(api_mBaseAddress, pixelClock, 0, 8, 0, 0, 0, 0) != TRUE)
{
return FALSE;
}
/* send AVMUTE SET (optional) */
#ifdef CONFIG_HMDI_JZ4780_DEBUG
printk("jz4780 hdmi %s %d phy configured\n",__func__,__LINE_);
#endif
#if 0
/* enable interrupts */
access_CoreWriteByte(0x0, 0x10D2);
access_CoreWriteByte(0x0, 0x10D6);
access_CoreWriteByte(0x0, 0x10DA);
access_CoreWriteByte(0x0, 0x0180);
#endif
#if 0
access_CoreWriteByte(~0x4, 0x10D2); //audio packets
access_CoreWriteByte(0x0, 0x0180); //intc mute
#endif
api_phy_enable(PHY_ENABLE_HPD);
control_InterruptMute(api_mBaseAddress, 0);
if (system_InterruptHandlerRegister(TX_INT, api_EventHandler, NULL) == TRUE)
{
printk("=====>enable TX_INT in %s:%d\n", __func__, __LINE__);
//return system_InterruptEnable(TX_INT);
return TRUE;
}
return FALSE;
}
void halInterrupt_I2cDdcClear(u16 baseAddr, u8 value)
{
LOG_TRACE1(value);
access_CoreWriteByte(value, (baseAddr + IH_I2CM_STAT0));
}
void halInterrupt_AudioSamplerClear(u16 baseAddr, u8 value)
{
LOG_TRACE1(value);
access_CoreWriteByte(value, (baseAddr + IH_AS_STAT0));
}
void halInterrupt_PacketsOverflowClear(u16 baseAddr, u8 value)
{
LOG_TRACE1(value);
access_CoreWriteByte(value, (baseAddr + IH_FC_STAT2));
}
void halInterrupt_OtherPacketsClear(u16 baseAddr, u8 value)
{
LOG_TRACE1(value);
access_CoreWriteByte(value, (baseAddr + IH_FC_STAT1));
}
void halAudioGenerator_FreqIncrementRight(IM_UINT16 baseAddress, IM_UINT16 value)
{
LOG_TRACE1(value);
access_CoreWriteByte((u8) (value), baseAddress + AG_INCRIGHT0);
access_CoreWriteByte(value >> 8, baseAddress + AG_INCRIGHT1);
}
void halInterrupt_AudioDmaClear(u16 baseAddr, u8 value)
{
LOG_TRACE1(value);
access_CoreWriteByte(value, (baseAddr + IH_AHBDMAAUD_STAT0));
}
void halInterrupt_VideoPacketizerClear(u16 baseAddr, u8 value)
{
LOG_TRACE1(value);
access_CoreWriteByte(value, (baseAddr + IH_VP_STAT0));
}
void halSourcePhy_TestDataIn(u16 baseAddr, u8 data)
{
LOG_TRACE1(data);
access_CoreWriteByte(data, (baseAddr + PHY_TST1));
}
void halSourcePhy_InterruptMask(u16 baseAddr, u8 mask)
{
LOG_TRACE1(mask);
access_CoreWriteByte(mask, (baseAddr + PHY_MASK0));
}
void halFrameComposerAudioInfo_AllocateChannels(u16 baseAddr, u8 ca)
{
LOG_TRACE1(ca);
access_CoreWriteByte(ca, baseAddr + FC_AUDICONF2);
}
static int hdmi_config(struct jzhdmi *jzhdmi)
{
u8 currentMode = 0;
hdmivsdb_t vsdb;
shortVideoDesc_t tmp_svd;
dtd_t tmp_dtd;
u8 ceaCode = 0;
u8 errorCode = NO_ERROR;
u8 svdNo=0;
/* needed to make sure it doesn't change while in this function*/
struct device *dev = jzhdmi->dev;
videoParams_t *pVideo = jzhdmi->hdmi_params.pVideo;
audioParams_t *pAudio = jzhdmi->hdmi_params.pAudio;
hdcpParams_t *pHdcp = jzhdmi->hdmi_params.pHdcp;
productParams_t *pProduct = jzhdmi->hdmi_params.pProduct;
svdNo = api_EdidSvdCount();
if ((api_EdidHdmivsdb(&vsdb) == TRUE) && (jzhdmi->edid_faild == 0)) {
dev_info(dev, "==========>HDMI mode\n");
videoParams_SetHdmi(pVideo, TRUE);
/* TODO:
if (hdmivsdb_GetDeepColor48(&vsdb)) {
videoParams_SetColorResolution(pVideo, 16);
} else if (hdmivsdb_GetDeepColor36(&vsdb)) {
videoParams_SetColorResolution(pVideo, 12);
} else if (hdmivsdb_GetDeepColor30(&vsdb)) {
videoParams_SetColorResolution(pVideo, 10);
} else {
videoParams_SetColorResolution(pVideo, 0);
}
*/
videoParams_SetColorResolution(pVideo, 0);
if (currentMode >= svdNo) {
currentMode = 0;
}
#ifdef HDMI_JZ4780_DEBUG
dev_info(jzhdmi->dev, "=====> cur==%d svno=%d\n",currentMode,svdNo);
#endif
for (; currentMode < svdNo; currentMode++) {
if (api_EdidSvd(currentMode, &tmp_svd)) {
ceaCode = shortVideoDesc_GetCode(&tmp_svd);
if (ceaCode != jzhdmi->hdmi_info.out_type) continue;
if (board_SupportedRefreshRate(ceaCode) != -1) {
dtd_Fill(&tmp_dtd, ceaCode, board_SupportedRefreshRate(ceaCode));
videoParams_SetDtd(pVideo, &tmp_dtd);
} else {
dev_err(dev, "CEA mode not supported\n");
continue;
}
}
if (api_Configure(pVideo, pAudio, pProduct, pHdcp)) {
dev_info(dev, "----api_Configure ok\n");
break;
}
dev_err(dev, "error: VM = %d\n", ceaCode);
errorCode = error_Get();
if (errorCode == ERR_HDCP_FAIL) {
system_SleepMs(1000);
currentMode--;
}
}
if (currentMode >= svdNo) {
/* spanned all SVDs and non works, sending VGA */
dev_err(dev, "error spanned all SVDs and non works\n");
dtd_Fill(&tmp_dtd, 1, board_SupportedRefreshRate(1));
videoParams_SetDtd(pVideo, &tmp_dtd);
api_Configure(pVideo, pAudio, pProduct, pHdcp);
}
/* lltang add test overflow */
if(0){
/* ====>tmds reset */
access_CoreWrite(1, 0x4002, 1, 1);
/* ====>video_Configure again */
if (video_Configure(0, pVideo, 1, FALSE) != TRUE) {
return FALSE;
}
access_CoreWriteByte(0x0, 0x10DA);
}
} else {
dev_info(dev, "Force into hdmi mode!\n");
#ifndef DVIMODE
videoParams_SetHdmi(pVideo, TRUE);
videoParams_SetColorResolution(pVideo, 0);
if (currentMode >= svdNo) {
currentMode = 0;
}
#ifdef HDMI_JZ4780_DEBUG
dev_info(jzhdmi->dev, "=====>out_type=%d\n",jzhdmi->hdmi_info.out_type);
#endif
ceaCode = jzhdmi->hdmi_info.out_type;
if (board_SupportedRefreshRate(ceaCode) != -1) {
dtd_Fill(&tmp_dtd, ceaCode, board_SupportedRefreshRate(ceaCode));
videoParams_SetDtd(pVideo, &tmp_dtd);
} else {
dev_err(dev, "CEA mode not supported\n");
}
if (api_Configure(pVideo, pAudio, pProduct, pHdcp)) {
dev_info(dev, "api_Configure ok\n");
}
}
#else
dev_info(dev, "====DVI mode!\n");
videoParams_SetHdmi(pVideo, FALSE);
videoParams_SetColorResolution(pVideo, 0);
if (currentMode >= api_EdidDtdCount()) {
currentMode = 0;
}
for (; currentMode < api_EdidDtdCount(); currentMode++) {
continue;
if (api_EdidDtd(currentMode, &tmp_dtd)) {
ceaCode = cliEdid_GetDtdCode(&tmp_dtd);
dev_info(dev, "check ceaCode = %d\n", ceaCode);
if (ceaCode != 3) continue;
dev_info(dev, "find ceaCode = %d\n", ceaCode);
dtd_Fill(&tmp_dtd, ceaCode, board_SupportedRefreshRate(ceaCode));
videoParams_SetDtd(pVideo, &tmp_dtd);
}
if (api_Configure(pVideo, pAudio, pProduct, pHdcp)) {
break;
}
errorCode = error_Get();
dev_err(dev, "API configure fail\n");
if (errorCode == ERR_HDCP_FAIL) {
system_SleepMs(1000);
currentMode--;
}
}
if (currentMode >= api_EdidDtdCount()) {
dev_err(dev, "spanned all dtds and non works, sending VGA\n");
dtd_Fill(&tmp_dtd, 1, board_SupportedRefreshRate(1));
videoParams_SetDtd(pVideo, &tmp_dtd);
api_Configure(pVideo, pAudio, pProduct, pHdcp);
}
}
void halAudioGenerator_IecCategoryCode(IM_UINT16 baseAddress, IM_UINT8 value)
{
LOG_TRACE1(value);
access_CoreWriteByte(value, baseAddress + AG_SPDIF_AUDSCHNLS1);
}
void api_EventHandler(void * param)
{
u8 i = 0;
u8 state = 0;
u8 handled = FALSE;
u8 oldHpd = (api_mCurrentState >= API_HPD);
LOG_TRACE();
//printk("======>enter api_EventHandler, api_mCurrentState = %d\n",
// api_mCurrentState);
api_mHpd = (phy_HotPlugDetected(api_mBaseAddress) > 0);
#if 0
for (state = 0; state < 10; state++)
{
LOG_NOTICE3("core read", 0x100 + state, access_CoreReadByte(api_mBaseAddress + 0x100 + state));
}
#endif
/* if HPD always enter - all states */
state = control_InterruptPhyState(api_mBaseAddress);
//printk("======>state = 0x%02x, api_mHpd = %u, oldHpd = %u\n",
// state, api_mHpd, oldHpd);
if ((state != 0) || (api_mHpd != oldHpd))
{
if (api_mHpd && !oldHpd)
{
api_mCurrentState = API_HPD;
LOG_NOTICE("hot plug detected");
}
else if (!api_mHpd && oldHpd)
{
api_mCurrentState = API_NOT_INIT;
LOG_NOTICE("hot plug lost");
}
//printk("=====>enter %s:%d\n", __func__, __LINE__);
control_InterruptPhyClear(api_mBaseAddress, state);
handled = TRUE;
/* report HPD state to HDCP (after configuration) */
if (api_mCurrentState == API_CONFIGURED)
{
//printk("=====>enter %s:%d\n", __func__, __LINE__);
hdcp_RxDetected(api_mBaseAddress, api_mHpd);
}
}
//printk("======>%s:%d api_mCurrentState = %d\n", __func__, __LINE__,
// api_mCurrentState);
if (api_mCurrentState == API_CONFIGURED)
{
/* only report if configured
* (for modules enabled only at configuration stage)*/
/* HDCP module */
//printk("=====>enter %s:%d\n", __func__, __LINE__);
state = hdcp_InterruptStatus(api_mBaseAddress);
if ((state != 0) || (api_mHpd != oldHpd))
{
//printk("=====>enter %s:%d\n", __func__, __LINE__);
hdcp_InterruptClear(api_mBaseAddress, state);
handled = hdcp_EventHandler(api_mBaseAddress, api_mHpd, state, api_mEventRegistry[KSV_LIST_READY]);
}
}
//printk("======>%s:%d api_mCurrentState = %d\n", __func__, __LINE__,
// api_mCurrentState);
if (api_mCurrentState >= API_HPD)
{
/* only report if state is HPD, EDID_READ or CONFIGURED
for modules that can be enabled anytime there is HPD */
/* EDID module */
state = control_InterruptEdidState(api_mBaseAddress);
//printk("=====>enter %s:%d, state = %02x\n",
// __func__, __LINE__, state);
if ((state != 0) || (api_mHpd != oldHpd))
{
control_InterruptEdidClear(api_mBaseAddress, state);
// printk("*****edid**********enter %s:%d\n", __func__, __LINE__);
if (edid_EventHandler(api_mBaseAddress, api_mHpd, state) == EDID_DONE)
{
#ifdef CONFIG_HMDI_JZ4780_DEBUG
printk("*edid read done %s:%d\n", __func__, __LINE__);
#endif
edid_Standby(api_mBaseAddress);
api_mCurrentState = API_EDID_READ;
if (api_mEventRegistry[EDID_READ_EVENT] != NULL)
{
//printk("=====>enter %s:%d\n", __func__, __LINE__);
api_mEventRegistry[EDID_READ_EVENT](&api_mHpd);
}
}
/* even if it is an error reading, it is has been handled!*/
handled = TRUE;
}
}
state = control_InterruptAudioDmaState(api_mBaseAddress);
//printk("=====>%s:%d: state = 0x%02x\n", __func__, __LINE__, state);
for (i = HPD_EVENT; i < DUMMY; i++)
{
/* mutex_Lock(&api_mMutex); */
/* call registered user callbacks */
//printk("=====>enter %s:%d\n", __func__, __LINE__);
if (api_mEventRegistry[i] != NULL)
{
if ((i == HPD_EVENT) && (api_mHpd != oldHpd))
{
//printk("=====>enter %s:%d\n", __func__, __LINE__);
api_mEventRegistry[i](&api_mHpd);
}
else if ((i == DMA_DONE) && (state & (1 << 7)))
{
//printk("=====>enter %s:%d\n", __func__, __LINE__);
api_mEventRegistry[i](&api_mHpd);
}
else if ((i == DMA_ERROR) && (state & (1 << 4)))
{
//printk("=====>enter %s:%d\n", __func__, __LINE__);
api_mEventRegistry[i](&api_mHpd);
}
}
/* mutex_Unlock(&api_mMutex); */
}
//enable all fc interrupt ,lltang
{
state = control_InterruptAudioPacketsState(api_mBaseAddress);
if(state){
/*
access_CoreWriteByte(0x4, 0x10D2);
printk("after clear Audio Sampler----> stat:%x\n",control_InterruptAudioSamplerState(api_mBaseAddress));
control_InterruptAudioPacketsClear(api_mBaseAddress, state);
printk("AudioPackets----> stat:%x\n",state);
state = control_InterruptAudioPacketsState(api_mBaseAddress);
access_CoreWriteByte(~0x4, 0x10D2);
printk("0x10D2:%x\n",access_CoreReadByte(0x10D2));
printk("0x0180:%x\n",access_CoreReadByte(0x0180));
printk("0x3302:%x\n",access_CoreReadByte(0x3302));
*/
handled = TRUE;
}
state = control_InterruptOtherPacketsState(api_mBaseAddress);
if(state){
access_CoreWriteByte(0xff, 0x10D6);
control_InterruptOtherPacketsClear(api_mBaseAddress, state);
printk("OtherPackets----> stat:%x\n",state);
state = control_InterruptOtherPacketsState(api_mBaseAddress);
printk("after clear OtherPackets----> stat:%x\n",state);
handled = TRUE;
access_CoreWriteByte(0x0, 0x10D6);
}
state = control_InterruptPacketsOverflowState(api_mBaseAddress);
if(state){
access_CoreWriteByte(0xff, 0x10DA);
control_InterruptPacketsOverflowClear(api_mBaseAddress, state);
printk("PacketsOverflow----> stat:%x\n",state);
printk("after clear PacketsOverflow----> stat:%x\n",control_InterruptPacketsOverflowState(api_mBaseAddress));
handled = TRUE;
access_CoreWriteByte(0xff, 0x10DA);
}
state = control_InterruptAudioSamplerState(api_mBaseAddress);
if(state){
access_CoreWriteByte((0xc), 0x3302);
control_InterruptAudioSamplerClear(api_mBaseAddress, state);
printk("Audio Sampler----> stat:%x\n",state);
printk("after clear Audio Sampler----> stat:%x\n",control_InterruptAudioSamplerState(api_mBaseAddress));
handled = TRUE;
access_CoreWriteByte(~(0xc), 0x3302);
}
}
if (!handled)
{
printk("interrupt not handled");
#if 0
for (state = 0; state < 10; state++)
{
LOG_NOTICE3("core read", 0x100 + state, access_CoreReadByte(api_mBaseAddress + 0x100 + state));
}
#endif
control_InterruptEdidClear(api_mBaseAddress, 0x3);
}
system_InterruptAcknowledge(TX_INT);
//printk("======>leave api_EventHandler\n");
}
void halFrameComposerAudio_IecCategoryCode(u16 baseAddr, u8 value)
{
LOG_TRACE1(value);
access_CoreWriteByte(value, baseAddr + FC_AUDSCHNLS1);
}
void halInterrupt_Mute(u16 baseAddr, u8 value)
{
LOG_TRACE1(value);
access_CoreWriteByte(value, (baseAddr + IH_MUTE));
}