예제 #1
0
void mips_timer_interrupt(void)
{
    int irq = 63;

    irq_enter();
    kstat_this_cpu.irqs[irq]++;

    if (r4k_offset == 0)
        goto null;

    do {
        kstat_this_cpu.irqs[irq]++;
        do_timer(1);
#ifndef CONFIG_SMP
        update_process_times(user_mode(get_irq_regs()));
#endif
        r4k_cur += r4k_offset;
        ack_r4ktimer(r4k_cur);

    } while (((unsigned long)read_c0_count()
              - r4k_cur) < 0x7fffffff);

    irq_exit();
    return;

null:
    ack_r4ktimer(0);
    irq_exit();
}
예제 #2
0
void mips_timer_interrupt(struct pt_regs *regs)
{
	int irq = 63;
	unsigned long count;
	int cpu = smp_processor_id();

	irq_enter(cpu, irq);
	kstat.irqs[cpu][irq]++;

#ifdef CONFIG_PM
	printk(KERN_ERR "Unexpected CP0 interrupt\n");
	regs->cp0_status &= ~IE_IRQ5; /* disable CP0 interrupt */
	return;
#endif

	if (r4k_offset == 0)
		goto null;

	do {
		count = read_c0_count();
		timerhi += (count < timerlo);   /* Wrap around */
		timerlo = count;

		kstat.irqs[0][irq]++;
		do_timer(regs);
		r4k_cur += r4k_offset;
		ack_r4ktimer(r4k_cur);

	} while (((unsigned long)read_c0_count()
	         - r4k_cur) < 0x7fffffff);

	irq_exit(cpu, irq);

	if (softirq_pending(cpu))
		do_softirq();
	return;

null:
	ack_r4ktimer(0);
}
예제 #3
0
/*
 * There are a lot of conceptually broken versions of the MIPS timer interrupt
 * handler floating around.  This one is rather different, but the algorithm
 * is probably more robust.
 */
void mips_timer_interrupt(struct pt_regs *regs)
{
        int irq = 7; /* FIX ME */

	if (r4k_offset == 0) {
            goto null;
        }

	do {
		kstat_this_cpu.irqs[irq]++;
		do_timer(regs);
#ifndef CONFIG_SMP
		update_process_times(user_mode(regs));
#endif
		r4k_cur += r4k_offset;
		ack_r4ktimer(r4k_cur);

	} while (((unsigned long)read_c0_count()
                    - r4k_cur) < 0x7fffffff);
	return;

null:
	ack_r4ktimer(0);
}