/**
* \brief ECB mode encryption test with DMA.
*/
static void ecb_mode_test_dma(void)
{
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- ECB cipher mode\r\n");
printf("- DMA mode\r\n");
printf("- 4 32bit words with DMA\r\n");
printf("-----------------------------------\r\n");
//! [encryption_mode]
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_AUTO_START;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(&aes_instance,AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(&aes_instance, key128);
/* The initialization vector is not used by the ECB cipher mode. */
dma_start_transfer_job(&example_resource_tx);
aes_set_new_message(&aes_instance);
aes_clear_new_message(&aes_instance);
/* Wait DMA transfer */
while (false == state) {
}
/* Wait for the end of the encryption process. */
while (!(aes_get_status(&aes_instance) & AES_ENCRYPTION_COMPLETE)) {
}
state = false;
dma_start_transfer_job(&example_resource_rx);
/* Wait DMA transfer */
while (false == state) {
}
if ((ref_cipher_text_ecb[0] != output_data[0]) ||
(ref_cipher_text_ecb[1] != output_data[1]) ||
(ref_cipher_text_ecb[2] != output_data[2]) ||
(ref_cipher_text_ecb[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
//! [encryption_mode]
}
/**
* \brief Initialize the AES module.
*
* \param p_aes Base address of the AES instance.
* \param p_cfg Pointer to AES configuration.
*
*/
void aes_init(Aes *const p_aes, struct aes_config *const p_cfg)
{
/* Sanity check arguments */
Assert(p_aes);
Assert(p_cfg);
/* Enable clock for AES */
sysclk_enable_peripheral_clock(ID_AES);
/* Perform a software reset */
aes_reset(p_aes);
/* Initialize the AES with new configurations */
aes_set_config(p_aes, p_cfg);
/* Disable clock for AES */
sysclk_disable_peripheral_clock(ID_AES);
}
/**
* \brief Initialize the AES module.
*
* \param dev_inst Device structure pointer.
* \param aesa Base address of the AESA instance.
* \param cfg Pointer to AES configuration.
*
* \retval true if the initialization was successful.
* \retval false if initialization failed.
*/
bool aes_init(struct aes_dev_inst *const dev_inst, Aesa *const aesa,
struct aes_config *const cfg)
{
/* Sanity check arguments */
Assert(dev_inst);
Assert(aesa);
Assert(cfg);
dev_inst->hw_dev = aesa;
dev_inst->aes_cfg = cfg;
/* Enable APB clock for AES */
sysclk_enable_peripheral_clock(aesa);
/* Initialize the AES with new configurations */
aes_set_config(dev_inst);
/* Disable APB clock for AES */
sysclk_disable_peripheral_clock(aesa);
return true;
}
/**
* \brief Test ECB mode encryption with DMA.
*
* \param test Current test case.
*/
static void run_ecb_mode_test_dma(const struct test_case *test)
{
/* Configure DMAC. */
configure_dma_aes_wr();
configure_dma_aes_rd();
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_AUTO_START;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(&aes_instance,AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(&aes_instance, key128);
dma_start_transfer_job(&example_resource_tx);
aes_set_new_message(&aes_instance);
aes_clear_new_message(&aes_instance);
/* Wait for the end of the encryption process. */
delay_ms(30);
dma_start_transfer_job(&example_resource_rx);
delay_ms(30);
if ((ref_cipher_text_ecb[0] != output_data[0]) ||
(ref_cipher_text_ecb[1] != output_data[1]) ||
(ref_cipher_text_ecb[2] != output_data[2]) ||
(ref_cipher_text_ecb[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "ECB mode encryption with DMA not work!");
}
/**
* \brief Test CTR mode encryption and decryption.
*
* \param test Current test case.
*/
static void run_ctr_mode_test(const struct test_case *test)
{
state = false;
/* Configure the AES. */
g_aes_inst.aes_cfg->encrypt_mode = AES_ENCRYPTION;
g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
g_aes_inst.aes_cfg->dma_mode = AES_MANUAL_MODE;
g_aes_inst.aes_cfg->opmode = AES_CTR_MODE;
g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
aes_set_config(&g_aes_inst);
/* Beginning of a new message. */
aes_set_new_message(&g_aes_inst);
/* Set the cryptographic key. */
aes_write_key(&g_aes_inst, key128);
/* Set the initialization vector. */
aes_write_initvector(&g_aes_inst, init_vector_ctr);
/* Write the data to be ciphered to the input data registers. */
aes_write_input_data(&g_aes_inst, ref_plain_text[0]);
aes_write_input_data(&g_aes_inst, ref_plain_text[1]);
aes_write_input_data(&g_aes_inst, ref_plain_text[2]);
aes_write_input_data(&g_aes_inst, ref_plain_text[3]);
/* Wait for the end of the encryption process. */
delay_ms(30);
/* check the result. */
if ((ref_cipher_text_ctr[0] != output_data[0]) ||
(ref_cipher_text_ctr[1] != output_data[1]) ||
(ref_cipher_text_ctr[2] != output_data[2]) ||
(ref_cipher_text_ctr[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "CTR mode encryption not work!");
state = false;
/* Configure the AES. */
g_aes_inst.aes_cfg->encrypt_mode = AES_DECRYPTION;
g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
g_aes_inst.aes_cfg->dma_mode = AES_MANUAL_MODE;
g_aes_inst.aes_cfg->opmode = AES_CTR_MODE;
g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
aes_set_config(&g_aes_inst);
/* Beginning of a new message. */
aes_set_new_message(&g_aes_inst);
/* Set the cryptographic key. */
aes_write_key(&g_aes_inst, key128);
/* Set the initialization vector. */
aes_write_initvector(&g_aes_inst, init_vector_ctr);
/* Write the data to be deciphered to the input data registers. */
aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[0]);
aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[1]);
aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[2]);
aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[3]);
/* Wait for the end of the decryption process. */
delay_ms(30);
/* check the result. */
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "CTR mode decryption not work!");
}
/**
* \brief Test ECB mode encryption and decryption with PDCA.
*
* \param test Current test case.
*/
static void run_ecb_mode_test_pdca(const struct test_case *test)
{
/* Change the AES interrupt callback function. */
aes_set_callback(&g_aes_inst, AES_INTERRUPT_INPUT_BUFFER_READY,
aes_callback_pdca, 1);
/* Enable PDCA module clock */
pdca_enable(PDCA);
state = false;
/* Configure the AES. */
g_aes_inst.aes_cfg->encrypt_mode = AES_ENCRYPTION;
g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
g_aes_inst.aes_cfg->dma_mode = AES_DMA_MODE;
g_aes_inst.aes_cfg->opmode = AES_ECB_MODE;
g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
aes_set_config(&g_aes_inst);
/* Beginning of a new message. */
aes_set_new_message(&g_aes_inst);
/* Set the cryptographic key. */
aes_write_key(&g_aes_inst, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Write the data to be ciphered to the input data registers. */
/* Init PDCA channel with the pdca_options.*/
PDCA_TX_OPTIONS.addr = (void *)ref_plain_text; /* memory address */
PDCA_TX_OPTIONS.pid = AESA_PDCA_ID_TX; /* select peripheral - AESA TX.*/
PDCA_TX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */
PDCA_TX_OPTIONS.r_addr = (void *)0; /* next memory address */
PDCA_TX_OPTIONS.r_size = 0; /* next transfer counter */
PDCA_TX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD;
pdca_channel_set_config(PDCA_TX_CHANNEL, &PDCA_TX_OPTIONS);
PDCA_RX_OPTIONS.addr = (void *)output_data; /* memory address */
PDCA_RX_OPTIONS.pid = AESA_PDCA_ID_RX; /* select peripheral - AESA RX.*/
PDCA_RX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */
PDCA_RX_OPTIONS.r_addr = (void *)0; /* next memory address */
PDCA_RX_OPTIONS.r_size = 0; /* next transfer counter */
PDCA_RX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD;
pdca_channel_set_config(PDCA_RX_CHANNEL, &PDCA_RX_OPTIONS);
/* Enable PDCA channel, start transfer data. */
pdca_channel_enable(PDCA_TX_CHANNEL);
/* Wait for the end of the encryption process. */
delay_ms(30);
/* Disable PDCA channel. */
pdca_channel_disable(PDCA_RX_CHANNEL);
pdca_channel_disable(PDCA_TX_CHANNEL);
if ((ref_cipher_text_ecb[0] != output_data[0]) ||
(ref_cipher_text_ecb[1] != output_data[1]) ||
(ref_cipher_text_ecb[2] != output_data[2]) ||
(ref_cipher_text_ecb[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "ECB mode encryption not work!");
state = false;
/* Configure the AES. */
g_aes_inst.aes_cfg->encrypt_mode = AES_DECRYPTION;
g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
g_aes_inst.aes_cfg->dma_mode = AES_DMA_MODE;
g_aes_inst.aes_cfg->opmode = AES_ECB_MODE;
g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
aes_set_config(&g_aes_inst);
/* Beginning of a new message. */
aes_set_new_message(&g_aes_inst);
/* Set the cryptographic key. */
aes_write_key(&g_aes_inst, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Write the data to be deciphered to the input data registers. */
/* Init PDCA channel with the pdca_options.*/
PDCA_TX_OPTIONS.addr = (void *)ref_cipher_text_ecb; /* memory address */
PDCA_TX_OPTIONS.pid = AESA_PDCA_ID_TX; /* select peripheral - AESA TX.*/
PDCA_TX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */
PDCA_TX_OPTIONS.r_addr = (void *)0; /* next memory address */
PDCA_TX_OPTIONS.r_size = 0; /* next transfer counter */
PDCA_TX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD;
pdca_channel_set_config(PDCA_TX_CHANNEL, &PDCA_TX_OPTIONS);
PDCA_RX_OPTIONS.addr = (void *)output_data; /* memory address */
PDCA_RX_OPTIONS.pid = AESA_PDCA_ID_RX; /* select peripheral - AESA RX.*/
PDCA_RX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */
PDCA_RX_OPTIONS.r_addr = (void *)0; /* next memory address */
PDCA_RX_OPTIONS.r_size = 0; /* next transfer counter */
PDCA_RX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD;
pdca_channel_set_config(PDCA_RX_CHANNEL, &PDCA_RX_OPTIONS);
/* Enable PDCA channel, start transfer data. */
pdca_channel_enable(PDCA_TX_CHANNEL);
/* Wait for the end of the decryption process. */
delay_ms(30);
/* Disable PDCA channel. */
pdca_channel_disable(PDCA_RX_CHANNEL);
pdca_channel_disable(PDCA_TX_CHANNEL);
/* check the result. */
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "ECB mode decryption not work!");
/* Disable PDCA module clock */
pdca_disable(PDCA);
/* Change back the AES interrupt callback function. */
aes_set_callback(&g_aes_inst, AES_INTERRUPT_INPUT_BUFFER_READY,
aes_callback, 1);
}
/**
* \brief CTR mode encryption and decryption test.
*/
static void ctr_mode_test(void)
{
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- CTR cipher mode\r\n");
printf("- Auto start mode\r\n");
printf("- 4 32bit words\r\n");
printf("-----------------------------------\r\n");
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_AUTO_START;
g_aes_cfg.opmode = AES_CTR_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(&aes_instance,AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(&aes_instance, key128);
/* Set the initialization vector. */
aes_write_init_vector(&aes_instance, init_vector_ctr);
aes_set_new_message(&aes_instance);
/* Write the data to be ciphered to the input data registers. */
aes_write_input_data(&aes_instance, ref_plain_text);
aes_clear_new_message(&aes_instance);
/* Wait for the end of the encryption process. */
while (false == state) {
}
/* check the result. */
if ((ref_cipher_text_ctr[0] != output_data[0]) ||
(ref_cipher_text_ctr[1] != output_data[1]) ||
(ref_cipher_text_ctr[2] != output_data[2]) ||
(ref_cipher_text_ctr[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- CTR decipher mode\r\n");
printf("- Auto start mode\r\n");
printf("- 4 32bit words\r\n");
printf("-----------------------------------\r\n");
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_DECRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_MANUAL_START;
g_aes_cfg.opmode = AES_CTR_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(&aes_instance,AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(&aes_instance, key128);
/* Set the initialization vector. */
aes_write_init_vector(&aes_instance, init_vector_ctr);
/* Write the data to be deciphered to the input data registers. */
aes_write_input_data(&aes_instance, ref_cipher_text_ctr);
aes_set_new_message(&aes_instance);
aes_start(&aes_instance);
aes_clear_new_message(&aes_instance);
/* Wait for the end of the decryption process. */
while (false == state) {
}
/* check the result. */
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
}
/**
* \brief Test CTR mode encryption and decryption.
*
* \param test Current test case.
*/
static void run_ctr_mode_test(const struct test_case *test)
{
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_AUTO_START;
g_aes_cfg.opmode = AES_CTR_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(&aes_instance,AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(&aes_instance, key128);
/* Set the initialization vector. */
aes_write_init_vector(&aes_instance, init_vector_ctr);
aes_set_new_message(&aes_instance);
/* Write the data to be ciphered to the input data registers. */
aes_write_input_data(&aes_instance, ref_plain_text);
aes_clear_new_message(&aes_instance);
/* Wait for the end of the encryption process. */
delay_ms(30);
aes_read_output_data(&aes_instance,output_data);
/* check the result. */
if ((ref_cipher_text_ctr[0] != output_data[0]) ||
(ref_cipher_text_ctr[1] != output_data[1]) ||
(ref_cipher_text_ctr[2] != output_data[2]) ||
(ref_cipher_text_ctr[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "CTR mode encryption not work!");
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_DECRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_AUTO_START;
g_aes_cfg.opmode = AES_CTR_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(&aes_instance,AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(&aes_instance, key128);
/* Set the initialization vector. */
aes_write_init_vector(&aes_instance, init_vector_ctr);
aes_set_new_message(&aes_instance);
/* Write the data to be deciphered to the input data registers. */
aes_write_input_data(&aes_instance, ref_cipher_text_ctr);
aes_clear_new_message(&aes_instance);
/* Wait for the end of the decryption process. */
delay_ms(30);
aes_read_output_data(&aes_instance,output_data);
/* check the result. */
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "CTR mode decryption not work!");
}
/**
* \brief CTR mode encryption and decryption test.
*/
static void ctr_mode_test(void)
{
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- CTR cipher mode\r\n");
printf("- all counter measures\r\n");
printf("- input of 4 32bit words\r\n");
printf("-----------------------------------\r\n");
state = false;
/* Configure the AES. */
g_aes_inst.aes_cfg->encrypt_mode = AES_ENCRYPTION;
g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
g_aes_inst.aes_cfg->dma_mode = AES_MANUAL_MODE;
g_aes_inst.aes_cfg->opmode = AES_CTR_MODE;
g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
aes_set_config(&g_aes_inst);
/* Beginning of a new message. */
aes_set_new_message(&g_aes_inst);
/* Set the cryptographic key. */
aes_write_key(&g_aes_inst, key128);
/* Set the initialization vector. */
aes_write_initvector(&g_aes_inst, init_vector_ctr);
/* Write the data to be ciphered to the input data registers. */
aes_write_input_data(&g_aes_inst, ref_plain_text[0]);
aes_write_input_data(&g_aes_inst, ref_plain_text[1]);
aes_write_input_data(&g_aes_inst, ref_plain_text[2]);
aes_write_input_data(&g_aes_inst, ref_plain_text[3]);
/* Wait for the end of the encryption process. */
while (false == state) {
}
/* check the result. */
if ((ref_cipher_text_ctr[0] != output_data[0]) ||
(ref_cipher_text_ctr[1] != output_data[1]) ||
(ref_cipher_text_ctr[2] != output_data[2]) ||
(ref_cipher_text_ctr[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- CTR decipher mode\r\n");
printf("- all counter measures\r\n");
printf("- input of 4 32bit words\r\n");
printf("-----------------------------------\r\n");
state = false;
/* Configure the AES. */
g_aes_inst.aes_cfg->encrypt_mode = AES_DECRYPTION;
g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
g_aes_inst.aes_cfg->dma_mode = AES_MANUAL_MODE;
g_aes_inst.aes_cfg->opmode = AES_CTR_MODE;
g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
aes_set_config(&g_aes_inst);
/* Beginning of a new message. */
aes_set_new_message(&g_aes_inst);
/* Set the cryptographic key. */
aes_write_key(&g_aes_inst, key128);
/* Set the initialization vector. */
aes_write_initvector(&g_aes_inst, init_vector_ctr);
/* Write the data to be deciphered to the input data registers. */
aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[0]);
aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[1]);
aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[2]);
aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[3]);
/* Wait for the end of the decryption process. */
while (false == state) {
}
/* check the result. */
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
}
/**
* \brief CBC mode encryption and decryption test.
*/
static void cbc_mode_test(void)
{
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- CBC cipher mode\r\n");
printf("- Auto start mode\r\n");
printf("- input of 4 32bit words\r\n");
printf("-----------------------------------\r\n");
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_AUTO_START;
g_aes_cfg.opmode = AES_CBC_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* Set the initialization vector. */
aes_write_initvector(AES, init_vector);
/* Write the data to be ciphered to the input data registers. */
aes_write_input_data(AES, ref_plain_text);
/* Wait for the end of the encryption process. */
while (false == state) {
}
if ((ref_cipher_text_cbc[0] != output_data[0]) ||
(ref_cipher_text_cbc[1] != output_data[1]) ||
(ref_cipher_text_cbc[2] != output_data[2]) ||
(ref_cipher_text_cbc[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- CBC decipher mode\r\n");
printf("- Auto start mode\r\n");
printf("- input of 4 32bit words\r\n");
printf("-----------------------------------\r\n");
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_DECRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_AUTO_START;
g_aes_cfg.opmode = AES_CBC_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* Set the initialization vector. */
aes_write_initvector(AES, init_vector);
/* Write the data to be deciphered to the input data registers. */
aes_write_input_data(AES, ref_cipher_text_cbc);
/* Wait for the end of the decryption process. */
while (false == state) {
}
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
}
/**
* \brief ECB mode encryption and decryption test with PDC.
*/
static void ecb_mode_test_pdc(void)
{
/* Configure PDC. */
g_pdc_tx_packet.ul_addr = (uint32_t)ref_plain_text;
g_pdc_tx_packet.ul_size = AES_EXAMPLE_REFBUF_SIZE;
g_pdc_rx_packet.ul_addr = (uint32_t)output_data;
g_pdc_rx_packet.ul_size = AES_EXAMPLE_REFBUF_SIZE;
g_p_aes_pdc = aes_get_pdc_base(AES);
/* Configure PDC for data receive & transfer */
pdc_tx_init(g_p_aes_pdc, &g_pdc_tx_packet, NULL);
pdc_rx_init(g_p_aes_pdc, &g_pdc_rx_packet, NULL);
/* Disable PDC transfers. */
pdc_disable_transfer(g_p_aes_pdc,
PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS);
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- ECB cipher mode\r\n");
printf("- PDC mode\r\n");
printf("- input of 4 32bit words with PDC\r\n");
printf("-----------------------------------\r\n");
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_IDATAR0_START;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* Enable AES interrupt. */
aes_set_callback(AES, AES_INTERRUPT_END_OF_RECEIVE_BUFFER,
aes_pdc_callback, 1);
/* The initialization vector is not used by the ECB cipher mode. */
/* Enable PDC transfers. */
pdc_enable_transfer(g_p_aes_pdc, PERIPH_PTCR_RXTEN | PERIPH_PTCR_TXTEN);
/* Wait for the end of the encryption process. */
while (false == state) {
}
if ((ref_cipher_text_ecb[0] != output_data[0]) ||
(ref_cipher_text_ecb[1] != output_data[1]) ||
(ref_cipher_text_ecb[2] != output_data[2]) ||
(ref_cipher_text_ecb[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- ECB decipher mode\r\n");
printf("- PDC mode\r\n");
printf("- input of 4 32bit words with PDC\r\n");
printf("-----------------------------------\r\n");
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_DECRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_IDATAR0_START;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Configure PDC for data transfer */
g_pdc_tx_packet.ul_addr = (uint32_t)ref_cipher_text_ecb;
/* Configure PDC for data receive & transfer */
pdc_tx_init(g_p_aes_pdc, &g_pdc_tx_packet, NULL);
pdc_rx_init(g_p_aes_pdc, &g_pdc_rx_packet, NULL);
/* Enable PDC transfers. */
pdc_enable_transfer(g_p_aes_pdc, PERIPH_PTCR_RXTEN | PERIPH_PTCR_TXTEN);
/* Wait for the end of the decryption process. */
while (false == state) {
}
/* check the result. */
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
}
/**
* \brief ECB mode encryption and decryption test with DMA.
*/
static void ecb_mode_test_dma(void)
{
/* Configure DMAC. */
configure_dmac();
/* Disable DMAC channel. */
dmac_channel_disable(DMAC, AES_DMA_TX_CH);
dmac_channel_disable(DMAC, AES_DMA_RX_CH);
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- ECB cipher mode\r\n");
printf("- DMA mode\r\n");
printf("- input of 4 32bit words with DMA\r\n");
printf("-----------------------------------\r\n");
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_IDATAR0_START;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Write the data to be ciphered by DMA. */
aes_dma_transmit_config(ref_plain_text, AES_EXAMPLE_REFBUF_SIZE);
aes_dma_receive_config(output_data, AES_EXAMPLE_REFBUF_SIZE);
/* Enable DMAC channel. */
dmac_channel_enable(DMAC, AES_DMA_RX_CH);
dmac_channel_enable(DMAC, AES_DMA_TX_CH);
/* Wait for the end of the encryption process. */
while (false == state) {
}
/* Disable DMAC channel. */
dmac_channel_disable(DMAC, AES_DMA_TX_CH);
dmac_channel_disable(DMAC, AES_DMA_RX_CH);
if ((ref_cipher_text_ecb[0] != output_data[0]) ||
(ref_cipher_text_ecb[1] != output_data[1]) ||
(ref_cipher_text_ecb[2] != output_data[2]) ||
(ref_cipher_text_ecb[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- ECB decipher mode\r\n");
printf("- DMA mode\r\n");
printf("- input of 4 32bit words with DMA\r\n");
printf("-----------------------------------\r\n");
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_DECRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_IDATAR0_START;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Write the data to be ciphered by DMA. */
aes_dma_transmit_config(ref_cipher_text_ecb, AES_EXAMPLE_REFBUF_SIZE);
aes_dma_receive_config(output_data, AES_EXAMPLE_REFBUF_SIZE);
/* Enable DMAC channel. */
dmac_channel_enable(DMAC, AES_DMA_RX_CH);
dmac_channel_enable(DMAC, AES_DMA_TX_CH);
/* Wait for the end of the decryption process. */
while (false == state) {
}
/* Disable DMAC channel. */
dmac_channel_disable(DMAC, AES_DMA_TX_CH);
dmac_channel_disable(DMAC, AES_DMA_RX_CH);
/* check the result. */
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
/* Disable DMAC module */
dmac_disable(DMAC);
}
/**
* \brief Test CBC mode encryption and decryption.
*
* \param test Current test case.
*/
static void run_cbc_mode_test(const struct test_case *test)
{
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_AUTO_MODE;
g_aes_cfg.opmode = AES_CBC_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* Set the initialization vector. */
aes_write_initvector(AES, init_vector);
/* Write the data to be ciphered to the input data registers. */
aes_write_input_data(AES, ref_plain_text);
/* Wait for the end of the encryption process. */
delay_ms(30);
if ((ref_cipher_text_cbc[0] != output_data[0]) ||
(ref_cipher_text_cbc[1] != output_data[1]) ||
(ref_cipher_text_cbc[2] != output_data[2]) ||
(ref_cipher_text_cbc[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "CBC mode encryption not work!");
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_DECRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_AUTO_MODE;
g_aes_cfg.opmode = AES_CBC_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* Set the initialization vector. */
aes_write_initvector(AES, init_vector);
/* Write the data to be deciphered to the input data registers. */
aes_write_input_data(AES, ref_cipher_text_cbc);
/* Wait for the end of the decryption process. */
delay_ms(30);
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "CBC mode decryption not work!");
}
/**
* \brief Test ECB mode encryption and decryption with DMA.
*
* \param test Current test case.
*/
static void run_ecb_mode_test_dma(const struct test_case *test)
{
/* Configure DMAC. */
configure_dmac();
/* Disable DMAC channel. */
dmac_channel_disable(DMAC, AES_DMA_TX_CH);
dmac_channel_disable(DMAC, AES_DMA_RX_CH);
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_DMA_MODE;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Write the data to be ciphered by DMA. */
aes_dma_transmit_config(ref_plain_text, AES_EXAMPLE_REFBUF_SIZE);
aes_dma_receive_config(output_data, AES_EXAMPLE_REFBUF_SIZE);
/* Enable DMAC channel. */
dmac_channel_enable(DMAC, AES_DMA_RX_CH);
dmac_channel_enable(DMAC, AES_DMA_TX_CH);
/* Wait for the end of the encryption process. */
delay_ms(30);
/* Disable DMAC channel. */
dmac_channel_disable(DMAC, AES_DMA_TX_CH);
dmac_channel_disable(DMAC, AES_DMA_RX_CH);
if ((ref_cipher_text_ecb[0] != output_data[0]) ||
(ref_cipher_text_ecb[1] != output_data[1]) ||
(ref_cipher_text_ecb[2] != output_data[2]) ||
(ref_cipher_text_ecb[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "ECB mode encryption not work!");
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_DECRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_DMA_MODE;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Write the data to be ciphered by DMA. */
aes_dma_transmit_config(ref_cipher_text_ecb, AES_EXAMPLE_REFBUF_SIZE);
aes_dma_receive_config(output_data, AES_EXAMPLE_REFBUF_SIZE);
/* Enable DMAC channel. */
dmac_channel_enable(DMAC, AES_DMA_RX_CH);
dmac_channel_enable(DMAC, AES_DMA_TX_CH);
/* Wait for the end of the decryption process. */
delay_ms(30);
/* Disable DMAC channel. */
dmac_channel_disable(DMAC, AES_DMA_TX_CH);
dmac_channel_disable(DMAC, AES_DMA_RX_CH);
/* check the result. */
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "ECB mode decryption not work!");
/* Disable DMAC module */
dmac_disable(DMAC);
}
/**
* \brief GCM mode decryption test.
*/
static void gcm_mode_decryption_test(void)
{
printf("\r\n-----------------------------------\r\n");
printf("- 256bit cryptographic key\r\n");
printf("- GCM Decryption\r\n");
printf("- Auto start mode\r\n");
printf("- input of 160-bit effective words\r\n");
printf("-----------------------------------\r\n");
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_DECRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_256;
g_aes_cfg.start_mode = AES_AUTO_START;
g_aes_cfg.opmode = AES_GCM_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
g_aes_cfg.gtag_en = false;
aes_set_config(AES, &g_aes_cfg);
/* AES-GCM Input Configuration */
gcm_input_data.key = aes_key;
gcm_input_data.key_len = AES_KEY_SIZE;
gcm_input_data.iv = aes_iv;
gcm_input_data.iv_len = AES_IV_SIZE;
gcm_input_data.input = aes_cipher_text;
gcm_input_data.text_len = AES_PDATA_EFFECTIVE_SIZE;
gcm_input_data.aad = aes_aad;
gcm_input_data.aad_len = AES_AAD_EFFECTIVE_SIZE;
gcm_input_data.output = output_data;
gcm_input_data.tag = tag_data;
/* Write the key to generate GCMH Subkey */
aes_write_key(AES, gcm_input_data.key);
/* Wait for the GCMH to generate */
while (!(aes_read_interrupt_status(AES) & AES_ISR_DATRDY)) {
}
/* Generate J0 using IV(96 Bits) */
uint32_t i;
/* J0 data array */
uint32_t j0[4];
for (i = 0; i < 3; i++) {
j0[i] = gcm_input_data.iv[i];
}
/* Write the j0 + 1 in IV register */
j0[3] = 0x02000000;
aes_write_initvector(AES, (uint32_t *)j0);
/* set AADLEN */
aes_write_authen_datalength(AES, gcm_input_data.aad_len);
/* Set CLEN */
aes_write_pctext_length(AES, gcm_input_data.text_len);
/* Write AAD Data for TAG generation */
uint32_t offset = 0;
for (i = 0; i < (AES_AAD_SIZE / 4); i++) {
/* write the input data */
aes_write_input_data(AES, (gcm_input_data.aad + offset));
/* Wait till TAG is ready */
while (!(aes_read_interrupt_status(AES) & AES_ISR_DATRDY)) {
}
/* 16-Byte Boundaries */
offset += 4;
}
/* Reset offset to zero */
offset = 0;
/* Write plain text for cipher text generation */
for (i = 0; i < (AES_PDATA_SIZE / 4); i++) {
/* write the input data */
aes_write_input_data(AES, (gcm_input_data.input + offset));
/* Wait for the operation to complete */
while (!(aes_read_interrupt_status(AES) & AES_ISR_DATRDY)) {
}
aes_read_output_data(AES,
(uint32_t *)(gcm_input_data.output + offset));
offset += 4;
}
if (memcmp(output_data, aes_plain_text,
AES_PDATA_EFFECTIVE_SIZE) != 0) {
printf("\n\rDEC COMPARE FAILED! ");
} else {
printf("\n\rDEC COMPARE SUCCESS! ");
}
}
/**
* \brief ECB mode encryption and decryption test.
*/
static void ecb_mode_test(void)
{
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- ECB cipher mode\r\n");
printf("- Auto start mode\r\n");
printf("- 4 32bit words\r\n");
printf("-----------------------------------\r\n");
//! [encryption_mode]
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_AUTO_START;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(&aes_instance,AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(&aes_instance, key128);
/* The initialization vector is not used by the ECB cipher mode. */
aes_set_new_message(&aes_instance);
/* Write the data to be ciphered to the input data registers. */
aes_write_input_data(&aes_instance, ref_plain_text);
aes_clear_new_message(&aes_instance);
/* Wait for the end of the encryption process. */
while (!(aes_get_status(&aes_instance) & AES_ENCRYPTION_COMPLETE)) {
}
aes_read_output_data(&aes_instance,output_data);
if ((ref_cipher_text_ecb[0] != output_data[0]) ||
(ref_cipher_text_ecb[1] != output_data[1]) ||
(ref_cipher_text_ecb[2] != output_data[2]) ||
(ref_cipher_text_ecb[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
//! [encryption_mode]
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- ECB decipher mode\r\n");
printf("- Auto start mode\r\n");
printf("- 4 32bit words\r\n");
printf("-----------------------------------\r\n");
//! [decryption_mode]
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_DECRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_AUTO_START;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(&aes_instance,AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(&aes_instance, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Write the data to be deciphered to the input data registers. */
aes_write_input_data(&aes_instance, ref_cipher_text_ecb);
/* Wait for the end of the decryption process. */
while (!(aes_get_status(&aes_instance) & AES_ENCRYPTION_COMPLETE)) {
}
aes_read_output_data(&aes_instance,output_data);
/* check the result. */
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
//! [decryption_mode]
}
