/* *---------------------------------------------------------------------------- * Function : tiload_write * * Purpose : write method for aic3262_tiload programming interface *---------------------------------------------------------------------------- */ static ssize_t tiload_write(struct file *file, const char __user * buf, size_t count, loff_t * offset) { static char wr_data[8]; u8 pg_no; #ifdef DEBUG int i; #endif struct aic3262_priv *aic3262_private = snd_soc_codec_get_drvdata(aic3262_codec); struct snd_soc_codec *codec = aic3262_codec; dprintk("TiLoad DRIVER : %s\n", __FUNCTION__); printk("TiLoad DRIVER : %s\n", __FUNCTION__); /* copy buffer from user space */ if (copy_from_user(wr_data, buf, count)) { printk("copy_from_user failure\n"); return -1; } #ifdef DEBUG printk(KERN_ERR "write size = %d\n", (int)count); for (i = 0; i < (int)count; i++) { printk(KERN_INFO "\nwr_data[%d]=%x\n", i, wr_data[i]); } #endif if (wr_data[0] == 0) { aic3262_change_page(aic3262_codec, wr_data[1]); return count; } pg_no = aic3262_private->page_no; if ((wr_data[0] == 127) && (pg_no == 0)) { aic3262_change_book(aic3262_codec, wr_data[1]); return count; } if(aic3262_private->bus_type == SND_SOC_SPI) { return codec->hw_write(codec->control_data, wr_data, count); } else { return i2c_master_send(codec->control_data, wr_data, count); } }
/* *---------------------------------------------------------------------------- * Function : aic3262_dump_page * Purpose : Read and display one codec register page, for debugging purpose *---------------------------------------------------------------------------- */ static void aic3262_dump_page(struct snd_soc_codec *codec, u8 page) { int i; u8 data; u8 test_page_array[128]; struct aic3262_priv *aic3262 = snd_soc_codec_get_drvdata(codec); dprintk("TiLoad DRIVER : %s\n", __FUNCTION__); aic3262_change_page(codec, page); if(aic3262->bus_type == SND_SOC_SPI) { data = 0x01; spi_write_then_read(codec->control_data,&data,1,test_page_array,127); } else { data = 0x0; i2c_master_send(codec->control_data, data, 1); i2c_master_recv(codec->control_data, test_page_array, 8); } printk("\n------- aic3262 PAGE %d DUMP --------\n", page); for (i = 0; i < 8; i++) { printk(" [ %d ] = 0x%x\n", i, test_page_array[i]); } }
/* *-------------------------------------------------------------------------- * Function : config_multibyte_for_mode * Purpose : Function which is invoked when user changes the configuration * at run-time. Internally configures/switches both * miniDSP_D and miniDSP_A Coefficient arrays. *--------------------------------------------------------------------------- */ static int multibyte_coeff_change(struct snd_soc_codec *codec, int bk) { u8 value, swap_reg_pre, swap_reg_post; struct aic3262_priv *aic3262 = snd_soc_codec_get_drvdata(codec); DBG(KERN_INFO "%s : entered\n",__func__); #if 0 mutex_lock(&codec_io_mutex); aic3262_change_book(codec, bk); aic3262_change_page(codec, 0); mutex_unlock(&codec_io_mutex); if(aic3262->bus_type == SND_SOC_SPI) { /* Read the Value of the Book bk Page 0 Register 1 which controls the Adaptive Switching Mode */ mutex_lock(&codec_io_mutex); value[0] = codec->hw_read(codec,1); mutex_unlock(&codec_io_mutex); if( value[0] < 0) { printk(KERN_ERR "Cannot read the codec register\n"); goto err; } else { swap_reg_pre = value[0]; /* Write the Register bit updates */ value[1] = value[0] | 1; value[0] = 1; mutex_lock(&codec_io_mutex); codec->hw_write(codec->control_data,value,2); mutex_unlock(&codec_io_mutex); /*before verifying for buffer_swap, make sure we give one frame delay, because the buffer swap happens at the end of the frame */ mdelay(5); /* verify buffer swap */ mutex_lock(&codec_io_mutex); swap_reg_post = codec->hw_read(codec,1); mutex_unlock(&codec_io_mutex); if(swap_reg_post < 0) { printk(KERN_ERR "cannot read the codec register\n"); goto err; } if ((swap_reg_pre == 4 && swap_reg_post == 6) || (swap_reg_pre == 6 && swap_reg_post == 4)) printk(KERN_INFO "Buffer swap success\n"); else printk(KERN_ERR "Buffer swap...FAILED\nswap_reg_pre=%x, swap_reg_post=%x\n", swap_reg_pre, swap_reg_post); mutex_lock(&codec_io_mutex); aic3262_change_book(codec, 0x00); mutex_unlock(&codec_io_mutex); } } else { value[0] = 1; mutex_lock(&codec_io_mutex); if (i2c_master_send(codec->control_data, value, 1) != 1) { mutex_unlock(&codec_io_mutex); printk(KERN_ERR "Can not write register address\n"); } else { /* Read the Value of the Page 8 Register 1 which controls the Adaptive Switching Mode */ if (i2c_master_recv(codec->control_data, value, 1) != 1) { printk(KERN_ERR "Can not read codec registers\n"); mutex_unlock(&codec_io_mutex); goto err; } mutex_unlock(&codec_io_mutex); swap_reg_pre = value[0]; /* Write the Register bit updates */ value[1] = value[0] | 1; value[0] = 1; mutex_lock(&codec_io_mutex); if (i2c_master_send(codec->control_data, value, 2) != 2) { printk(KERN_ERR "Can not write register address\n"); mutex_unlock(&codec_io_mutex); goto err; } mutex_unlock(&codec_io_mutex); /*before verifying for buffer_swap, make sure we give one frame delay, because the buffer swap happens at the end of the frame */ mdelay(5); value[0] = 1; /* verify buffer swap */ mutex_lock(&codec_io_mutex); if (i2c_master_send(codec->control_data, value, 1) != 1) { printk(KERN_ERR "Can not write register address\n"); } mutex_unlock(&codec_io_mutex); /* Read the Value of the Page 8 Register 1 which controls the Adaptive Switching Mode */ mutex_lock(&codec_io_mutex); if (i2c_master_recv(codec->control_data, &swap_reg_post, 1) != 1) { printk(KERN_ERR "Can not read codec registers\n"); } mutex_unlock(&codec_io_mutex); if ((swap_reg_pre == 4 && swap_reg_post == 6) || (swap_reg_pre == 6 && swap_reg_post == 4)) printk(KERN_INFO "Buffer swap success\n"); else printk(KERN_ERR "Buffer swap...FAILED\nswap_reg_pre=%x, swap_reg_post=%x\n", swap_reg_pre, swap_reg_post); mutex_lock(&codec_io_mutex); aic3262_change_book(codec, 0x00); mutex_unlock(&codec_io_mutex); } } #endif u8 reg =0x01; value=dsp_reg_read(codec,bk,reg); swap_reg_pre =value; value= value |1; dsp_reg_write(codec,bk,reg,value); mdelay(50); swap_reg_post=dsp_reg_read(codec,bk,reg); if((swap_reg_pre == 4 && swap_reg_post == 6) ||(swap_reg_pre == 6 && swap_reg_post == 4)) { printk( "Buffer swap success\n"); } else{ printk(KERN_ERR "Buffer swap...FAILED\nswap_reg_pre=%x, swap_reg_post=%x\n", swap_reg_pre, swap_reg_post); } err: return 0; }