void
dec_550_intr_disestablish(void *ccv, void *cookie)
{
struct cia_config *ccp = ccv;
struct alpha_shared_intrhand *ih = cookie;
unsigned int irq = ih->ih_num;
int s;
#if NSIO
/*
* We have to determine if this is an ISA IRQ or not! We do this
* by checking to see if the intrhand points back to an intrhead
* that points to our cia_config. If not, it's an ISA IRQ. Pretty
* disgusting, eh?
*/
if (ih->ih_intrhead->intr_private != ccp) {
sio_intr_disestablish(NULL /*XXX*/, cookie);
return;
}
#endif
s = splhigh();
alpha_shared_intr_disestablish(dec_550_pci_intr, cookie,
"dec 550 irq");
if (alpha_shared_intr_isactive(dec_550_pci_intr, irq) == 0) {
dec_550_intr_disable(irq);
alpha_shared_intr_set_dfltsharetype(dec_550_pci_intr, irq,
IST_NONE);
scb_free(0x900 + SCB_IDXTOVEC(irq));
}
splx(s);
}
void
jensenio_eisa_intr_disestablish(void *v, void *cookie)
{
struct alpha_shared_intrhand *ih = cookie;
int s, irq = ih->ih_num;
s = splhigh();
/* Remove it from the link. */
alpha_shared_intr_disestablish(jensenio_eisa_intr, cookie,
"eisa irq");
if (JENSEN_IRQ_IS_EISA(irq) == 0) {
splx(s);
return;
}
if (alpha_shared_intr_isactive(jensenio_eisa_intr, irq) == 0) {
jensenio_enable_intr(irq, 0);
alpha_shared_intr_set_dfltsharetype(jensenio_eisa_intr,
irq, jensenio_intr_deftype[irq]);
}
splx(s);
}
void
jensenio_intr_init(struct jensenio_config *jcp)
{
eisa_chipset_tag_t ec = &jcp->jc_ec;
isa_chipset_tag_t ic = &jcp->jc_ic;
char *cp;
int i;
pic_iot = &jcp->jc_eisa_iot;
jensenio_pic_init();
jensenio_eisa_intr = alpha_shared_intr_alloc(JENSEN_MAX_IRQ, 16);
for (i = 0; i < JENSEN_MAX_IRQ; i++) {
alpha_shared_intr_set_dfltsharetype(jensenio_eisa_intr,
i, jensenio_intr_deftype[i]);
/* Don't bother with stray interrupts. */
alpha_shared_intr_set_maxstrays(jensenio_eisa_intr,
i, 0);
cp = alpha_shared_intr_string(jensenio_eisa_intr, i);
sprintf(cp, "irq %d", i);
evcnt_attach_dynamic(alpha_shared_intr_evcnt(
jensenio_eisa_intr, i), EVCNT_TYPE_INTR,
NULL, "eisa", cp);
}
/*
* The cascasde interrupt must be edge triggered and always enabled.
*/
jensenio_setlevel(2, 0);
jensenio_enable_intr(2, 1);
/*
* Initialize the EISA chipset.
*/
ec->ec_v = jcp;
ec->ec_intr_map = jensenio_eisa_intr_map;
ec->ec_intr_string = jensenio_eisa_intr_string;
ec->ec_intr_evcnt = jensenio_eisa_intr_evcnt;
ec->ec_intr_establish = jensenio_eisa_intr_establish;
ec->ec_intr_disestablish = jensenio_eisa_intr_disestablish;
/*
* Initialize the ISA chipset.
*/
ic->ic_v = jcp;
ic->ic_intr_establish = jensenio_eisa_intr_establish;
ic->ic_intr_disestablish = jensenio_eisa_intr_disestablish;
ic->ic_intr_alloc = jensenio_eisa_intr_alloc;
ic->ic_intr_evcnt = jensenio_eisa_intr_evcnt;
}
void
sio_intr_disestablish(void *v, void *cookie)
{
struct alpha_shared_intrhand *ih = cookie;
int s, ist, irq = ih->ih_num;
s = splhigh();
/* Remove it from the link. */
alpha_shared_intr_disestablish(sio_intr, cookie, "isa irq");
/*
* Decide if we should disable the interrupt. We must ensure
* that:
*
* - An initially-enabled interrupt is never disabled.
* - An initially-LT interrupt is never untyped.
*/
if (alpha_shared_intr_isactive(sio_intr, irq) == 0) {
/*
* IRQs 0, 1, 8, and 13 must always be edge-triggered
* (see setup).
*/
switch (irq) {
case 0:
case 1:
case 8:
case 13:
/*
* If the interrupt was initially level-triggered
* a warning was printed in setup.
*/
ist = IST_EDGE;
break;
default:
ist = IST_NONE;
break;
}
sio_setirqstat(irq, 0, ist);
alpha_shared_intr_set_dfltsharetype(sio_intr, irq, ist);
/* Release our SCB vector. */
scb_free(0x800 + SCB_IDXTOVEC(irq));
}
splx(s);
}
void
dec_eb66_intr_disestablish(void *lcv, void *cookie)
{
struct alpha_shared_intrhand *ih = cookie;
unsigned int irq = ih->ih_num;
int s;
s = splhigh();
alpha_shared_intr_disestablish(eb66_pci_intr, cookie,
"eb66 irq");
if (alpha_shared_intr_isactive(eb66_pci_intr, irq) == 0) {
eb66_intr_disable(irq);
alpha_shared_intr_set_dfltsharetype(eb66_pci_intr, irq,
IST_NONE);
scb_free(0x900 + SCB_IDXTOVEC(irq));
}
splx(s);
}
void
jensenio_eisa_intr_disestablish(void *v, void *cookie)
{
struct alpha_shared_intrhand *ih = cookie;
int s, irq = ih->ih_num;
s = splhigh();
/* Remove it from the link. */
alpha_shared_intr_disestablish(jensenio_eisa_intr, cookie,
"eisa irq");
if (alpha_shared_intr_isactive(jensenio_eisa_intr, irq) == 0) {
jensenio_enable_intr(irq, 0);
alpha_shared_intr_set_dfltsharetype(jensenio_eisa_intr,
irq, jensenio_intr_deftype[irq]);
scb_free(0x800 + SCB_IDXTOVEC(irq));
}
splx(s);
}
void
sio_intr_setup(pci_chipset_tag_t pc, bus_space_tag_t iot)
{
char *cp;
int i;
sio_iot = iot;
sio_pc = pc;
if (bus_space_map(sio_iot, IO_ICU1, 2, 0, &sio_ioh_icu1) ||
bus_space_map(sio_iot, IO_ICU2, 2, 0, &sio_ioh_icu2))
panic("sio_intr_setup: can't map ICU I/O ports");
for (i = 0; sio_elcr_setup_funcs[i] != NULL; i++)
if ((*sio_elcr_setup_funcs[i])() == 0)
break;
if (sio_elcr_setup_funcs[i] == NULL)
panic("sio_intr_setup: can't map ELCR");
#ifdef BROKEN_PROM_CONSOLE
/*
* Remember the initial values, so we can restore them later.
*/
initial_ocw1[0] = bus_space_read_1(sio_iot, sio_ioh_icu1, 1);
initial_ocw1[1] = bus_space_read_1(sio_iot, sio_ioh_icu2, 1);
initial_elcr[0] = (*sio_read_elcr)(0); /* XXX */
initial_elcr[1] = (*sio_read_elcr)(1); /* XXX */
shutdownhook_establish(sio_intr_shutdown, 0);
#endif
#define PCI_SIO_IRQ_STR 8
sio_intr = alpha_shared_intr_alloc(ICU_LEN, PCI_SIO_IRQ_STR);
/*
* set up initial values for interrupt enables.
*/
for (i = 0; i < ICU_LEN; i++) {
alpha_shared_intr_set_maxstrays(sio_intr, i, STRAY_MAX);
cp = alpha_shared_intr_string(sio_intr, i);
snprintf(cp, PCI_SIO_IRQ_STR, "irq %d", i);
evcnt_attach_dynamic(alpha_shared_intr_evcnt(sio_intr, i),
EVCNT_TYPE_INTR, NULL, "isa", cp);
switch (i) {
case 0:
case 1:
case 8:
case 13:
/*
* IRQs 0, 1, 8, and 13 must always be
* edge-triggered.
*/
sio_setirqstat(i, 0, IST_EDGE);
alpha_shared_intr_set_dfltsharetype(sio_intr, i,
IST_EDGE);
specific_eoi(i);
break;
case 2:
/*
* IRQ 2 must be edge-triggered, and should be
* enabled (otherwise IRQs 8-15 are ignored).
*/
sio_setirqstat(i, 1, IST_EDGE);
alpha_shared_intr_set_dfltsharetype(sio_intr, i,
IST_UNUSABLE);
break;
default:
/*
* Otherwise, disable the IRQ and set its
* type to (effectively) "unknown."
*/
sio_setirqstat(i, 0, IST_NONE);
alpha_shared_intr_set_dfltsharetype(sio_intr, i,
IST_NONE);
specific_eoi(i);
break;
}
}
}
