static void bi_nand(void) { /* Samsung 256MB SLC Flash */ /* Setup Static Memory Controller */ at91_smc_setup(0, 3, &nand_smc); at91_enable_nand(&nand_param); /* * This assumes * - RNB is on pin PC13 * - CE is on pin PC14 * * Nothing actually uses RNB right now. * * For CE, this currently asserts it during board setup and leaves it * that way forever. * * All this can go away when the gpio pin-renumbering happens... */ at91_pio_use_gpio(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC13 | AT91C_PIO_PC14); at91_pio_gpio_input(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC13); /* RNB */ at91_pio_gpio_output(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC14, 0); /* nCS */ at91_pio_gpio_clear(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC14); /* Assert nCS */ }
BOARD_INIT long board_init(void) { at91rm9200_set_subtype(AT91_ST_RM9200_PQFP); at91rm9200_config_uart(AT91_ID_DBGU, 0, 0); /* DBGU just Tx and Rx */ at91rm9200_config_uart(AT91RM9200_ID_USART0, 1, 0); /* Tx and Rx */ at91rm9200_config_uart(AT91RM9200_ID_USART1, 2, 0); /* Tx and Rx */ at91rm9200_config_uart(AT91RM9200_ID_USART2, 3, 0); /* Tx and Rx */ at91rm9200_config_uart(AT91RM9200_ID_USART3, 4, 0); /* Tx and Rx */ at91rm9200_config_mci(0); /* tsc4370 board has only 1 wire */ /* Newer boards may have 4 wires */ /* Configure TWI */ /* Configure SPI + dataflash */ /* Configure SSC */ /* Configure USB Host */ /* Configure FPGA attached to chip selects */ /* Pin assignment */ /* Assert PA24 low -- talk to rubidium */ at91_pio_use_gpio(AT91RM92_PIOA_BASE, AT91C_PIO_PA24); at91_pio_gpio_output(AT91RM92_PIOA_BASE, AT91C_PIO_PA24, 0); at91_pio_gpio_clear(AT91RM92_PIOA_BASE, AT91C_PIO_PA24); at91_pio_use_gpio(AT91RM92_PIOB_BASE, AT91C_PIO_PB16 | AT91C_PIO_PB17 | AT91C_PIO_PB18 | AT91C_PIO_PB19); return (at91_ramsize()); }
static void at91_udp_pull_down(void *arg) { at91_pio_gpio_clear(PULLUP_BASE, PULLUP_MASK); }