BOARD_INIT long
board_init(void)
{
at91rm9200_set_subtype(AT91_ST_RM9200_BGA);
/*
* Setup the serial ports.
* DBGU and USART0 are DB9 ports.
* USART2 is IrDA.
*/
at91rm9200_config_uart(AT91_ID_DBGU, 0, 0); /* DBGU just Tx and Rx */
at91rm9200_config_uart(AT91RM9200_ID_USART0, 1,
AT91_UART_CTS | AT91_UART_RTS | AT91_UART_DTR | AT91_UART_DSR |
AT91_UART_DCD | AT91_UART_RI);
at91rm9200_config_uart(AT91RM9200_ID_USART1, 2, 0);
at91rm9200_config_mci(1);
/* CFE interface */
/* SPI interface */
/* ethernet interface */
/* USB host */
/* USB device (gadget) */
/* TWI */
/* CF interface */
/* SmartMedia Interface */
return (at91_ramsize());
}
BOARD_INIT long
board_init(void)
{
at91rm9200_set_subtype(AT91_ST_RM9200_PQFP);
at91rm9200_config_uart(AT91_ID_DBGU, 0, 0); /* DBGU just Tx and Rx */
at91rm9200_config_uart(AT91RM9200_ID_USART0, 1, 0); /* Tx and Rx */
at91rm9200_config_uart(AT91RM9200_ID_USART1, 2, 0); /* Tx and Rx */
at91rm9200_config_uart(AT91RM9200_ID_USART2, 3, 0); /* Tx and Rx */
at91rm9200_config_uart(AT91RM9200_ID_USART3, 4, 0); /* Tx and Rx */
at91rm9200_config_mci(0); /* tsc4370 board has only 1 wire */
/* Newer boards may have 4 wires */
/* Configure TWI */
/* Configure SPI + dataflash */
/* Configure SSC */
/* Configure USB Host */
/* Configure FPGA attached to chip selects */
/* Pin assignment */
/* Assert PA24 low -- talk to rubidium */
at91_pio_use_gpio(AT91RM92_PIOA_BASE, AT91C_PIO_PA24);
at91_pio_gpio_output(AT91RM92_PIOA_BASE, AT91C_PIO_PA24, 0);
at91_pio_gpio_clear(AT91RM92_PIOA_BASE, AT91C_PIO_PA24);
at91_pio_use_gpio(AT91RM92_PIOB_BASE,
AT91C_PIO_PB16 | AT91C_PIO_PB17 | AT91C_PIO_PB18 | AT91C_PIO_PB19);
return (at91_ramsize());
}
BOARD_INIT long
board_init(void)
{
at91rm9200_set_subtype(AT91_ST_RM9200_BGA);
/*
* Unsure what all is in the HOTe HL200, but I do know there's
* one serial port that isn't DBGU. There's many other peripherals
* that need to be configured here.
*/
at91rm9200_config_uart(AT91_ID_DBGU, 0, 0); /* DBGU just Tx and Rx */
at91rm9200_config_uart(AT91RM9200_ID_USART0, 1, 0); /* Tx and Rx */
at91rm9200_config_mci(0); /* HOTe HL200 unknown 1 vs 4 wire */
/* Enable CF card slot */
/* Enable sound thing */
/* Enable VGA chip */
/* Enable ethernet */
/* Enable TWI + RTC */
/* Enable USB Host */
/* Enable USB Device (gadget) */
return (at91_ramsize());
}
BOARD_INIT long
board_init(void)
{
int is_bga, rev_mii;
/*
* Deal with bootinfo (if any) passed in from the boot2 bootloader and
* copied to the static inkernel_bootinfo earlier in the init. Do this
* early so that bootverbose is set from this point on.
*/
if (inkernel_bootinfo.bi_size > 0 &&
(inkernel_bootinfo.bi_flags & RB_BOOTINFO)) {
struct tsc_bootinfo *bip = &inkernel_bootinfo;
printf("TSC_BOOTINFO: size %u howtoflags=0x%08x rootdev='%s'\n",
bip->bi_size, bip->bi_flags, bip->bi_rootdevname);
boothowto = bip->bi_flags;
bootverbose = (boothowto & RB_VERBOSE);
if (bip->bi_rootdevname[0] != 0)
rootdevnames[0] = bip->bi_rootdevname;
}
/*
* The only way to know if we're in a BGA package (and thus have PIOD)
* is to be told via a hint; there's nothing detectable in the silicon.
* This is esentially an rm92-specific extension to getting the chip ID
* (which was done by at91_machdep just before calling this routine).
* If it is the BGA package, enable the clock for PIOD.
*/
is_bga = 0;
resource_int_value("at91", 0, "is_bga_package", &is_bga);
if (is_bga)
WR4HW(AT91RM92_PMC_BASE, PMC_PCER, 1u << AT91RM92_IRQ_PIOD);
#if __FreeBSD_version >= 1000000
at91rm9200_set_subtype(is_bga ? AT91_ST_RM9200_BGA :
AT91_ST_RM9200_PQFP);
#endif
/*
* Go reprogram the MCK frequency based on hints.
*/
master_clock_init();
/*
* Configure UARTs.
*/
at91rm9200_config_uart(AT91_ID_DBGU, 0, 0); /* DBGU just Tx and Rx */
at91rm9200_config_uart(AT91RM9200_ID_USART0, 1, 0); /* Tx and Rx */
at91rm9200_config_uart(AT91RM9200_ID_USART1, 2, 0); /* Tx and Rx */
at91rm9200_config_uart(AT91RM9200_ID_USART2, 3, 0); /* Tx and Rx */
at91rm9200_config_uart(AT91RM9200_ID_USART3, 4, 0); /* Tx and Rx */
/*
* Configure MCI (sdcard)
*/
at91rm9200_config_mci(0);
/*
* Assign the pins needed by the emac device, and power it up. Also,
* configure it for RMII operation unless the 'revmii_mode' hint is set,
* in which case configure the full set of MII pins. The revmii_mode
* hint is for so-called reverse-MII, used for connections to a Broadcom
* 5325E switch on some boards. Note that order is important here:
* configure pins, then power on the device, then access the device's
* config registers.
*/
rev_mii = 0;
resource_int_value("ate", 0, "phy_revmii_mode", &rev_mii);
at91_pio_use_periph_a(AT91RM92_PIOA_BASE,
AT91C_PIO_PA7 | AT91C_PIO_PA8 | AT91C_PIO_PA9 |
AT91C_PIO_PA10 | AT91C_PIO_PA11 | AT91C_PIO_PA12 |
AT91C_PIO_PA13 | AT91C_PIO_PA14 | AT91C_PIO_PA15 |
AT91C_PIO_PA16, 0);
if (rev_mii) {
at91_pio_use_periph_b(AT91RM92_PIOB_BASE,
AT91C_PIO_PB12 | AT91C_PIO_PB13 | AT91C_PIO_PB14 |
AT91C_PIO_PB15 | AT91C_PIO_PB16 | AT91C_PIO_PB17 |
AT91C_PIO_PB18 | AT91C_PIO_PB19, 0);
}
WR4HW(AT91RM92_PMC_BASE, PMC_PCER, 1u << AT91RM92_IRQ_EMAC);
if (!rev_mii) {
WR4HW(AT91RM92_EMAC_BASE, ETH_CFG,
RD4HW(AT91RM92_EMAC_BASE, ETH_CFG) | ETH_CFG_RMII);
}
/*
* Get our ethernet MAC address from the ID eeprom.
* Configures TWI as a side effect.
*/
set_mac_from_idprom();
/*
* Configure SPI
*/
assign_spi_pins();
/*
* Configure SSC
*/
at91_pio_use_periph_a(
AT91RM92_PIOB_BASE,
AT91C_PIO_PB6 | AT91C_PIO_PB7 | AT91C_PIO_PB8 | /* transmit */
AT91C_PIO_PB9 | AT91C_PIO_PB10 | AT91C_PIO_PB11, /* receive */
0); /* no pullup */
/*
* We're using TC1's A1 input for PPS measurements that drive the
* kernel PLL and our NTP refclock. On some old boards we route a 5mhz
* signal to TC1's A2 input (pin PA21), but we have never used that
* clock (it rolls over too fast for hz=100), and now newer boards are
* using pin PA21 as a CTS0 for USART1, so we no longer assign it to
* the timer block like we used to here.
*/
at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PIO_PA19, 0);
/*
* Configure pins used to bitbang-upload the firmware to the main FPGA.
*/
at91_pio_use_gpio(AT91RM92_PIOB_BASE,
AT91C_PIO_PB16 | AT91C_PIO_PB17 | AT91C_PIO_PB18 | AT91C_PIO_PB19);
return (at91_ramsize());
}