예제 #1
0
파일: dev-usb.c 프로젝트: 0-T-0/ps4-linux
static void __init ar934x_usb_setup(void)
{
	u32 bootstrap;

	bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
	if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE)
		return;

	ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE);
	udelay(1000);

	ath79_device_reset_clear(AR934X_RESET_USB_PHY);
	udelay(1000);

	ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG);
	udelay(1000);

	ath79_device_reset_clear(AR934X_RESET_USB_HOST);
	udelay(1000);

	ath79_usb_register("ehci-platform", -1,
			   AR934X_EHCI_BASE, AR934X_EHCI_SIZE,
			   ATH79_CPU_IRQ(3),
			   &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
}
예제 #2
0
static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc)
{
	u32 status;

	disable_irq_nosync(irq);

	status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS);
	status &= QCA955X_EXT_INT_PCIE_RC2_ALL |
		  QCA955X_EXT_INT_USB1 |
		  QCA955X_EXT_INT_USB2;

	if (status == 0) {
		spurious_interrupt();
		goto enable;
	}

	if (status & QCA955X_EXT_INT_USB1) {
		/* TODO: flush DDR? */
		generic_handle_irq(ATH79_IP3_IRQ(0));
	}

	if (status & QCA955X_EXT_INT_USB2) {
		/* TODO: flush DDR? */
		generic_handle_irq(ATH79_IP3_IRQ(1));
	}

	if (status & QCA955X_EXT_INT_PCIE_RC2_ALL) {
		/* TODO: flush DDR? */
		generic_handle_irq(ATH79_IP3_IRQ(2));
	}

enable:
	enable_irq(irq);
}
예제 #3
0
static inline void ath79_wdt_enable(void)
{
	ath79_wdt_keepalive();
	ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_FCR);
	/* flush write */
	ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
}
예제 #4
0
파일: dev-usb.c 프로젝트: AllenDou/linux
static void __init ar934x_usb_setup(void)
{
	u32 bootstrap;

	bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
	if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE)
		return;

	ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE);
	udelay(1000);

	ath79_device_reset_clear(AR934X_RESET_USB_PHY);
	udelay(1000);

	ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG);
	udelay(1000);

	ath79_device_reset_clear(AR934X_RESET_USB_HOST);
	udelay(1000);

	ath79_usb_init_resource(ath79_ehci_resources, AR934X_EHCI_BASE,
				AR934X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
	ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
	platform_device_register(&ath79_ehci_device);
}
void ath79_device_reset_clear(u32 mask)
{
	unsigned long flags;
	u32 reg;
	u32 t;

	if (soc_is_ar71xx())
		reg = AR71XX_RESET_REG_RESET_MODULE;
	else if (soc_is_ar724x())
		reg = AR724X_RESET_REG_RESET_MODULE;
	else if (soc_is_ar913x())
		reg = AR913X_RESET_REG_RESET_MODULE;
	else if (soc_is_ar933x())
		reg = AR933X_RESET_REG_RESET_MODULE;
	else if (soc_is_ar934x())
		reg = AR934X_RESET_REG_RESET_MODULE;
	else if (soc_is_qca953x())
		reg = QCA953X_RESET_REG_RESET_MODULE;
	else if (soc_is_qca955x())
		reg = QCA955X_RESET_REG_RESET_MODULE;
	else
		panic("Reset register not defined for this SOC");

	spin_lock_irqsave(&ath79_device_reset_lock, flags);
	t = ath79_reset_rr(reg);
	ath79_reset_wr(reg, t & ~mask);
	spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
}
예제 #6
0
static void __init ds_setup(void)
{
#ifdef DS2_PREV_RESET_PIN
	u32 t;
#endif
	ds_common_setup();

	ath79_register_leds_gpio(-1, ARRAY_SIZE(ds_leds_gpio),
				 ds_leds_gpio);
	ath79_register_gpio_keys_polled(-1, DS_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(ds_gpio_keys),
					ds_gpio_keys);
	ath79_register_usb();

	//Disable the Function for some pins to have GPIO functionality active
	// GPIO6-7-8 and GPIO11
	ath79_gpio_function_setup(AR933X_GPIO_FUNC_JTAG_DISABLE | AR933X_GPIO_FUNC_I2S_MCK_EN, 0);

	ath79_gpio_function2_setup(AR933X_GPIO_FUNC2_JUMPSTART_DISABLE, 0);

	printk("Setting DogStick2 GPIO\n");
#ifdef DS2_PREV_RESET_PIN
	t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
	t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN;
	ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t);
        
	// Put the avr reset to high 
	if (gpio_request_one(DS_GPIO_AVR_RESET_DS2,
                 GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
                 "OE-1") != 0)
                printk("Error setting GPIO OE\n");
	gpio_unexport(DS_GPIO_AVR_RESET_DS2);
	gpio_free(DS_GPIO_AVR_RESET_DS2);
#endif

	// enable OE of level shifter
	if (gpio_request_one(DS_GPIO_OE,
		 GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
		 "OE-1") != 0)
		printk("Error setting GPIO OE\n");

#ifdef DS1
	if (gpio_request_one(DS_GPIO_OE2,
		 GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
		 "OE-2") != 0)
		printk("Error setting GPIO OE2\n");
#else
        if (gpio_request_one(DS_GPIO_UART_ENA,
                 GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
                 "UART-ENA") != 0)
                printk("Error setting GPIO Uart Enable\n");
        
	// enable OE of level shifter
        if (gpio_request_one(DS_GPIO_OE2,
                 GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
                 "OE-2") != 0)
                printk("Error setting GPIO OE2\n");
#endif
}
예제 #7
0
파일: irq.c 프로젝트: ilikenwf/zen-kernel
static void ar934x_ip2_irq_dispatch(struct irq_desc *desc)
{
	u32 status;

	status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS);

	if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) {
		ath79_ddr_wb_flush(3);
		generic_handle_irq(ATH79_IP2_IRQ(0));
	} else if (status & AR934X_PCIE_WMAC_INT_WMAC_ALL) {
		ath79_ddr_wb_flush(4);
		generic_handle_irq(ATH79_IP2_IRQ(1));
	} else {
		spurious_interrupt();
	}
}
예제 #8
0
static void __init hornet_ub_gpio_setup(void)
{
	u32 t;

	ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
				     AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
				     AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
				     AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
				     AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);

	t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
	t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN;
	ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t);

	ath79_set_usb_power_gpio(HORNET_UB_GPIO_USB_POWER, GPIOF_OUT_INIT_HIGH,
				"USB power");
}
예제 #9
0
static int __devinit ath79_wdt_probe(struct platform_device *pdev)
{
	u32 ctrl;
	int err;

	wdt_clk = clk_get(&pdev->dev, "wdt");
	if (IS_ERR(wdt_clk))
		return PTR_ERR(wdt_clk);

	err = clk_enable(wdt_clk);
	if (err)
		goto err_clk_put;

	wdt_freq = clk_get_rate(wdt_clk);
	if (!wdt_freq) {
		err = -EINVAL;
		goto err_clk_disable;
	}

	max_timeout = (0xfffffffful / wdt_freq);
	if (timeout < 1 || timeout > max_timeout) {
		timeout = max_timeout;
		dev_info(&pdev->dev,
			"timeout value must be 0 < timeout < %d, using %d\n",
			max_timeout, timeout);
	}

	ctrl = ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
	boot_status = (ctrl & WDOG_CTRL_LAST_RESET) ? WDIOF_CARDRESET : 0;

	err = misc_register(&ath79_wdt_miscdev);
	if (err) {
		dev_err(&pdev->dev,
			"unable to register misc device, err=%d\n", err);
		goto err_clk_disable;
	}

	return 0;

err_clk_disable:
	clk_disable(wdt_clk);
err_clk_put:
	clk_put(wdt_clk);
	return err;
}
예제 #10
0
파일: pci.c 프로젝트: 7L/pi_plus
int __init ath79_register_pci(void)
{
	if (soc_is_ar71xx())
		return ar71xx_pcibios_init();

	if (soc_is_ar724x())
		return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2);

	if (soc_is_ar9342() || soc_is_ar9344()) {
		u32 bootstrap;

		bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
		if (bootstrap & AR934X_BOOTSTRAP_PCIE_RC)
			return ar724x_pcibios_init(ATH79_IP2_IRQ(0));
	}

	return -ENODEV;
}
예제 #11
0
static void __init om2p_lc_setup(void)
{
	u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000);
	u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN);
	u8 *art = (u8 *)KSEG1ADDR(0x1ffc1000);
	u32 t;

	ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
				    AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
				    AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
				    AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
				    AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);

	t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
	t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN;
	ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t);

	ath79_register_m25p80(&om2p_lc_flash_data);

	om2p_leds_gpio[0].gpio = OM2P_LC_GPIO_LED_POWER;
	om2p_leds_gpio[1].gpio = OM2P_LC_GPIO_LED_RED;
	om2p_leds_gpio[2].gpio = OM2P_LC_GPIO_LED_YELLOW;
	om2p_leds_gpio[3].gpio = OM2P_LC_GPIO_LED_GREEN;
	om2p_leds_gpio[4].gpio = OM2P_LC_GPIO_LED_LAN;
	om2p_leds_gpio[5].gpio = OM2P_LC_GPIO_LED_WAN;
	ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio),
				 om2p_leds_gpio);

	om2p_gpio_keys[0].gpio = OM2P_LC_GPIO_BTN_RESET;
	ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(om2p_gpio_keys),
					om2p_gpio_keys);

	ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);

	ath79_register_mdio(0, 0x0);

	ath79_register_eth(0);
	ath79_register_eth(1);

	ath79_register_wmac(art, NULL);
}
예제 #12
0
static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
{
	u32 status;

	disable_irq_nosync(irq);

	status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS);

	if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) {
		ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_PCIE);
		generic_handle_irq(ATH79_IP2_IRQ(0));
	} else if (status & AR934X_PCIE_WMAC_INT_WMAC_ALL) {
		ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_WMAC);
		generic_handle_irq(ATH79_IP2_IRQ(1));
	} else {
		spurious_interrupt();
	}

	enable_irq(irq);
}
예제 #13
0
static void __init ds_setup(void)
{
	u32 t=0;

	ds_common_setup();

	ath79_register_leds_gpio(-1, ARRAY_SIZE(ds_leds_gpio), ds_leds_gpio);
	ath79_register_gpio_keys_polled(-1, DS_KEYS_POLL_INTERVAL,
			ARRAY_SIZE(ds_gpio_keys), ds_gpio_keys);
	ath79_register_usb();

	// use the swtich_led directly form sysfs
	ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
	                            AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
	                            AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
	                            AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN);

	/*
	 * Disable the Function for some pins to have GPIO functionality active
	 * GPIO6-7-8 and GPIO11
	 */
	ath79_gpio_function_setup(GPIO_FUNC_SET, GPIO_FUNC_CLEAR);

	ath79_gpio_function2_setup(GPIO_FUNC2_SET, GPIO_FUNC2_CLEAR);

	pr_info("mach-linino: setting GPIO\n");

	/* Enable GPIO26 instead of MDC function */
	t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
	t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN;
	ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t);

	/* enable OE of level shifters */
	ds_setup_level_shifter_oe();
	/* enable uart */
	ds_setup_uart_enable();

	/* Register Software SPI controller */
	ds_register_spi();
}
예제 #14
0
static void __init cus227_audio_setup(void)
{
	u32 t;

	/* Reset I2S internal controller */
	t = ath79_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
	ath79_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t | AR934X_RESET_I2S );
	udelay(1);

	/* GPIO configuration
	   Please note that the value in direction_output doesn't really matter
	   here as GPIOs are configured to relay internal data signal
	*/
	gpio_request(CUS227_GPIO_I2S_CLK, "I2S CLK");
	ath79_gpio_output_select(CUS227_GPIO_I2S_CLK, AR934X_GPIO_OUT_MUX_I2S_CLK);
	gpio_direction_output(CUS227_GPIO_I2S_CLK, 0);

	gpio_request(CUS227_GPIO_I2S_WS, "I2S WS");
	ath79_gpio_output_select(CUS227_GPIO_I2S_WS, AR934X_GPIO_OUT_MUX_I2S_WS);
	gpio_direction_output(CUS227_GPIO_I2S_WS, 0);

	gpio_request(CUS227_GPIO_I2S_SD, "I2S SD");
	ath79_gpio_output_select(CUS227_GPIO_I2S_SD, AR934X_GPIO_OUT_MUX_I2S_SD);
	gpio_direction_output(CUS227_GPIO_I2S_SD, 0);

	gpio_request(CUS227_GPIO_I2S_MCLK, "I2S MCLK");
	ath79_gpio_output_select(CUS227_GPIO_I2S_MCLK, AR934X_GPIO_OUT_MUX_I2S_MCK);
	gpio_direction_output(CUS227_GPIO_I2S_MCLK, 0);

	gpio_request(CUS227_GPIO_SPDIF_OUT, "SPDIF OUT");
	ath79_gpio_output_select(CUS227_GPIO_SPDIF_OUT, AR934X_GPIO_OUT_MUX_SPDIF_OUT);
	gpio_direction_output(CUS227_GPIO_SPDIF_OUT, 0);

	gpio_request(CUS227_GPIO_I2S_MIC_SD, "I2S MIC_SD");
	ath79_gpio_input_select(CUS227_GPIO_I2S_MIC_SD, AR934X_GPIO_IN_MUX_I2S_MIC_SD);
	gpio_direction_input(CUS227_GPIO_I2S_MIC_SD);

	/* Init stereo block registers in default configuration */
	ath79_audio_setup();
}
예제 #15
0
파일: irq.c 프로젝트: ilikenwf/zen-kernel
static void qca955x_ip2_irq_dispatch(struct irq_desc *desc)
{
	u32 status;

	status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS);
	status &= QCA955X_EXT_INT_PCIE_RC1_ALL | QCA955X_EXT_INT_WMAC_ALL;

	if (status == 0) {
		spurious_interrupt();
		return;
	}

	if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) {
		/* TODO: flush DDR? */
		generic_handle_irq(ATH79_IP2_IRQ(0));
	}

	if (status & QCA955X_EXT_INT_WMAC_ALL) {
		/* TODO: flush DDR? */
		generic_handle_irq(ATH79_IP2_IRQ(1));
	}
}
u32 ath79_device_reset_get(u32 mask)
{
	unsigned long flags;
	u32 reg;
	u32 ret;

	if (soc_is_ar71xx())
		reg = AR71XX_RESET_REG_RESET_MODULE;
	else if (soc_is_ar724x())
		reg = AR724X_RESET_REG_RESET_MODULE;
	else if (soc_is_ar913x())
		reg = AR913X_RESET_REG_RESET_MODULE;
	else if (soc_is_ar933x())
		reg = AR933X_RESET_REG_RESET_MODULE;
	else if (soc_is_ar934x())
		reg = AR934X_RESET_REG_RESET_MODULE;
	else
		BUG();

	spin_lock_irqsave(&ath79_device_reset_lock, flags);
	ret = ath79_reset_rr(reg);
	spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
	return ret;
}
예제 #17
0
static void __init ar933x_wmac_setup(void)
{
	u32 t;

	ar933x_wmac_reset();

	ath79_wmac_device.name = "ar933x_wmac";

	ath79_wmac_resources[0].start = AR933X_WMAC_BASE;
	ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1;
	ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
	ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;

	t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
	if (t & AR933X_BOOTSTRAP_REF_CLK_40)
		ath79_wmac_data.is_clk_25mhz = false;
	else
		ath79_wmac_data.is_clk_25mhz = true;

	if (ath79_soc_rev == 1)
		ath79_wmac_data.get_mac_revision = ar933x_r1_get_wmac_revision;

	ath79_wmac_data.external_reset = ar933x_wmac_reset;
}
예제 #18
0
static void __init ubnt_airgateway_setup(void)
{
	u32 t;
	u8 *mac0 = (u8 *) KSEG1ADDR(0x1fff0000);
	u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN);
	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);


	ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
				     AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
				     AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
				     AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
				     AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);

	t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
	t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN;
	ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t);

	ath79_register_m25p80(NULL);
	ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airgateway_gpio_leds),
				 ubnt_airgateway_gpio_leds);

	ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(airgateway_gpio_keys),
					airgateway_gpio_keys);

	ath79_init_mac(ath79_eth1_data.mac_addr, mac0, 0);
	ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);

	ath79_register_mdio(0, 0x0);

	ath79_register_eth(1);
	ath79_register_eth(0);

	ath79_register_wmac(ee, NULL);
}
예제 #19
0
static inline void ath79_wdt_disable(void)
{
	ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_NONE);
	/* flush write */
	ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
}
예제 #20
0
static inline void ath79_wdt_keepalive(void)
{
	ath79_reset_wr(AR71XX_RESET_REG_WDOG, wdt_freq * timeout);
	/* flush write */
	ath79_reset_rr(AR71XX_RESET_REG_WDOG);
}
예제 #21
0
파일: setup.c 프로젝트: CSCLOG/beaglebone
static void __init ath79_detect_sys_type(void)
{
	char *chip = "????";
	u32 id;
	u32 major;
	u32 minor;
	u32 rev = 0;

	id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID);
	major = id & REV_ID_MAJOR_MASK;

	switch (major) {
	case REV_ID_MAJOR_AR71XX:
		minor = id & AR71XX_REV_ID_MINOR_MASK;
		rev = id >> AR71XX_REV_ID_REVISION_SHIFT;
		rev &= AR71XX_REV_ID_REVISION_MASK;
		switch (minor) {
		case AR71XX_REV_ID_MINOR_AR7130:
			ath79_soc = ATH79_SOC_AR7130;
			chip = "7130";
			break;

		case AR71XX_REV_ID_MINOR_AR7141:
			ath79_soc = ATH79_SOC_AR7141;
			chip = "7141";
			break;

		case AR71XX_REV_ID_MINOR_AR7161:
			ath79_soc = ATH79_SOC_AR7161;
			chip = "7161";
			break;
		}
		break;

	case REV_ID_MAJOR_AR7240:
		ath79_soc = ATH79_SOC_AR7240;
		chip = "7240";
		rev = (id & AR724X_REV_ID_REVISION_MASK);
		break;

	case REV_ID_MAJOR_AR7241:
		ath79_soc = ATH79_SOC_AR7241;
		chip = "7241";
		rev = (id & AR724X_REV_ID_REVISION_MASK);
		break;

	case REV_ID_MAJOR_AR7242:
		ath79_soc = ATH79_SOC_AR7242;
		chip = "7242";
		rev = (id & AR724X_REV_ID_REVISION_MASK);
		break;

	case REV_ID_MAJOR_AR913X:
		minor = id & AR913X_REV_ID_MINOR_MASK;
		rev = id >> AR913X_REV_ID_REVISION_SHIFT;
		rev &= AR913X_REV_ID_REVISION_MASK;
		switch (minor) {
		case AR913X_REV_ID_MINOR_AR9130:
			ath79_soc = ATH79_SOC_AR9130;
			chip = "9130";
			break;

		case AR913X_REV_ID_MINOR_AR9132:
			ath79_soc = ATH79_SOC_AR9132;
			chip = "9132";
			break;
		}
		break;

	default:
		panic("ath79: unknown SoC, id:0x%08x\n", id);
	}

	sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
	pr_info("SoC: %s\n", ath79_sys_type);
}
예제 #22
0
파일: setup.c 프로젝트: artynet/linux-3.3.8
static void __init ath79_detect_sys_type(void)
{
    char *chip = "????";
    u32 id;
    u32 major;
    u32 minor;
    u32 rev = 0;

    id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID);
    major = id & REV_ID_MAJOR_MASK;

    switch (major) {
    case REV_ID_MAJOR_AR71XX:
        minor = id & AR71XX_REV_ID_MINOR_MASK;
        rev = id >> AR71XX_REV_ID_REVISION_SHIFT;
        rev &= AR71XX_REV_ID_REVISION_MASK;
        switch (minor) {
        case AR71XX_REV_ID_MINOR_AR7130:
            ath79_soc = ATH79_SOC_AR7130;
            chip = "7130";
            break;

        case AR71XX_REV_ID_MINOR_AR7141:
            ath79_soc = ATH79_SOC_AR7141;
            chip = "7141";
            break;

        case AR71XX_REV_ID_MINOR_AR7161:
            ath79_soc = ATH79_SOC_AR7161;
            chip = "7161";
            break;
        }
        break;

    case REV_ID_MAJOR_AR7240:
        ath79_soc = ATH79_SOC_AR7240;
        chip = "7240";
        rev = id & AR724X_REV_ID_REVISION_MASK;
        break;

    case REV_ID_MAJOR_AR7241:
        ath79_soc = ATH79_SOC_AR7241;
        chip = "7241";
        rev = id & AR724X_REV_ID_REVISION_MASK;
        break;

    case REV_ID_MAJOR_AR7242:
        ath79_soc = ATH79_SOC_AR7242;
        chip = "7242";
        rev = id & AR724X_REV_ID_REVISION_MASK;
        break;

    case REV_ID_MAJOR_AR913X:
        minor = id & AR913X_REV_ID_MINOR_MASK;
        rev = id >> AR913X_REV_ID_REVISION_SHIFT;
        rev &= AR913X_REV_ID_REVISION_MASK;
        switch (minor) {
        case AR913X_REV_ID_MINOR_AR9130:
            ath79_soc = ATH79_SOC_AR9130;
            chip = "9130";
            break;

        case AR913X_REV_ID_MINOR_AR9132:
            ath79_soc = ATH79_SOC_AR9132;
            chip = "9132";
            break;
        }
        break;

    case REV_ID_MAJOR_AR9330:
        ath79_soc = ATH79_SOC_AR9330;
        chip = "9330";
        rev = id & AR933X_REV_ID_REVISION_MASK;
        break;

    case REV_ID_MAJOR_AR9331:
        ath79_soc = ATH79_SOC_AR9331;
        chip = "9331";
        rev = id & AR933X_REV_ID_REVISION_MASK;
        break;

    case REV_ID_MAJOR_AR9341:
        ath79_soc = ATH79_SOC_AR9341;
        chip = "9341";
        rev = id & AR934X_REV_ID_REVISION_MASK;
        break;

    case REV_ID_MAJOR_AR9342:
        ath79_soc = ATH79_SOC_AR9342;
        chip = "9342";
        rev = id & AR934X_REV_ID_REVISION_MASK;
        break;

    case REV_ID_MAJOR_AR9344:
        ath79_soc = ATH79_SOC_AR9344;
        chip = "9344";
        rev = id & AR934X_REV_ID_REVISION_MASK;
        break;

    case REV_ID_MAJOR_QCA9558:
        ath79_soc = ATH79_SOC_QCA9558;
        chip = "9558";
        rev = id & AR944X_REV_ID_REVISION_MASK;
        break;

    default:
        panic("ath79: unknown SoC, id:0x%08x", id);
    }

    ath79_soc_rev = rev;

    if (soc_is_qca955x())
        sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u",
                chip, rev);
    else
        sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
    pr_info("SoC: %s\n", ath79_sys_type);
}
예제 #23
0
파일: setup.c 프로젝트: AlexShiLucky/linux
static void __init ath79_detect_sys_type(void)
{
	char *chip = "????";
	u32 id;
	u32 major;
	u32 minor;
	u32 rev = 0;
	u32 ver = 1;

	id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID);
	major = id & REV_ID_MAJOR_MASK;

	switch (major) {
	case REV_ID_MAJOR_AR71XX:
		minor = id & AR71XX_REV_ID_MINOR_MASK;
		rev = id >> AR71XX_REV_ID_REVISION_SHIFT;
		rev &= AR71XX_REV_ID_REVISION_MASK;
		switch (minor) {
		case AR71XX_REV_ID_MINOR_AR7130:
			ath79_soc = ATH79_SOC_AR7130;
			chip = "7130";
			break;

		case AR71XX_REV_ID_MINOR_AR7141:
			ath79_soc = ATH79_SOC_AR7141;
			chip = "7141";
			break;

		case AR71XX_REV_ID_MINOR_AR7161:
			ath79_soc = ATH79_SOC_AR7161;
			chip = "7161";
			break;
		}
		break;

	case REV_ID_MAJOR_AR7240:
		ath79_soc = ATH79_SOC_AR7240;
		chip = "7240";
		rev = id & AR724X_REV_ID_REVISION_MASK;
		break;

	case REV_ID_MAJOR_AR7241:
		ath79_soc = ATH79_SOC_AR7241;
		chip = "7241";
		rev = id & AR724X_REV_ID_REVISION_MASK;
		break;

	case REV_ID_MAJOR_AR7242:
		ath79_soc = ATH79_SOC_AR7242;
		chip = "7242";
		rev = id & AR724X_REV_ID_REVISION_MASK;
		break;

	case REV_ID_MAJOR_AR913X:
		minor = id & AR913X_REV_ID_MINOR_MASK;
		rev = id >> AR913X_REV_ID_REVISION_SHIFT;
		rev &= AR913X_REV_ID_REVISION_MASK;
		switch (minor) {
		case AR913X_REV_ID_MINOR_AR9130:
			ath79_soc = ATH79_SOC_AR9130;
			chip = "9130";
			break;

		case AR913X_REV_ID_MINOR_AR9132:
			ath79_soc = ATH79_SOC_AR9132;
			chip = "9132";
			break;
		}
		break;

	case REV_ID_MAJOR_AR9330:
		ath79_soc = ATH79_SOC_AR9330;
		chip = "9330";
		rev = id & AR933X_REV_ID_REVISION_MASK;
		break;

	case REV_ID_MAJOR_AR9331:
		ath79_soc = ATH79_SOC_AR9331;
		chip = "9331";
		rev = id & AR933X_REV_ID_REVISION_MASK;
		break;

	case REV_ID_MAJOR_AR9341:
		ath79_soc = ATH79_SOC_AR9341;
		chip = "9341";
		rev = id & AR934X_REV_ID_REVISION_MASK;
		break;

	case REV_ID_MAJOR_AR9342:
		ath79_soc = ATH79_SOC_AR9342;
		chip = "9342";
		rev = id & AR934X_REV_ID_REVISION_MASK;
		break;

	case REV_ID_MAJOR_AR9344:
		ath79_soc = ATH79_SOC_AR9344;
		chip = "9344";
		rev = id & AR934X_REV_ID_REVISION_MASK;
		break;

	case REV_ID_MAJOR_QCA9533_V2:
		ver = 2;
		ath79_soc_rev = 2;
		/* drop through */

	case REV_ID_MAJOR_QCA9533:
		ath79_soc = ATH79_SOC_QCA9533;
		chip = "9533";
		rev = id & QCA953X_REV_ID_REVISION_MASK;
		break;

	case REV_ID_MAJOR_QCA9556:
		ath79_soc = ATH79_SOC_QCA9556;
		chip = "9556";
		rev = id & QCA955X_REV_ID_REVISION_MASK;
		break;

	case REV_ID_MAJOR_QCA9558:
		ath79_soc = ATH79_SOC_QCA9558;
		chip = "9558";
		rev = id & QCA955X_REV_ID_REVISION_MASK;
		break;

	case REV_ID_MAJOR_QCA956X:
		ath79_soc = ATH79_SOC_QCA956X;
		chip = "956X";
		rev = id & QCA956X_REV_ID_REVISION_MASK;
		break;

	case REV_ID_MAJOR_TP9343:
		ath79_soc = ATH79_SOC_TP9343;
		chip = "9343";
		rev = id & QCA956X_REV_ID_REVISION_MASK;
		break;

	default:
		panic("ath79: unknown SoC, id:0x%08x", id);
	}

	if (ver == 1)
		ath79_soc_rev = rev;

	if (soc_is_qca953x() || soc_is_qca955x() || soc_is_qca956x())
		sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s ver %u rev %u",
			chip, ver, rev);
	else if (soc_is_tp9343())
		sprintf(ath79_sys_type, "Qualcomm Atheros TP%s rev %u",
			chip, rev);
	else
		sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
	pr_info("SoC: %s\n", ath79_sys_type);
}