/* axp driver porting interface */
static int axp_gpio_get_data(int gpio)
{
uint8_t ret;
struct axp_dev *axp = NULL;
#ifdef CONFIG_AW_AXP22
axp = axp_dev_lookup(AXP22);
#elif defined(CONFIG_AW_AXP81X)
axp = axp_dev_lookup(AXP81X);
#endif
if (NULL == axp) {
printk("%s: axp data is null\n", __func__);
return -ENXIO;
}
switch(gpio){
case 0:axp_read(axp->dev,AXP_GPIO01_STATE,&ret);ret &= 0x10;ret = ret>>4;break;
case 1:axp_read(axp->dev,AXP_GPIO01_STATE,&ret);ret &= 0x20;ret = ret>>5;break;
case 2:printk("This IO is not an input,no return value!");return -ENXIO;
case 3:printk("This IO is not an input,no return value!");return -ENXIO;
case 4:printk("This IO is not an input,no return value!");return -ENXIO;
case 5:printk("This IO is not an input,no return value!");return -ENXIO;
default:return -ENXIO;
}
return ret;
}
static int axp_pmx_get(int gpio)
{
struct axp_dev *axp = NULL;
uint8_t data;
#ifdef CONFIG_AW_AXP22
axp = axp_dev_lookup(AXP22);
#elif defined(CONFIG_AW_AXP81X)
axp = axp_dev_lookup(AXP81X);
#endif
if (NULL == axp) {
printk("%s: %d axp data is null\n", __func__, __LINE__);
return -ENXIO;
}
switch(gpio){
case 0:
axp_read(axp->dev, AXP_GPIO0_CFG, &data);
if (0 == (data & 0x06))
return 1;
else if (0x02 == (data & 0x07))
return 0;
else
return -ENXIO;
case 1:
axp_read(axp->dev, AXP_GPIO1_CFG, &data);
if (0 == (data & 0x06))
return 1;
else if (0x02 == (data & 0x07))
return 0;
else
return -ENXIO;
case 2:
return 1;
case 3:
axp_read(axp->dev, AXP_GPIO3_CFG, &data);
if (0 == (data & 0x08))
return 1;
else
return 0;
case 4:
axp_read(axp->dev, AXP_GPIO4_CFG, &data);
if (0 == (data & 0x10))
return 1;
else
return 0;
case 5:
return 1;
default:return -ENXIO;
}
return -ENXIO;
}
void axp81x_power_off(int power_start)
{
uint8_t val;
struct axp_dev *axp;
axp = axp_dev_lookup(AXP81X);
if (NULL == axp) {
printk("%s: axp data is null\n", __func__);
return;
}
if(axp81x_config.pmu_pwroff_vol >= 2600 && axp81x_config.pmu_pwroff_vol <= 3300){
if (axp81x_config.pmu_pwroff_vol > 3200){
val = 0x7;
}else if (axp81x_config.pmu_pwroff_vol > 3100){
val = 0x6;
}else if (axp81x_config.pmu_pwroff_vol > 3000){
val = 0x5;
}else if (axp81x_config.pmu_pwroff_vol > 2900){
val = 0x4;
}else if (axp81x_config.pmu_pwroff_vol > 2800){
val = 0x3;
}else if (axp81x_config.pmu_pwroff_vol > 2700){
val = 0x2;
}else if (axp81x_config.pmu_pwroff_vol > 2600){
val = 0x1;
}else
val = 0x0;
axp_update(axp->dev, AXP81X_VOFF_SET, val, 0x7);
}
val = 0xff;
printk("[axp] send power-off command!\n");
mdelay(20);
if(axp81x_config.power_start != 1){
axp_read(axp->dev, AXP81X_STATUS, &val);
if(val & 0xF0){
axp_read(axp->dev, AXP81X_MODE_CHGSTATUS, &val);
if(val & 0x20) {
printk("[axp] set flag!\n");
axp_read(axp->dev, AXP81X_BUFFERC, &val);
if (0x0d != val)
axp_write(axp->dev, AXP81X_BUFFERC, 0x0f);
mdelay(20);
printk("[axp] reboot!\n");
machine_restart(NULL);
printk("[axp] warning!!! arch can't ,reboot, maybe some error happend!\n");
}
}
}
axp_read(axp->dev, AXP81X_BUFFERC, &val);
if (0x0d != val)
axp_write(axp->dev, AXP81X_BUFFERC, 0x00);
mdelay(20);
axp_set_bits(axp->dev, AXP81X_OFF_CTL, 0x80);
mdelay(20);
printk("[axp] warning!!! axp can't power-off, maybe some error happend!\n");
}
static int axp_pmx_set(int gpio, int mux)
{
struct axp_dev *axp = NULL;
#ifdef CONFIG_AW_AXP22
axp = axp_dev_lookup(AXP22);
#elif defined(CONFIG_AW_AXP81X)
axp = axp_dev_lookup(AXP81X);
#endif
if (NULL == axp) {
printk("%s: %d axp data is null\n", __func__, __LINE__);
return -ENXIO;
}
if(mux == 1){//output
switch(gpio){
case 0: return axp_clr_bits_sync(axp->dev,AXP_GPIO0_CFG, 0x06);
case 1: return axp_clr_bits_sync(axp->dev,AXP_GPIO1_CFG, 0x06);
case 2: return 0;
case 3: return axp_clr_bits(axp->dev,AXP_GPIO3_CFG, 0x08);
case 4: return axp_clr_bits(axp->dev,AXP_GPIO4_CFG, 0x10);
case 5: return 0;
default:return -ENXIO;
}
}
else if(mux == 0){//input
switch(gpio){
case 0: axp_clr_bits_sync(axp->dev,AXP_GPIO0_CFG,0x05);
return axp_set_bits_sync(axp->dev,AXP_GPIO0_CFG,0x02);
case 1: axp_clr_bits_sync(axp->dev,AXP_GPIO1_CFG,0x05);
return axp_set_bits_sync(axp->dev,AXP_GPIO1_CFG,0x02);
case 2: printk("This IO can not config as an input!");
return -EINVAL;
case 3: printk("This IO can not config as an input!");
return -EINVAL;
case 4: printk("This IO can not config as an input!");
return -EINVAL;
case 5: printk("This IO can not config as an input!");
return -EINVAL;
default:return -ENXIO;
}
}
return -ENXIO;
}
static int axp_pmx_set(int gpio, int mux)
{
struct axp_dev *axp = NULL;
axp = axp_dev_lookup(AXP19);
if (NULL == axp) {
printk("%s: %d axp data is null\n", __func__, __LINE__);
return -ENXIO;
}
if(mux == 1){//output
switch(gpio){
case 0: return axp_clr_bits(axp->dev,AXP19_GPIO0_CFG,0x07);
case 1: return axp_clr_bits(axp->dev,AXP19_GPIO1_CFG,0x07);
case 2: return axp_clr_bits(axp->dev,AXP19_GPIO2_CFG,0x07);
case 3: axp_set_bits(axp->dev,AXP19_GPIO34_CFG,0x81);
return axp_clr_bits(axp->dev,AXP19_GPIO34_CFG,0x02);
case 4: axp_set_bits(axp->dev,AXP19_GPIO34_CFG,0x84);
return axp_clr_bits(axp->dev,AXP19_GPIO34_CFG,0x08);
case 5: axp_set_bits(axp->dev,AXP19_GPIO5_CFG,0x80);
return axp_clr_bits(axp->dev,AXP19_GPIO5_CFG,0x40);
case 6: axp_set_bits(axp->dev,AXP19_GPIO67_CFG0,0x01);
return axp_clr_bits(axp->dev,AXP19_GPIO67_CFG1,0x40);
case 7: axp_set_bits(axp->dev,AXP19_GPIO67_CFG0,0x01);
return axp_clr_bits(axp->dev,AXP19_GPIO67_CFG1,0x04);
default:return -ENXIO;
}
}
else if(mux == 0){//input
switch(gpio){
case 0: axp_clr_bits(axp->dev,AXP19_GPIO0_CFG,0x06);
return axp_set_bits(axp->dev,AXP19_GPIO0_CFG,0x01);
case 1: axp_clr_bits(axp->dev,AXP19_GPIO1_CFG,0x06);
return axp_set_bits(axp->dev,AXP19_GPIO1_CFG,0x01);
case 2: axp_clr_bits(axp->dev,AXP19_GPIO2_CFG,0x06);
return axp_set_bits(axp->dev,AXP19_GPIO2_CFG,0x01);
case 3: axp_set_bits(axp->dev,AXP19_GPIO34_CFG,0x82);
return axp_clr_bits(axp->dev,AXP19_GPIO34_CFG,0x01);
case 4: axp_set_bits(axp->dev,AXP19_GPIO34_CFG,0x88);
return axp_clr_bits(axp->dev,AXP19_GPIO34_CFG,0x04);
case 5: axp_set_bits(axp->dev,AXP19_GPIO5_CFG,0xC0);
case 6: axp_set_bits(axp->dev,AXP19_GPIO67_CFG0,0x01);
return axp_set_bits(axp->dev,AXP19_GPIO67_CFG1,0x40);
case 7: axp_set_bits(axp->dev,AXP19_GPIO67_CFG0,0x01);
return axp_set_bits(axp->dev,AXP19_GPIO67_CFG1,0x04);
default:return -ENXIO;
}
}
return -ENXIO;
}
static int axp_gpio_get_data(int gpio)
{
int io_state;
uint8_t ret;
uint8_t val;
int value;
struct axp_dev *axp = NULL;
axp = axp_dev_lookup(AXP19);
if (NULL == axp) {
printk("%s: axp data is null\n", __func__);
return -ENXIO;
}
ret = axp_gpio_get_io(gpio,&io_state);
if(ret)
return ret;
if(io_state){
switch(gpio)
{
case 0:ret = axp_read(axp->dev,AXP19_GPIO012_STATE,&val); value = val & 0x01;break;
case 1:ret = axp_read(axp->dev,AXP19_GPIO012_STATE,&val); value = (val & 0x02)?1:0;break;
case 2:ret = axp_read(axp->dev,AXP19_GPIO012_STATE,&val); value = (val & 0x04)?1:0;break;
case 3:ret = axp_read(axp->dev,AXP19_GPIO34_STATE,&val); value =val & 0x01;break;
case 4:ret = axp_read(axp->dev,AXP19_GPIO34_STATE,&val); value =(val & 0x02)?1:0;break;
case 5:ret = axp_read(axp->dev,AXP19_GPIO5_STATE,&val); value =(val & 0x20)?1:0;break;
case 6:ret = axp_read(axp->dev,AXP19_GPIO67_STATE,&val); value =(val & 0x20)?1:0;break;
case 7:ret = axp_read(axp->dev,AXP19_GPIO67_STATE,&val); value =(val & 0x02)?1:0;break;
default:return -ENXIO;
}
}
else{
switch(gpio)
{
case 0:ret = axp_read(axp->dev,AXP19_GPIO012_STATE,&val); value = (val & 0x10)?1:0;break;
case 1:ret = axp_read(axp->dev,AXP19_GPIO012_STATE,&val); value = (val & 0x20)?1:0;break;
case 2:ret = axp_read(axp->dev,AXP19_GPIO012_STATE,&val); value = (val & 0x40)?1:0;break;
case 3:ret = axp_read(axp->dev,AXP19_GPIO34_STATE,&val); value = (val & 0x10)?1:0;break;
case 4:ret = axp_read(axp->dev,AXP19_GPIO34_STATE,&val); value = (val & 0x20)?1:0;break;
case 5:ret = axp_read(axp->dev,AXP19_GPIO5_STATE,&val); value = (val & 0x10);break;
case 6:ret = axp_read(axp->dev,AXP19_GPIO67_STATE,&val); value =(val & 0x10)?1:0;break;
case 7:ret = axp_read(axp->dev,AXP19_GPIO67_STATE,&val); value =(val & 0x01)?1:0;break;
default:return -ENXIO;
}
}
return value;
}
static int axp_gpio_set_data(int gpio, int value)
{
struct axp_dev *axp = NULL;
axp = axp_dev_lookup(AXP19);
if (NULL == axp) {
printk("%s: %d axp data is null\n", __func__, __LINE__);
return -ENXIO;
}
if(value){//high
switch(gpio) {
case 0: return axp_set_bits(axp->dev,AXP19_GPIO012_STATE,0x01);
case 1: return axp_set_bits(axp->dev,AXP19_GPIO012_STATE,0x02);
case 2: return axp_set_bits(axp->dev,AXP19_GPIO012_STATE,0x04);
case 3: return axp_set_bits(axp->dev,AXP19_GPIO34_STATE,0x01);
case 4: return axp_set_bits(axp->dev,AXP19_GPIO34_STATE,0x02);
case 5: return axp_set_bits(axp->dev,AXP19_GPIO5_STATE,0x20);
case 6: return axp_set_bits(axp->dev,AXP19_GPIO67_STATE,0x20);
case 7: return axp_set_bits(axp->dev,AXP19_GPIO67_STATE,0x02);
default:break;
}
}else{//low
switch(gpio){
case 0: return axp_clr_bits(axp->dev,AXP19_GPIO012_STATE,0x01);
case 1: return axp_clr_bits(axp->dev,AXP19_GPIO012_STATE,0x02);
case 2: return axp_clr_bits(axp->dev,AXP19_GPIO012_STATE,0x04);
case 3: return axp_clr_bits(axp->dev,AXP19_GPIO34_STATE,0x01);
case 4: return axp_clr_bits(axp->dev,AXP19_GPIO34_STATE,0x02);
case 5: return axp_clr_bits(axp->dev,AXP19_GPIO5_STATE,0x20);
case 6: return axp_clr_bits(axp->dev,AXP19_GPIO67_STATE,0x20);
case 7: return axp_clr_bits(axp->dev,AXP19_GPIO67_STATE,0x02);
default:break;
}
}
return -ENXIO;
}
void axp20_power_off(int power_start)
{
uint8_t val;
struct axp_dev *axp;
axp = axp_dev_lookup(AXP20);
if (NULL == axp) {
printk("%s: axp data is null\n", __func__);
return;
}
if(axp20_config.pmu_pwroff_vol >= 2600 && axp20_config.pmu_pwroff_vol <= 3300){
if (axp20_config.pmu_pwroff_vol > 3200){
val = 0x7;
}
else if (axp20_config.pmu_pwroff_vol > 3100){
val = 0x6;
}
else if (axp20_config.pmu_pwroff_vol > 3000){
val = 0x5;
}
else if (axp20_config.pmu_pwroff_vol > 2900){
val = 0x4;
}
else if (axp20_config.pmu_pwroff_vol > 2800){
val = 0x3;
}
else if (axp20_config.pmu_pwroff_vol > 2700){
val = 0x2;
}
else if (axp20_config.pmu_pwroff_vol > 2600){
val = 0x1;
}
else
val = 0x0;
axp_update(axp->dev, POWER20_VOFF_SET, val, 0x7);
}
val = 0xff;
if (!use_cou){
axp_read(axp->dev, POWER20_COULOMB_CTL, &val);
val &= 0x3f;
axp_write(axp->dev, POWER20_COULOMB_CTL, val);
val |= 0x80;
val &= 0xbf;
axp_write(axp->dev, POWER20_COULOMB_CTL, val);
}
//led auto
axp_clr_bits(axp->dev,0x32,0x38);
axp_clr_bits(axp->dev,0xb9,0x80);
printk("[axp] send power-off command!\n");
mdelay(20);
if(axp20_config.power_start != 1){
axp_write(axp->dev, POWER20_INTSTS3, 0x03);
axp_read(axp->dev, POWER20_STATUS, &val);
if(val & 0xF0){
axp_read(axp->dev, POWER20_MODE_CHGSTATUS, &val);
if(val & 0x20){
printk("[axp] set flag!\n");
axp_write(axp->dev, POWER20_DATA_BUFFERC, 0x0f);
mdelay(20);
printk("[axp] reboot!\n");
machine_restart(NULL);
printk("[axp] warning!!! arch can't ,reboot, maybe some error happend!\n");
}
}
}
axp_write(axp->dev, POWER20_DATA_BUFFERC, 0x00);
//axp_write(&axp->dev, 0xf4, 0x06);
//axp_write(&axp->dev, 0xf2, 0x04);
//axp_write(&axp->dev, 0xff, 0x01);
//axp_write(&axp->dev, 0x04, 0x01);
//axp_clr_bits(&axp->dev, 0x03, 0xc0);
//axp_write(&axp->dev, 0xff, 0x00);
//mdelay(20);
axp_set_bits(axp->dev, POWER20_OFF_CTL, 0x80);
mdelay(20);
printk("[axp] warning!!! axp can't power-off, maybe some error happend!\n");
}
/* axp driver porting interface */
int axp_gpio_get_io(int gpio, int *io_state)
{
uint8_t val;
struct axp_dev *axp = NULL;
axp = axp_dev_lookup(AXP19);
if (NULL == axp) {
printk("%s: axp data is null\n", __func__);
return -ENXIO;
}
switch(gpio)
{
case 0: axp_read(axp->dev,AXP19_GPIO0_CFG,&val);val &= 0x07;
if(val == 0x00)
*io_state = 1;
else if (val == 0x01)
*io_state = 0;
else
return -EIO;
break;
case 1: axp_read(axp->dev,AXP19_GPIO1_CFG,&val);val &= 0x07;
if(val < 0x00)
*io_state = 1;
else if (val == 0x01)
*io_state = 0;
else
return -EIO;
break;
case 2: axp_read(axp->dev,AXP19_GPIO2_CFG,&val);val &= 0x07;
if(val == 0x0)
*io_state = 1;
else if (val == 0x01)
*io_state = 0;
else
return -EIO;
break;
case 3: axp_read(axp->dev,AXP19_GPIO34_CFG,&val);val &= 0x03;
if(val == 0x1)
*io_state = 1;
else if(val == 0x2)
*io_state = 0;
else
return -EIO;
break;
case 4: axp_read(axp->dev,AXP19_GPIO34_CFG,&val);val &= 0x0C;
if(val == 0x4)
*io_state = 1;
else if(val == 0x8)
*io_state = 0;
else
return -EIO;
break;
case 5: axp_read(axp->dev,AXP19_GPIO5_CFG,&val);val &= 0x40;
*io_state = val >> 6;
break;
case 6: axp_read(axp->dev,AXP19_GPIO67_CFG1,&val);*io_state = (val & 0x40)?0:1;break;
case 7: axp_read(axp->dev,AXP19_GPIO67_CFG1,&val);*io_state = (val & 0x04)?0:1;break;
default:return -ENXIO;
}
return 0;
}
static int axp_gpio_set_data(int gpio, int value)
{
struct axp_dev *axp = NULL;
if ((0 <= gpio) && (4 >= gpio)) {
#ifdef CONFIG_AW_AXP22
axp = axp_dev_lookup(AXP22);
#elif defined(CONFIG_AW_AXP81X)
axp = axp_dev_lookup(AXP81X);
#endif
if (NULL == axp) {
printk("%s: %d axp data is null\n", __func__, __LINE__);
return -ENXIO;
}
} else if ((5 <= gpio) && (6 >= gpio)) {
axp = axp_dev_lookup(AXP15);
if (NULL == axp) {
printk("%s: %d axp data is null\n", __func__, __LINE__);
return -ENXIO;
}
} else {
return -ENXIO;
}
if(value){//high
switch(gpio) {
case 0:
return axp_update_sync(axp->dev,AXP_GPIO0_CFG,0x01,0x07);
case 1:
return axp_update_sync(axp->dev,AXP_GPIO1_CFG,0x01,0x07);
case 2:
return axp_set_bits(axp->dev,AXP_GPIO2_CFG,0x80);
case 3:
axp_clr_bits(axp->dev,AXP_GPIO3_CFG,0x30);
return axp_clr_bits(axp->dev,AXP_GPIO3_CFG, 0x08);
case 4:
axp_clr_bits(axp->dev,AXP_GPIO4_CFG, 0x10);
return axp_set_bits(axp->dev,AXP_GPIO4_STA,0x04);
case 5:
return axp_set_bits(axp->dev,AXP_GPIO5_CFG,0x03);
case 6:
return axp_set_bits(axp->dev,AXP_GPIO6_CFG,0x80);
default:break;
}
}else{//low
switch(gpio){
case 0:
return axp_update_sync(axp->dev,AXP_GPIO0_CFG,0x0,0x07);
case 1:
return axp_update_sync(axp->dev,AXP_GPIO1_CFG,0x0,0x07);
case 2:
return axp_clr_bits(axp->dev,AXP_GPIO2_CFG,0x80);
case 3:
axp_set_bits(axp->dev,AXP_GPIO3_CFG,0x30);
return axp_clr_bits(axp->dev,AXP_GPIO3_CFG, 0x08);
case 4:
axp_clr_bits(axp->dev,AXP_GPIO4_CFG, 0x10);
return axp_clr_bits(axp->dev,AXP_GPIO4_STA,0x04);
case 5:
return axp_update_sync(axp->dev,AXP_GPIO5_CFG,0x02,0x07);
case 6:
return axp_clr_bits(axp->dev,AXP_GPIO6_CFG,0x80);
default:break;
}
}
return -ENXIO;
}
