static void b43_phy_ww(struct b43_wldev *dev) { u16 b, curr_s, best_s = 0xFFFF; int i; b43_phy_write(dev, B43_PHY_CRS0, b43_phy_read(dev, B43_PHY_CRS0) & ~B43_PHY_CRS0_EN); b43_phy_write(dev, B43_PHY_OFDM(0x1B), b43_phy_read(dev, B43_PHY_OFDM(0x1B)) | 0x1000); b43_phy_write(dev, B43_PHY_OFDM(0x82), (b43_phy_read(dev, B43_PHY_OFDM(0x82)) & 0xF0FF) | 0x0300); b43_radio_write16(dev, 0x0009, b43_radio_read16(dev, 0x0009) | 0x0080); b43_radio_write16(dev, 0x0012, (b43_radio_read16(dev, 0x0012) & 0xFFFC) | 0x0002); b43_wa_initgains(dev); b43_phy_write(dev, B43_PHY_OFDM(0xBA), 0x3ED5); b = b43_phy_read(dev, B43_PHY_PWRDOWN); b43_phy_write(dev, B43_PHY_PWRDOWN, (b & 0xFFF8) | 0x0005); b43_radio_write16(dev, 0x0004, b43_radio_read16(dev, 0x0004) | 0x0004); for (i = 0x10; i <= 0x20; i++) { b43_radio_write16(dev, 0x0013, i); curr_s = b43_phy_read(dev, B43_PHY_OTABLEQ) & 0x00FF; if (!curr_s) { best_s = 0x0000; break; } else if (curr_s >= 0x0080) curr_s = 0x0100 - curr_s; if (curr_s < best_s) best_s = curr_s; } b43_phy_write(dev, B43_PHY_PWRDOWN, b); b43_radio_write16(dev, 0x0004, b43_radio_read16(dev, 0x0004) & 0xFFFB); b43_radio_write16(dev, 0x0013, best_s); b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 0, 0xFFEC); b43_phy_write(dev, B43_PHY_OFDM(0xB7), 0x1E80); b43_phy_write(dev, B43_PHY_OFDM(0xB6), 0x1C00); b43_phy_write(dev, B43_PHY_OFDM(0xB5), 0x0EC0); b43_phy_write(dev, B43_PHY_OFDM(0xB2), 0x00C0); b43_phy_write(dev, B43_PHY_OFDM(0xB9), 0x1FFF); b43_phy_write(dev, B43_PHY_OFDM(0xBB), (b43_phy_read(dev, B43_PHY_OFDM(0xBB)) & 0xF000) | 0x0053); b43_phy_write(dev, B43_PHY_OFDM61, (b43_phy_read(dev, B43_PHY_OFDM61) & 0xFE1F) | 0x0120); b43_phy_write(dev, B43_PHY_OFDM(0x13), (b43_phy_read(dev, B43_PHY_OFDM(0x13)) & 0x0FFF) | 0x3000); b43_phy_write(dev, B43_PHY_OFDM(0x14), (b43_phy_read(dev, B43_PHY_OFDM(0x14)) & 0x0FFF) | 0x3000); b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 6, 0x0017); for (i = 0; i < 6; i++) b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, i, 0x000F); b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0x0D, 0x000E); b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0x0E, 0x0011); b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0x0F, 0x0013); b43_phy_write(dev, B43_PHY_OFDM(0x33), 0x5030); b43_phy_write(dev, B43_PHY_CRS0, b43_phy_read(dev, B43_PHY_CRS0) | B43_PHY_CRS0_EN); }
void b43_wa_all(struct b43_wldev *dev) { struct b43_phy *phy = &dev->phy; if (phy->type == B43_PHYTYPE_A) { switch (phy->rev) { case 2: b43_wa_papd(dev); b43_wa_auxclipthr(dev); b43_wa_afcdac(dev); b43_wa_txdc_offset(dev); b43_wa_initgains(dev); b43_wa_divider(dev); b43_wa_gt(dev); b43_wa_rssi_lt(dev); b43_wa_analog(dev); b43_wa_dac(dev); b43_wa_fft(dev); b43_wa_nft(dev); b43_wa_rt(dev); b43_wa_nst(dev); b43_wa_art(dev); b43_wa_txlna_gain(dev); b43_wa_crs_reset(dev); b43_wa_2060txlna_gain(dev); b43_wa_lms(dev); break; case 3: b43_wa_papd(dev); b43_wa_mixedsignal(dev); b43_wa_rssi_lt(dev); b43_wa_txdc_offset(dev); b43_wa_initgains(dev); b43_wa_dac(dev); b43_wa_nft(dev); b43_wa_nst(dev); b43_wa_msst(dev); b43_wa_analog(dev); b43_wa_gt(dev); b43_wa_txpuoff_rxpuon(dev); b43_wa_txlna_gain(dev); break; case 5: b43_wa_iqadc(dev); case 6: b43_wa_papd(dev); b43_wa_rssi_lt(dev); b43_wa_txdc_offset(dev); b43_wa_initgains(dev); b43_wa_dac(dev); b43_wa_nft(dev); b43_wa_nst(dev); b43_wa_msst(dev); b43_wa_analog(dev); b43_wa_gt(dev); b43_wa_txpuoff_rxpuon(dev); b43_wa_txlna_gain(dev); break; case 7: b43_wa_iqadc(dev); b43_wa_papd(dev); b43_wa_rssi_lt(dev); b43_wa_txdc_offset(dev); b43_wa_initgains(dev); b43_wa_dac(dev); b43_wa_nft(dev); b43_wa_nst(dev); b43_wa_msst(dev); b43_wa_analog(dev); b43_wa_gt(dev); b43_wa_txpuoff_rxpuon(dev); b43_wa_txlna_gain(dev); b43_wa_rssi_adc(dev); default: B43_WARN_ON(1); } b43_wa_boards_a(dev); } else if (phy->type == B43_PHYTYPE_G) { switch (phy->rev) { case 1://XXX review rev1 b43_wa_crs_ed(dev); b43_wa_crs_thr(dev); b43_wa_crs_blank(dev); b43_wa_cck_shiftbits(dev); b43_wa_fft(dev); b43_wa_nft(dev); b43_wa_rt(dev); b43_wa_nst(dev); b43_wa_art(dev); b43_wa_wrssi_offset(dev); b43_wa_altagc(dev); break; case 2: case 6: case 7: case 8: case 9: b43_wa_tr_ltov(dev); b43_wa_crs_ed(dev); b43_wa_rssi_lt(dev); b43_wa_nft(dev); b43_wa_nst(dev); b43_wa_msst(dev); b43_wa_wrssi_offset(dev); b43_wa_altagc(dev); b43_wa_analog(dev); b43_wa_txpuoff_rxpuon(dev); break; default: B43_WARN_ON(1); } b43_wa_boards_g(dev); } else { /* No N PHY support so far, LP PHY is in phy_lp.c */ B43_WARN_ON(1); } b43_wa_cpll_nonpilot(dev); }