예제 #1
0
static void b43_phy_ht_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
				 u16 set)
{
	b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
	b43_write16(dev, B43_MMIO_PHY_DATA,
		    (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) | set);
}
예제 #2
0
/* brcms_b_switch_macfreq */
static void b43_phy_switch_macfreq(struct b43_wldev *dev, u8 spurmode)
{
	if (dev->dev->chip_id == 43224 || dev->dev->chip_id == 43225) {
		switch (spurmode) {
		case 2:		/* 126 Mhz */
			b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x2082);
			b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
			break;
		case 1:		/* 123 Mhz */
			b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x5341);
			b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
			break;
		default:	/* 120 Mhz */
			b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x8889);
			b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
			break;
		}
	} else if (dev->phy.type == B43_PHYTYPE_LCN) {
		switch (spurmode) {
		case 1:		/* 82 Mhz */
			b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x7CE0);
			b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
			break;
		default:	/* 80 Mhz */
			b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0xCCCD);
			b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
			break;
		}
	}
}
예제 #3
0
파일: phy_a.c 프로젝트: AppEngine/linux-2.6
static void b43_aphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
{
	/* Register 1 is a 32-bit register. */
	B43_WARN_ON(reg == 1);

	b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
	b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
}
예제 #4
0
static u16 b43_phy_ht_op_radio_read(struct b43_wldev *dev, u16 reg)
{
	/* HT-PHY needs 0x200 for read access */
	reg |= 0x200;

	b43_write16(dev, B43_MMIO_RADIO24_CONTROL, reg);
	return b43_read16(dev, B43_MMIO_RADIO24_DATA);
}
예제 #5
0
파일: phy_ht.c 프로젝트: mbgg/linux
static void b43_phy_ht_spur_avoid(struct b43_wldev *dev,
				  struct ieee80211_channel *new_channel)
{
	struct bcma_device *core = dev->dev->bdev;
	int spuravoid = 0;
	u16 tmp;

	/* Check for 13 and 14 is just a guess, we don't have enough logs. */
	if (new_channel->hw_value == 13 || new_channel->hw_value == 14)
		spuravoid = 1;
	bcma_core_pll_ctl(core, B43_BCMA_CLKCTLST_PHY_PLL_REQ, 0, false);
	bcma_pmu_spuravoid_pllupdate(&core->bus->drv_cc, spuravoid);
	bcma_core_pll_ctl(core,
			  B43_BCMA_CLKCTLST_80211_PLL_REQ |
			  B43_BCMA_CLKCTLST_PHY_PLL_REQ,
			  B43_BCMA_CLKCTLST_80211_PLL_ST |
			  B43_BCMA_CLKCTLST_PHY_PLL_ST, false);

	/* Values has been taken from wlc_bmac_switch_macfreq comments */
	switch (spuravoid) {
	case 2: /* 126MHz */
		tmp = 0x2082;
		break;
	case 1: /* 123MHz */
		tmp = 0x5341;
		break;
	default: /* 120MHz */
		tmp = 0x8889;
	}

	b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, tmp);
	b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);

	/* TODO: reset PLL */

	if (spuravoid)
		b43_phy_set(dev, B43_PHY_HT_BBCFG, B43_PHY_HT_BBCFG_RSTRX);
	else
		b43_phy_mask(dev, B43_PHY_HT_BBCFG,
				~B43_PHY_HT_BBCFG_RSTRX & 0xFFFF);

	b43_phy_ht_reset_cca(dev);
}
예제 #6
0
파일: phy_ht.c 프로젝트: 513855417/linux
static void b43_phy_ht_bphy_reset(struct b43_wldev *dev, bool reset)
{
	u16 tmp;

	tmp = b43_read16(dev, B43_MMIO_PSM_PHY_HDR);
	b43_write16(dev, B43_MMIO_PSM_PHY_HDR,
		    tmp | B43_PSM_HDR_MAC_PHY_FORCE_CLK);

	/* Put BPHY in or take it out of the reset */
	if (reset)
		b43_phy_set(dev, B43_PHY_B_BBCFG,
			    B43_PHY_B_BBCFG_RSTCCA | B43_PHY_B_BBCFG_RSTRX);
	else
		b43_phy_mask(dev, B43_PHY_B_BBCFG,
			     (u16)~(B43_PHY_B_BBCFG_RSTCCA |
				    B43_PHY_B_BBCFG_RSTRX));

	b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp);
}
예제 #7
0
static u16 b43_aphy_op_radio_read(struct b43_wldev *dev, u16 reg)
{
	
	B43_WARN_ON(reg == 1);
	
	reg |= 0x40;

	b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
	return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
}
예제 #8
0
파일: phy_a.c 프로젝트: AppEngine/linux-2.6
static u16 b43_aphy_op_radio_read(struct b43_wldev *dev, u16 reg)
{
	/* Register 1 is a 32-bit register. */
	B43_WARN_ON(reg == 1);
	/* A-PHY needs 0x40 for read access */
	reg |= 0x40;

	b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
	return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
}
static void b43_led_turn_off(struct b43_wldev *dev, u8 led_index,
			     bool activelow)
{
	u16 ctl;

	ctl = b43_read16(dev, B43_MMIO_GPIO_CONTROL);
	if (activelow)
		ctl |= (1 << led_index);
	else
		ctl &= ~(1 << led_index);
	b43_write16(dev, B43_MMIO_GPIO_CONTROL, ctl);
}
예제 #10
0
파일: phy_a.c 프로젝트: E-LLP/n900
static void aphy_channel_switch(struct b43_wldev *dev, unsigned int channel)
{
	u16 freq, r8, tmp;

	freq = channel2freq_a(channel);

	r8 = b43_radio_read16(dev, 0x0008);
	b43_write16(dev, 0x03F0, freq);
	b43_radio_write16(dev, 0x0008, r8);

	//TODO: write max channel TX power? to Radio 0x2D
	tmp = b43_radio_read16(dev, 0x002E);
	tmp &= 0x0080;
	//TODO: OR tmp with the Power out estimation for this channel?
	b43_radio_write16(dev, 0x002E, tmp);

	if (freq >= 4920 && freq <= 5500) {
		/*
		 * r8 = (((freq * 15 * 0xE1FC780F) >> 32) / 29) & 0x0F;
		 *    = (freq * 0.025862069
		 */
		r8 = 3 * freq / 116;	/* is equal to r8 = freq * 0.025862 */
	}
	b43_radio_write16(dev, 0x0007, (r8 << 4) | r8);
	b43_radio_write16(dev, 0x0020, (r8 << 4) | r8);
	b43_radio_write16(dev, 0x0021, (r8 << 4) | r8);
	b43_radio_write16(dev, 0x0022, (b43_radio_read16(dev, 0x0022)
					& 0x000F) | (r8 << 4));
	b43_radio_write16(dev, 0x002A, (r8 << 4));
	b43_radio_write16(dev, 0x002B, (r8 << 4));
	b43_radio_write16(dev, 0x0008, (b43_radio_read16(dev, 0x0008)
					& 0x00F0) | (r8 << 4));
	b43_radio_write16(dev, 0x0029, (b43_radio_read16(dev, 0x0029)
					& 0xFF0F) | 0x00B0);
	b43_radio_write16(dev, 0x0035, 0x00AA);
	b43_radio_write16(dev, 0x0036, 0x0085);
	b43_radio_write16(dev, 0x003A, (b43_radio_read16(dev, 0x003A)
					& 0xFF20) |
			  freq_r3A_value(freq));
	b43_radio_write16(dev, 0x003D,
			  b43_radio_read16(dev, 0x003D) & 0x00FF);
	b43_radio_write16(dev, 0x0081, (b43_radio_read16(dev, 0x0081)
					& 0xFF7F) | 0x0080);
	b43_radio_write16(dev, 0x0035,
			  b43_radio_read16(dev, 0x0035) & 0xFFEF);
	b43_radio_write16(dev, 0x0035, (b43_radio_read16(dev, 0x0035)
					& 0xFFEF) | 0x0010);
	b43_radio_set_tx_iq(dev);
	//TODO: TSSI2dbm workaround
//FIXME	b43_phy_xmitpower(dev);
}
예제 #11
0
static u16 b43_lpphy_op_radio_read(struct b43_wldev *dev, u16 reg)
{
	/* Register 1 is a 32-bit register. */
	B43_WARN_ON(reg == 1);
	/* LP-PHY needs a special bit set for read access */
	if (dev->phy.rev < 2) {
		if (reg != 0x4001)
			reg |= 0x100;
	} else
		reg |= 0x200;

	b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
	return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
}
예제 #12
0
static void b43_led_turn_off(struct b43_wldev *dev, u8 led_index,
			     bool activelow)
{
	struct b43_wl *wl = dev->wl;
	unsigned long flags;
	u16 ctl;

	spin_lock_irqsave(&wl->leds_lock, flags);
	ctl = b43_read16(dev, B43_MMIO_GPIO_CONTROL);
	if (activelow)
		ctl |= (1 << led_index);
	else
		ctl &= ~(1 << led_index);
	b43_write16(dev, B43_MMIO_GPIO_CONTROL, ctl);
	spin_unlock_irqrestore(&wl->leds_lock, flags);
}
예제 #13
0
static void aphy_channel_switch(struct b43_wldev *dev, unsigned int channel)
{
	u16 freq, r8, tmp;

	freq = channel2freq_a(channel);

	r8 = b43_radio_read16(dev, 0x0008);
	b43_write16(dev, 0x03F0, freq);
	b43_radio_write16(dev, 0x0008, r8);

	
	tmp = b43_radio_read16(dev, 0x002E);
	tmp &= 0x0080;
	
	b43_radio_write16(dev, 0x002E, tmp);

	if (freq >= 4920 && freq <= 5500) {
		
		r8 = 3 * freq / 116;	
	}
	b43_radio_write16(dev, 0x0007, (r8 << 4) | r8);
	b43_radio_write16(dev, 0x0020, (r8 << 4) | r8);
	b43_radio_write16(dev, 0x0021, (r8 << 4) | r8);
	b43_radio_maskset(dev, 0x0022, 0x000F, (r8 << 4));
	b43_radio_write16(dev, 0x002A, (r8 << 4));
	b43_radio_write16(dev, 0x002B, (r8 << 4));
	b43_radio_maskset(dev, 0x0008, 0x00F0, (r8 << 4));
	b43_radio_maskset(dev, 0x0029, 0xFF0F, 0x00B0);
	b43_radio_write16(dev, 0x0035, 0x00AA);
	b43_radio_write16(dev, 0x0036, 0x0085);
	b43_radio_maskset(dev, 0x003A, 0xFF20, freq_r3A_value(freq));
	b43_radio_mask(dev, 0x003D, 0x00FF);
	b43_radio_maskset(dev, 0x0081, 0xFF7F, 0x0080);
	b43_radio_mask(dev, 0x0035, 0xFFEF);
	b43_radio_maskset(dev, 0x0035, 0xFFEF, 0x0010);
	b43_radio_set_tx_iq(dev);
	

}
예제 #14
0
static void b43_phy_ht_op_radio_write(struct b43_wldev *dev, u16 reg,
				      u16 value)
{
	b43_write16(dev, B43_MMIO_RADIO24_CONTROL, reg);
	b43_write16(dev, B43_MMIO_RADIO24_DATA, value);
}
예제 #15
0
static void b43_phy_ht_op_write(struct b43_wldev *dev, u16 reg, u16 value)
{
	b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
	b43_write16(dev, B43_MMIO_PHY_DATA, value);
}
예제 #16
0
static u16 b43_phy_ht_op_read(struct b43_wldev *dev, u16 reg)
{
	b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
	return b43_read16(dev, B43_MMIO_PHY_DATA);
}
예제 #17
0
파일: lo.c 프로젝트: Tigrouzen/k1099
static void lo_measure_restore(struct b43_wldev *dev,
			       struct lo_g_saved_values *sav)
{
	struct b43_phy *phy = &dev->phy;
	struct b43_txpower_lo_control *lo = phy->lo_control;
	u16 tmp;

	if (phy->rev >= 2) {
		b43_phy_write(dev, B43_PHY_PGACTL, 0xE300);
		tmp = (phy->pga_gain << 8);
		b43_phy_write(dev, B43_PHY_RFOVERVAL, tmp | 0xA0);
		udelay(5);
		b43_phy_write(dev, B43_PHY_RFOVERVAL, tmp | 0xA2);
		udelay(2);
		b43_phy_write(dev, B43_PHY_RFOVERVAL, tmp | 0xA3);
	} else {
		tmp = (phy->pga_gain | 0xEFA0);
		b43_phy_write(dev, B43_PHY_PGACTL, tmp);
	}
	if (b43_has_hardware_pctl(phy)) {
		b43_gphy_dc_lt_init(dev);
	} else {
		if (lo->rebuild)
			b43_lo_g_adjust_to(dev, 3, 2, 0);
		else
			b43_lo_g_adjust(dev);
	}
	if (phy->type == B43_PHYTYPE_G) {
		if (phy->rev >= 3)
			b43_phy_write(dev, B43_PHY_CCK(0x2E), 0xC078);
		else
			b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x8078);
		if (phy->rev >= 2)
			b43_phy_write(dev, B43_PHY_CCK(0x2F), 0x0202);
		else
			b43_phy_write(dev, B43_PHY_CCK(0x2F), 0x0101);
	}
	b43_write16(dev, 0x3F4, sav->reg_3F4);
	b43_phy_write(dev, B43_PHY_PGACTL, sav->phy_pgactl);
	b43_phy_write(dev, B43_PHY_CCK(0x2A), sav->phy_cck_2A);
	b43_phy_write(dev, B43_PHY_SYNCCTL, sav->phy_syncctl);
	b43_phy_write(dev, B43_PHY_DACCTL, sav->phy_dacctl);
	b43_radio_write16(dev, 0x43, sav->radio_43);
	b43_radio_write16(dev, 0x7A, sav->radio_7A);
	if (!has_tx_magnification(phy)) {
		tmp = sav->radio_52;
		b43_radio_write16(dev, 0x52, (b43_radio_read16(dev, 0x52)
					      & 0xFF0F) | tmp);
	}
	b43_write16(dev, 0x3E2, sav->reg_3E2);
	if (phy->type == B43_PHYTYPE_B &&
	    phy->radio_ver == 0x2050 && phy->radio_rev <= 5) {
		b43_phy_write(dev, B43_PHY_CCK(0x30), sav->phy_cck_30);
		b43_phy_write(dev, B43_PHY_CCK(0x06), sav->phy_cck_06);
	}
	if (phy->rev >= 2) {
		b43_phy_write(dev, B43_PHY_ANALOGOVER, sav->phy_analogover);
		b43_phy_write(dev, B43_PHY_ANALOGOVERVAL,
			      sav->phy_analogoverval);
		b43_phy_write(dev, B43_PHY_CLASSCTL, sav->phy_classctl);
		b43_phy_write(dev, B43_PHY_RFOVER, sav->phy_rfover);
		b43_phy_write(dev, B43_PHY_RFOVERVAL, sav->phy_rfoverval);
		b43_phy_write(dev, B43_PHY_CCK(0x3E), sav->phy_cck_3E);
		b43_phy_write(dev, B43_PHY_CRS0, sav->phy_crs0);
	}
	if (b43_has_hardware_pctl(phy)) {
		tmp = (sav->phy_lo_mask & 0xBFFF);
		b43_phy_write(dev, B43_PHY_LO_MASK, tmp);
		b43_phy_write(dev, B43_PHY_EXTG(0x01), sav->phy_extg_01);
		b43_phy_write(dev, B43_PHY_DACCTL, sav->phy_dacctl_hwpctl);
		b43_phy_write(dev, B43_PHY_CCK(0x14), sav->phy_cck_14);
		b43_phy_write(dev, B43_PHY_HPWR_TSSICTL, sav->phy_hpwr_tssictl);
	}
	b43_radio_selectchannel(dev, sav->old_channel, 1);
}
예제 #18
0
파일: lo.c 프로젝트: Tigrouzen/k1099
static void lo_measure_setup(struct b43_wldev *dev,
			     struct lo_g_saved_values *sav)
{
	struct ssb_sprom *sprom = &dev->dev->bus->sprom;
	struct b43_phy *phy = &dev->phy;
	struct b43_txpower_lo_control *lo = phy->lo_control;
	u16 tmp;

	if (b43_has_hardware_pctl(phy)) {
		sav->phy_lo_mask = b43_phy_read(dev, B43_PHY_LO_MASK);
		sav->phy_extg_01 = b43_phy_read(dev, B43_PHY_EXTG(0x01));
		sav->phy_dacctl_hwpctl = b43_phy_read(dev, B43_PHY_DACCTL);
		sav->phy_cck_14 = b43_phy_read(dev, B43_PHY_CCK(0x14));
		sav->phy_hpwr_tssictl = b43_phy_read(dev, B43_PHY_HPWR_TSSICTL);

		b43_phy_write(dev, B43_PHY_HPWR_TSSICTL,
			      b43_phy_read(dev, B43_PHY_HPWR_TSSICTL)
			      | 0x100);
		b43_phy_write(dev, B43_PHY_EXTG(0x01),
			      b43_phy_read(dev, B43_PHY_EXTG(0x01))
			      | 0x40);
		b43_phy_write(dev, B43_PHY_DACCTL,
			      b43_phy_read(dev, B43_PHY_DACCTL)
			      | 0x40);
		b43_phy_write(dev, B43_PHY_CCK(0x14),
			      b43_phy_read(dev, B43_PHY_CCK(0x14))
			      | 0x200);
	}
	if (phy->type == B43_PHYTYPE_B &&
	    phy->radio_ver == 0x2050 && phy->radio_rev < 6) {
		b43_phy_write(dev, B43_PHY_CCK(0x16), 0x410);
		b43_phy_write(dev, B43_PHY_CCK(0x17), 0x820);
	}
	if (!lo->rebuild && b43_has_hardware_pctl(phy))
		lo_read_power_vector(dev);
	if (phy->rev >= 2) {
		sav->phy_analogover = b43_phy_read(dev, B43_PHY_ANALOGOVER);
		sav->phy_analogoverval =
		    b43_phy_read(dev, B43_PHY_ANALOGOVERVAL);
		sav->phy_rfover = b43_phy_read(dev, B43_PHY_RFOVER);
		sav->phy_rfoverval = b43_phy_read(dev, B43_PHY_RFOVERVAL);
		sav->phy_classctl = b43_phy_read(dev, B43_PHY_CLASSCTL);
		sav->phy_cck_3E = b43_phy_read(dev, B43_PHY_CCK(0x3E));
		sav->phy_crs0 = b43_phy_read(dev, B43_PHY_CRS0);

		b43_phy_write(dev, B43_PHY_CLASSCTL,
			      b43_phy_read(dev, B43_PHY_CLASSCTL)
			      & 0xFFFC);
		b43_phy_write(dev, B43_PHY_CRS0, b43_phy_read(dev, B43_PHY_CRS0)
			      & 0x7FFF);
		b43_phy_write(dev, B43_PHY_ANALOGOVER,
			      b43_phy_read(dev, B43_PHY_ANALOGOVER)
			      | 0x0003);
		b43_phy_write(dev, B43_PHY_ANALOGOVERVAL,
			      b43_phy_read(dev, B43_PHY_ANALOGOVERVAL)
			      & 0xFFFC);
		if (phy->type == B43_PHYTYPE_G) {
			if ((phy->rev >= 7) &&
			    (sprom->boardflags_lo & B43_BFL_EXTLNA)) {
				b43_phy_write(dev, B43_PHY_RFOVER, 0x933);
			} else {
				b43_phy_write(dev, B43_PHY_RFOVER, 0x133);
			}
		} else {
			b43_phy_write(dev, B43_PHY_RFOVER, 0);
		}
		b43_phy_write(dev, B43_PHY_CCK(0x3E), 0);
	}
	sav->reg_3F4 = b43_read16(dev, 0x3F4);
	sav->reg_3E2 = b43_read16(dev, 0x3E2);
	sav->radio_43 = b43_radio_read16(dev, 0x43);
	sav->radio_7A = b43_radio_read16(dev, 0x7A);
	sav->phy_pgactl = b43_phy_read(dev, B43_PHY_PGACTL);
	sav->phy_cck_2A = b43_phy_read(dev, B43_PHY_CCK(0x2A));
	sav->phy_syncctl = b43_phy_read(dev, B43_PHY_SYNCCTL);
	sav->phy_dacctl = b43_phy_read(dev, B43_PHY_DACCTL);

	if (!has_tx_magnification(phy)) {
		sav->radio_52 = b43_radio_read16(dev, 0x52);
		sav->radio_52 &= 0x00F0;
	}
	if (phy->type == B43_PHYTYPE_B) {
		sav->phy_cck_30 = b43_phy_read(dev, B43_PHY_CCK(0x30));
		sav->phy_cck_06 = b43_phy_read(dev, B43_PHY_CCK(0x06));
		b43_phy_write(dev, B43_PHY_CCK(0x30), 0x00FF);
		b43_phy_write(dev, B43_PHY_CCK(0x06), 0x3F3F);
	} else {
		b43_write16(dev, 0x3E2, b43_read16(dev, 0x3E2)
			    | 0x8000);
	}
	b43_write16(dev, 0x3F4, b43_read16(dev, 0x3F4)
		    & 0xF000);

	tmp =
	    (phy->type == B43_PHYTYPE_G) ? B43_PHY_LO_MASK : B43_PHY_CCK(0x2E);
	b43_phy_write(dev, tmp, 0x007F);

	tmp = sav->phy_syncctl;
	b43_phy_write(dev, B43_PHY_SYNCCTL, tmp & 0xFF7F);
	tmp = sav->radio_7A;
	b43_radio_write16(dev, 0x007A, tmp & 0xFFF0);

	b43_phy_write(dev, B43_PHY_CCK(0x2A), 0x8A3);
	if (phy->type == B43_PHYTYPE_G ||
	    (phy->type == B43_PHYTYPE_B &&
	     phy->radio_ver == 0x2050 && phy->radio_rev >= 6)) {
		b43_phy_write(dev, B43_PHY_CCK(0x2B), 0x1003);
	} else
		b43_phy_write(dev, B43_PHY_CCK(0x2B), 0x0802);
	if (phy->rev >= 2)
		b43_dummy_transmission(dev);
	b43_radio_selectchannel(dev, 6, 0);
	b43_radio_read16(dev, 0x51);	/* dummy read */
	if (phy->type == B43_PHYTYPE_G)
		b43_phy_write(dev, B43_PHY_CCK(0x2F), 0);
	if (lo->rebuild)
		lo_measure_txctl_values(dev);
	if (phy->type == B43_PHYTYPE_G && phy->rev >= 3) {
		b43_phy_write(dev, B43_PHY_LO_MASK, 0xC078);
	} else {
		if (phy->type == B43_PHYTYPE_B)
			b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x8078);
		else
			b43_phy_write(dev, B43_PHY_LO_MASK, 0x8078);
	}
}
예제 #19
0
파일: lo.c 프로젝트: Tigrouzen/k1099
void b43_lo_b_measure(struct b43_wldev *dev)
{
	struct b43_phy *phy = &dev->phy;
	u16 regstack[12] = { 0 };
	u16 mls;
	u16 fval;
	int i, j;

	regstack[0] = b43_phy_read(dev, 0x0015);
	regstack[1] = b43_radio_read16(dev, 0x0052) & 0xFFF0;

	if (phy->radio_ver == 0x2053) {
		regstack[2] = b43_phy_read(dev, 0x000A);
		regstack[3] = b43_phy_read(dev, 0x002A);
		regstack[4] = b43_phy_read(dev, 0x0035);
		regstack[5] = b43_phy_read(dev, 0x0003);
		regstack[6] = b43_phy_read(dev, 0x0001);
		regstack[7] = b43_phy_read(dev, 0x0030);

		regstack[8] = b43_radio_read16(dev, 0x0043);
		regstack[9] = b43_radio_read16(dev, 0x007A);
		regstack[10] = b43_read16(dev, 0x03EC);
		regstack[11] = b43_radio_read16(dev, 0x0052) & 0x00F0;

		b43_phy_write(dev, 0x0030, 0x00FF);
		b43_write16(dev, 0x03EC, 0x3F3F);
		b43_phy_write(dev, 0x0035, regstack[4] & 0xFF7F);
		b43_radio_write16(dev, 0x007A, regstack[9] & 0xFFF0);
	}
	b43_phy_write(dev, 0x0015, 0xB000);
	b43_phy_write(dev, 0x002B, 0x0004);

	if (phy->radio_ver == 0x2053) {
		b43_phy_write(dev, 0x002B, 0x0203);
		b43_phy_write(dev, 0x002A, 0x08A3);
	}

	phy->minlowsig[0] = 0xFFFF;

	for (i = 0; i < 4; i++) {
		b43_radio_write16(dev, 0x0052, regstack[1] | i);
		lo_b_r15_loop(dev);
	}
	for (i = 0; i < 10; i++) {
		b43_radio_write16(dev, 0x0052, regstack[1] | i);
		mls = lo_b_r15_loop(dev) / 10;
		if (mls < phy->minlowsig[0]) {
			phy->minlowsig[0] = mls;
			phy->minlowsigpos[0] = i;
		}
	}
	b43_radio_write16(dev, 0x0052, regstack[1] | phy->minlowsigpos[0]);

	phy->minlowsig[1] = 0xFFFF;

	for (i = -4; i < 5; i += 2) {
		for (j = -4; j < 5; j += 2) {
			if (j < 0)
				fval = (0x0100 * i) + j + 0x0100;
			else
				fval = (0x0100 * i) + j;
			b43_phy_write(dev, 0x002F, fval);
			mls = lo_b_r15_loop(dev) / 10;
			if (mls < phy->minlowsig[1]) {
				phy->minlowsig[1] = mls;
				phy->minlowsigpos[1] = fval;
			}
		}
	}
	phy->minlowsigpos[1] += 0x0101;

	b43_phy_write(dev, 0x002F, phy->minlowsigpos[1]);
	if (phy->radio_ver == 0x2053) {
		b43_phy_write(dev, 0x000A, regstack[2]);
		b43_phy_write(dev, 0x002A, regstack[3]);
		b43_phy_write(dev, 0x0035, regstack[4]);
		b43_phy_write(dev, 0x0003, regstack[5]);
		b43_phy_write(dev, 0x0001, regstack[6]);
		b43_phy_write(dev, 0x0030, regstack[7]);

		b43_radio_write16(dev, 0x0043, regstack[8]);
		b43_radio_write16(dev, 0x007A, regstack[9]);

		b43_radio_write16(dev, 0x0052,
				  (b43_radio_read16(dev, 0x0052) & 0x000F)
				  | regstack[11]);

		b43_write16(dev, 0x03EC, regstack[10]);
	}
	b43_phy_write(dev, 0x0015, regstack[0]);
}
예제 #20
0
파일: phy_a.c 프로젝트: AppEngine/linux-2.6
static u16 b43_aphy_op_read(struct b43_wldev *dev, u16 reg)
{
	reg = adjust_phyreg(dev, reg);
	b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
	return b43_read16(dev, B43_MMIO_PHY_DATA);
}
예제 #21
0
파일: phy_a.c 프로젝트: AppEngine/linux-2.6
static void b43_aphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
{
	reg = adjust_phyreg(dev, reg);
	b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
	b43_write16(dev, B43_MMIO_PHY_DATA, value);
}