static u8 bcma_pcicore_polarity_workaround(struct bcma_drv_pci *pc) { u32 tmp; tmp = bcma_pcie_read(pc, BCMA_CORE_PCI_PLP_STATUSREG); if (tmp & BCMA_CORE_PCI_PLP_POLARITYINV_STAT) return BCMA_CORE_PCI_SERDES_RX_CTRL_FORCE | BCMA_CORE_PCI_SERDES_RX_CTRL_POLARITY; else return BCMA_CORE_PCI_SERDES_RX_CTRL_FORCE; }
static u32 bcma_get_cfgspace_addr(struct bcma_drv_pci *pc, unsigned int dev, unsigned int func, unsigned int off) { u32 addr = 0; /* Issue config commands only when the data link is up (atleast * one external pcie device is present). */ if (dev >= 2 || !(bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_LSREG) & BCMA_CORE_PCI_DLLP_LSREG_LINKUP)) goto out; /* Type 0 transaction */ /* Slide the PCI window to the appropriate slot */ pcicore_write32(pc, BCMA_CORE_PCI_SBTOPCI1, BCMA_CORE_PCI_SBTOPCI_CFG0); /* Calculate the address */ addr = pc->host_controller->host_cfg_addr; addr |= (dev << BCMA_CORE_PCI_CFG_SLOT_SHIFT); addr |= (func << BCMA_CORE_PCI_CFG_FUN_SHIFT); addr |= (off & ~3); out: return addr; }
static u8 bcma_pcicore_polarity_workaround(struct bcma_drv_pci *pc) { return (bcma_pcie_read(pc, 0x204) & 0x10) ? 0xC0 : 0x80; }