예제 #1
0
//!  Target power has been externally cycled. Holds BKPT/BKGD low while Vdd rises
//!
//! @return
//!    \ref BDM_RC_OK                 => Success           \n
//!    \ref BDM_RC_VDD_NOT_PRESENT    => various errors
//      
U8 bdmCF_powerOnReset(void) {
U8 rc = 0;

#if (HW_CAPABILITY&CAP_VDDSENSE)
   bdmcf_interfaceIdle();  // Make sure BDM interface is idle
   BKPT_LOW();

   // Wait for Vdd to rise within 50% of 3V and RESET to return high
   // RESET rise may be delayed by target POR
   WAIT_WITH_TIMEOUT_MS( 250 /* ms */, (bdm_targetVddMeasure()>75)&&
                                     (!bdm_option.useResetSignal)||RESET_IS_HIGH);

   // Let signals settle & CPU to finish reset (with BKGD held low)
   WAIT_MS(BKGD_WAITus);

   if (bdm_targetVddMeasure()<=70) // Vpp didn't turn on!
      rc = BDM_RC_VDD_NOT_PRESENT;

   if (bdm_option.useResetSignal && (!RESET_IS_HIGH)) // RESET didn't rise
      rc = BDM_RC_RESET_TIMEOUT_RISE;

   bdmcf_interfaceIdle();  // Make sure BDM interface is idle (BKGD now high)

   // Let signals settle
   WAIT_MS(RESET_SETTLEms);

   cable_status.reset = RESET_DETECTED;    // Record the fact that reset was asserted

#endif // (HW_CAPABILITY&CAP_VDDSENSE)
   return(rc);
}
예제 #2
0
//!  Cycle power OFF to target
//!
//!  @return
//!   \ref BDM_RC_OK                => No error  \n
//!   \ref BDM_RC_VDD_WRONG_MODE    => Target Vdd not controlled by BDM interface \n
//!   \ref BDM_RC_VDD_NOT_REMOVED   => Target Vdd failed to fall \n
//!
uint8_t bdm_cycleTargetVddOff(void) {
uint8_t rc = BDM_RC_OK;

#if (HW_CAPABILITY&CAP_VDDCONTROL)

   (void)bdm_checkTargetVdd();

   if (bdm_option.targetVdd == BDM_TARGET_VDD_OFF)
      return BDM_RC_VDD_WRONG_MODE;

#if (HW_CAPABILITY&CAP_CFVx_HW)
   if  (cable_status.target_type == T_CFVx)
      bdmcf_interfaceIdle();  // Make sure BDM interface is idle
   else
#endif 
   {
#if (HW_CAPABILITY&CAP_BDM)    	  
	  bdmHCS_interfaceIdle();  // Make sure BDM interface is idle
#endif
   }
#if (DEBUG&CYCLE_DEBUG)
   DEBUG_PIN     = 0;
   DEBUG_PIN     = 1;
#endif

   // Power off & wait for Vdd to fall to ~5%
   VDD_OFF();
   WAIT_WITH_TIMEOUT_S( 5 /* s */, (bdm_targetVddMeasure()<10) );

#if (DEBUG&CYCLE_DEBUG)
   DEBUG_PIN   = 1;
   DEBUG_PIN   = 0;
#endif

   if (bdm_targetVddMeasure()>=15) // Vdd didn't turn off!
      rc = BDM_RC_VDD_NOT_REMOVED;

#if (DEBUG&CYCLE_DEBUG)
   DEBUG_PIN     = 0;
   DEBUG_PIN     = 1;
#endif

   (void)bdm_checkTargetVdd(); // Update Target Vdd LED

   // Wait a while with power off
   WAIT_US(RESET_SETTLEms);

   // Clear Vdd monitoring interrupt
#if (HW_CAPABILITY&CAP_VDDSENSE)
   CLEAR_VDD_SENSE_FLAG();  // Clear Vdd monitoring flag
#endif
   (void)bdm_checkTargetVdd();    // Update Target Vdd LED

#endif // CAP_VDDCONTROL

   return(rc);
}
예제 #3
0
//!  Checks Target Vdd  - Updates Target Vdd LED & status
//!
//!  Updates \ref cable_status
//!
uint8_t bdm_checkTargetVdd(void) {
#if (HW_CAPABILITY&CAP_VDDSENSE)
   if (bdm_targetVddMeasure() > VDD_2v) {
      redLedOn();
      if (bdm_option.targetVdd == BDM_TARGET_VDD_OFF)
         cable_status.power = BDM_TARGET_VDD_EXT;
      else
         cable_status.power = BDM_TARGET_VDD_INT;
   }
   else {
      redLedOff();
      if (bdm_option.targetVdd == BDM_TARGET_VDD_OFF)
         cable_status.power = BDM_TARGET_VDD_NONE;
      else {
    	 // Possible overload
         cable_status.power = BDM_TARGET_VDD_ERR;
         VDD_OFF();
      }
   }
#else
   // No target Vdd sensing - assume external Vdd is present
   cable_status.power = BDM_TARGET_VDD_EXT;
#endif // CAP_VDDSENSE
   if ((cable_status.power == BDM_TARGET_VDD_NONE) ||
       (cable_status.power == BDM_TARGET_VDD_ERR))
      return BDM_RC_VDD_NOT_PRESENT;
   return BDM_RC_OK;
}
예제 #4
0
//! Turns on Target Vdd if enabled.
//!
//!  @return
//!   \ref BDM_RC_OK                => Target Vdd confirmed on target \n
//!   \ref BDM_RC_VDD_NOT_PRESENT   => Target Vdd not present
//!
uint8_t bdm_setTargetVdd( void ) {
uint8_t rc = BDM_RC_OK;

#if (HW_CAPABILITY&CAP_VDDSENSE)
   DISABLE_VDD_SENSE_INT();
#endif
   
   switch (bdm_option.targetVdd) {
   case BDM_TARGET_VDD_OFF :
	   VDD_OFF();
	   // Check for externally supplied target Vdd (> 2 V)
	   WAIT_US(VDD_RISE_TIMEus); // Wait for Vdd to rise & stabilise
	   if (bdm_targetVddMeasure()<VDD_2v)
		   rc = BDM_RC_VDD_NOT_PRESENT;
	   break;
   case BDM_TARGET_VDD_3V3 :
	   VDD3_ON();
	   // Wait for Vdd to rise to 90% of 3V
	   WAIT_WITH_TIMEOUT_MS( 100 /* ms */, (bdm_targetVddMeasure()>VDD_3v3));
	   WAIT_US(VDD_RISE_TIMEus); // Wait for Vdd to rise & stabilise
	   if (bdm_targetVddMeasure()<VDD_3v3) {
		   VDD_OFF(); // In case of Vdd overload
		   rc = BDM_RC_VDD_NOT_PRESENT;
	   }
	   break;
   case BDM_TARGET_VDD_5V  :
	   VDD5_ON();
	   // Wait for Vdd to rise to 90% of 5V
	   WAIT_WITH_TIMEOUT_MS( 100 /* ms */, (bdm_targetVddMeasure()>VDD_5v));
	   WAIT_US(VDD_RISE_TIMEus); // Wait for Vdd to rise & stabilise
	   if (bdm_targetVddMeasure()<VDD_5v) {
		   VDD_OFF(); // In case of Vdd overload
		   rc = BDM_RC_VDD_NOT_PRESENT;
	   }
	   break;
   }
#if (HW_CAPABILITY&CAP_VDDSENSE)
   CLEAR_VDD_SENSE_FLAG(); // Clear Vdd Change Event
   ENABLE_VDD_SENSE_INT();
#endif

   (void)bdm_checkTargetVdd(); // Update Target Vdd LED & status
   return (rc);
}