/* stop controller and re-config current chip */ static void bfin_sport_spi_restore_state(struct bfin_sport_spi_master_data *drv_data) { struct bfin_sport_spi_slave_data *chip = drv_data->cur_chip; bfin_sport_spi_disable(drv_data); dev_dbg(drv_data->dev, "restoring spi ctl state\n"); bfin_write(&drv_data->regs->tcr1, chip->ctl_reg); bfin_write(&drv_data->regs->tclkdiv, chip->baud); SSYNC(); bfin_write(&drv_data->regs->rcr1, chip->ctl_reg & ~(ITCLK | ITFS)); SSYNC(); bfin_sport_spi_cs_active(chip); }
static void bfin_sport_spi_u16_duplex(struct bfin_sport_spi_master_data *drv_data) { while (drv_data->rx < drv_data->rx_end) { bfin_write(&drv_data->regs->tx16, *drv_data->tx16++); bfin_sport_spi_stat_poll_complete(drv_data); *drv_data->rx16++ = bfin_read(&drv_data->regs->rx16); } }
static void bfin_sport_spi_u16_reader(struct bfin_sport_spi_master_data *drv_data) { u16 tx_val = drv_data->cur_chip->idle_tx_val; while (drv_data->rx < drv_data->rx_end) { bfin_write(&drv_data->regs->tx16, tx_val); bfin_sport_spi_stat_poll_complete(drv_data); *drv_data->rx16++ = bfin_read(&drv_data->regs->rx16); } }
static void bfin_sport_spi_u16_writer(struct bfin_sport_spi_master_data *drv_data) { u16 dummy; while (drv_data->tx < drv_data->tx_end) { bfin_write(&drv_data->regs->tx16, *drv_data->tx16++); bfin_sport_spi_stat_poll_complete(drv_data); dummy = bfin_read(&drv_data->regs->rx16); } }
static void uart_loop(uint32_t uart_base, int state) { u16 mcr; /* Drain the TX fifo first so bytes don't come back */ while (!(uart_lsr_read(uart_base) & TEMT)) continue; mcr = bfin_read(&pUART->mcr); if (state) mcr |= LOOP_ENA | MRTS; else mcr &= ~(LOOP_ENA | MRTS); bfin_write(&pUART->mcr, mcr); }
static void uart_putc(uint32_t uart_base, const char c) { /* send a \r for compatibility */ if (c == '\n') serial_putc('\r'); WATCHDOG_RESET(); /* wait for the hardware fifo to clear up */ while (!(uart_lsr_read(uart_base) & THRE)) continue; /* queue the character for transmission */ bfin_write(&pUART->thr, c); SSYNC(); WATCHDOG_RESET(); }
static void uart_lsr_clear(uint32_t uart_base) { bfin_write(&pUART->lsr, bfin_read(&pUART->lsr) | -1); }