void i2c_init(void)
{
/* Init kernel objects */
semaphore_init(&i2c_complete, 1, 0);
mutex_init(&i2c_mtx);
/* Clear pending source */
SRCPND = IIC_MASK;
INTPND = IIC_MASK;
/* Enable i2c interrupt in controller */
bitclr32(&INTMOD, IIC_MASK);
bitclr32(&INTMSK, IIC_MASK);
/* Turn on I2C clock */
bitset32(&CLKCON, 1 << 16);
/* Set GPE15 (IICSDA) and GPE14 (IICSCL) to IIC */
GPECON = (GPECON & ~((3 << 30) | (3 << 28))) |
((2 << 30) | (2 << 28));
/* Bus ACK, IICCLK: fPCLK / 16, Rx/Tx Int: Disable, Tx clock: IICCLK/8 */
/* OF PCLK: 49.1568MHz / 16 / 8 = 384.0375 kHz */
IICCON = (7 << 0);
/* SDA line delayed 0 PCLKs */
IICLC = (0 << 0);
/* Turn off I2C clock */
bitclr32(&CLKCON, 1 << 16);
}
void dma_release(void)
{
if(--dma_used == 0)
{
bitclr32(&DMAC_CONFIGURATION, 1<<0);
bitclr32(&CGU_PERI, CGU_DMA_CLOCK_ENABLE);
}
if (dma_used < 0)
panicf("dma_used < 0!");
}
void dma_init(void)
{
/* TODO */
/* Enable interupt on DMA Finish */
/* Clear pending source */
SRCPND = DMA0_MASK | DMA1_MASK | DMA2_MASK | DMA3_MASK;
INTPND = DMA0_MASK | DMA1_MASK | DMA2_MASK | DMA3_MASK;
/* Enable interrupt in controller */
bitclr32(&INTMOD, DMA0_MASK | DMA1_MASK | DMA2_MASK | DMA3_MASK);
bitclr32(&INTMSK, DMA0_MASK | DMA1_MASK | DMA2_MASK | DMA3_MASK);
}
void pcm_rec_dma_stop(void)
{
is_recording = false;
VIC_INT_EN_CLEAR = INTERRUPT_I2SIN;
I2SIN_MASK = 0; /* disables all interrupts */
rec_dma_addr = NULL;
rec_dma_size = 0;
if (!is_playing)
bitclr32(&CGU_AUDIO, (1<<11));
bitclr32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE);
}
static void as3525v2_disconnect(void)
{
/* Disable clock */
CGU_USB = 0;
usb_delay();
bitclr32(&CGU_PERI, CGU_USB_CLOCK_ENABLE);
}
void sdma_channel_close(unsigned int channel)
{
struct channel_control_block *ccb_p;
int i;
if (channel == 0 || channel >= CH_NUM)
return;
ccb_p = &ccb_array[channel];
/* Block callbacks (if not initialized, it won't be set). */
bitclr32(&sdma_enabled_ints, 1ul << channel);
if (ccb_p->status.opened_init == 0)
return;
/* Stop the channel if running */
for (i = ccb_p->channel_desc->bd_count - 1; i >= 0; i--)
ccb_p->base_bd_ptr[i].mode.status &= ~BD_DONE;
sdma_channel_stop(channel);
/* No ownership */
set_channel_ownership(channel, 0);
/* Cannot schedule it again */
sdma_channel_set_priority(channel, 0);
/* Reset channel control block entry */
memset(ccb_p, 0x00, sizeof (struct channel_control_block));
}
void dma_pause_channel(int channel)
{
/* Disable the channel - clears the FIFO after sending last word */
bitclr32(&DMAC_CH_CONFIGURATION(channel), 1<<0);
/* Wait for it to go inactive */
while (DMAC_CH_CONFIGURATION(channel) & (1<<17));
}
static void LCD_CTRL_clock(bool onoff)
{
if(onoff)
{
GPCCON &=~0xFFF000FC;
GPCCON |= 0xAAA000A8;
GPCUP |= 0xFC0E;
GPDCON &=~0xFFF0FFF0;
GPDCON |= 0xAAA0AAA0;
GPDUP |= 0xFCFC;
bitset32(&CLKCON, 0x20); /* enable LCD clock */
LCDCON1 |= LCD_ENVID;
}
else
{
GPCCON &= ~0xFFF000FC;
GPCUP &= ~0xFC0E;
GPDCON &= ~0xFFF0FFF0;
GPDUP &= ~0xFCFC;
LCDCON1 &= ~LCD_ENVID; /* Must disable first or bus may freeze */
bitclr32(&CLKCON, 0x20); /* disable LCD clock */
}
}
static void LCD_SPI_stop(void)
{
LCD_SPI_SS(false);
SPCON0 &= ~0x10;
bitclr32(&CLKCON, 0x40000); /* disable SPI clock */
}
static void as3525v2_disconnect(void)
{
/* Disconnect */
DCTL |= DCTL_sftdiscon;
sleep(HZ/20);
/* Disable clock */
CGU_USB = 0;
usb_delay();
bitclr32(&CGU_PERI, CGU_USB_CLOCK_ENABLE);
}
int fmradio_i2c_read(unsigned char address, unsigned char* buf, int count)
{
#ifdef SANSA_FUZEV2
bitclr32(&CCU_IO, 1<<12);
#endif
int ret = i2c_read_data(fm_i2c_bus, address, -1, buf, count);
#ifdef SANSA_FUZEV2
bitset32(&CCU_IO, 1<<12);
#endif
return ret;
}
void i2c_write(int addr, const unsigned char *buf, int count)
{
if (count <= 0)
return;
mutex_lock(&i2c_mtx);
/* Turn on I2C clock */
bitset32(&CLKCON, 1 << 16);
/* Set mode to master transmitter and enable lines */
IICSTAT = I2C_MODE_MASTER | I2C_MODE_TX | I2C_RXTX_ENB;
/* Set buffer start and count */
buf_ptr = (unsigned char *)buf;
buf_count = count;
/* Send slave address and then data */
SRCPND = IIC_MASK;
INTPND = IIC_MASK;
IICCON |= I2C_TXRX_INTENB;
/* Load slave address into shift register */
IICDS = addr & 0xfe;
/* Generate START */
IICSTAT = I2C_MODE_MASTER | I2C_MODE_TX | I2C_START | I2C_RXTX_ENB;
if (semaphore_wait(&i2c_complete, HZ) != OBJ_WAIT_SUCCEEDED)
{
/* Something went wrong - stop transmission */
int oldlevel = disable_irq_save();
i2c_stop();
restore_irq(oldlevel);
}
/* Go back to slave receive mode and disable lines */
IICSTAT = 0;
/* Turn off I2C clock */
bitclr32(&CLKCON, 1 << 16);
mutex_unlock(&i2c_mtx);
}
void usb_drv_exit(void)
{
DCTL = DCTL_pwronprgdone | DCTL_sftdiscon;
VIC_INT_EN_CLEAR = INTERRUPT_USB;
GAHBCFG &= ~GAHBCFG_glblintrmsk;
sleep(HZ/20);
PCGCCTL = 1; /* Shut down PHY clock */
CGU_USB = 0;
bitclr32(&CGU_PERI, CGU_USB_CLOCK_ENABLE);
/* reset USB_PHY to prevent power consumption */
CCU_SRC = CCU_SRC_USB_PHY_EN;
CCU_SRL = CCU_SRL_MAGIC_NUMBER;
CCU_SRL = 0;
}
static void lcd_set_power(bool powered)
{
if (powered)
{
lcd_powered = false;
lcd_write_reg(0x04, 0x00);
lcd_enable_interface(false);
bitclr32(&GPIO3_DR, (1 << 12));
mc13783_clear(MC13783_REGULATOR_MODE1, MC13783_VCAMEN);
}
else
{
mc13783_set(MC13783_REGULATOR_MODE1, MC13783_VCAMEN);
bitset32(&GPIO3_DR, (1 << 12));
lcd_enable_interface(true);
lcd_write_reg(0x04, 0x01);
lcd_powered = true;
}
}
void pcm_play_dma_stop(void)
{
is_playing = false;
dma_disable_channel(0);
/* Ensure byte counts read back 0 */
DMAC_CH_SRC_ADDR(0) = 0;
dma_start_addr = NULL;
dma_start_size = 0;
dma_rem_size = 0;
dma_release();
#ifdef HAVE_RECORDING
if (!is_recording)
bitclr32(&CGU_AUDIO, (1<<11));
#endif
play_callback_pending = false;
}
void usb_drv_exit(void)
{
tick_remove_task(usb_tick);
USB_DEV_CTRL |= (1<<10); /* soft disconnect */
usb_phy_suspend();
/*
* mask all interrupts _before_ writing to VIC_INT_EN_CLEAR,
* or else the core might latch the interrupt while
* the write ot VIC_INT_EN_CLEAR is in the pipeline and
* so cause a fake spurious interrupt.
*/
USB_DEV_EP_INTR_MASK = 0xffffffff;
USB_DEV_INTR_MASK = 0xffffffff;
VIC_INT_EN_CLEAR = INTERRUPT_USB;
CGU_USB &= ~(1<<5);
bitclr32(&CGU_PERI, CGU_USB_CLOCK_ENABLE);
/* Disable UVDD generating LDO */
ascodec_write(AS3515_USB_UTIL, ascodec_read(AS3515_USB_UTIL) & ~(1<<4));
usb_disable_pll();
cpu_boost(0);
initialized = false;
logf("usb_drv_exit() !!!!\n");
}