static struct cphy *mv88e1xxx_phy_create(adapter_t *adapter, int phy_addr,
struct mdio_ops *mdio_ops)
{
struct cphy *cphy = kzalloc(sizeof(*cphy), GFP_KERNEL);
if (!cphy)
return NULL;
cphy_init(cphy, adapter, phy_addr, &mv88e1xxx_ops, mdio_ops);
/* Configure particular PHY's to run in a different mode. */
if ((board_info(adapter)->caps & SUPPORTED_TP) &&
board_info(adapter)->chip_phy == CHBT_PHY_88E1111) {
/*
* Configure the PHY transmitter as class A to reduce EMI.
*/
(void) simple_mdio_write(cphy,
MV88E1XXX_EXTENDED_ADDR_REGISTER, 0xB);
(void) simple_mdio_write(cphy,
MV88E1XXX_EXTENDED_REGISTER, 0x8004);
}
(void) mv88e1xxx_downshift_set(cphy, 1); /* Enable downshift */
/* LED */
if (is_T2(adapter)) {
(void) simple_mdio_write(cphy,
MV88E1XXX_LED_CONTROL_REGISTER, 0x1);
}
return cphy;
}
static struct cphy *mv88e1xxx_phy_create(struct net_device *dev, int phy_addr,
const struct mdio_ops *mdio_ops)
{
struct adapter *adapter = netdev_priv(dev);
struct cphy *cphy = kzalloc(sizeof(*cphy), GFP_KERNEL);
if (!cphy)
return NULL;
cphy_init(cphy, dev, phy_addr, &mv88e1xxx_ops, mdio_ops);
if ((board_info(adapter)->caps & SUPPORTED_TP) &&
board_info(adapter)->chip_phy == CHBT_PHY_88E1111) {
(void) simple_mdio_write(cphy,
MV88E1XXX_EXTENDED_ADDR_REGISTER, 0xB);
(void) simple_mdio_write(cphy,
MV88E1XXX_EXTENDED_REGISTER, 0x8004);
}
(void) mv88e1xxx_downshift_set(cphy, 1);
if (is_T2(adapter)) {
(void) simple_mdio_write(cphy,
MV88E1XXX_LED_CONTROL_REGISTER, 0x1);
}
return cphy;
}
void main(void)
{
u32_t count = 20;
startup_board();
debug("[%s] [%2s] [%6s] [%*s]\n", "abcd", "abcd", "abcd", 5, "abcd");
debug("[%d] [%d] [%d] [%4d] [%12d] [%*d]\n", 0, 1, -1, 654321, 654321, 9, 654321);
debug("[%d] [%d] [%d] [%4d] [%12d] [%*d]\n", 0, 1, -1, -654321, -654321, 9, -654321);
debug("[%u] [%u] [%u] [%4u] [%12u] [%*u]\n", 0, 1, -1, 654321, 654321, 9, 654321);
debug("[%x] [%x] [%x] [%4x] [%12x] [%*x]\n", 0, 1, -1, 654321, 654321, 9, 654321);
debug("[%c] [%3c] [%*c]\n", '.', '.', 9, '.');
start_thread(&thread_1, (function_t)blink, &data_1, stack_1, sizeof(stack_1));
start_thread(&thread_2, (function_t)blink, &data_2, stack_2, sizeof(stack_2));
debug("main: hello\n");
board_info();
while (count--)
{
sleep(250);
debug("main: count {%d}\n", count);
}
debug("main: bue\n");
sleep(10);
}
struct aupcmcia_machdep *
aupcmcia_machdep(void)
{
const struct alchemy_board *board;
board = board_info();
return (board->ab_pcmcia);
}
const struct auspi_machdep *
auspi_machdep(bus_addr_t ba)
{
const struct alchemy_board *board;
board = board_info();
if (board->ab_spi != NULL)
return (board->ab_spi(ba));
return NULL;
}
/*
* Export our interrupt map function so aupci can find it.
*/
int
aupci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
{
const struct alchemy_board *board;
board = board_info();
if (board->ab_pci_intr_map != NULL)
return (board->ab_pci_intr_map(pa, ihp));
return 1;
}
/*
* External interrupt handler for boards using elmer0.
*/
int t1_elmer0_ext_intr_handler(adapter_t *adapter)
{
struct cphy *phy;
int phy_cause;
u32 cause;
t1_tpi_read(adapter, A_ELMER0_INT_CAUSE, &cause);
switch (board_info(adapter)->board) {
#ifdef CONFIG_CHELSIO_T1_1G
case CHBT_BOARD_CHT204:
case CHBT_BOARD_CHT204E:
case CHBT_BOARD_CHN204:
case CHBT_BOARD_CHT204V: {
int i, port_bit;
for_each_port(adapter, i) {
port_bit = i + 1;
if (!(cause & (1 << port_bit)))
continue;
phy = adapter->port[i].phy;
phy_cause = phy->ops->interrupt_handler(phy);
if (phy_cause & cphy_cause_link_change)
t1_link_changed(adapter, i);
}
break;
}
case CHBT_BOARD_CHT101:
if (cause & ELMER0_GP_BIT1) { /* Marvell 88E1111 interrupt */
phy = adapter->port[0].phy;
phy_cause = phy->ops->interrupt_handler(phy);
if (phy_cause & cphy_cause_link_change)
t1_link_changed(adapter, 0);
}
break;
case CHBT_BOARD_7500: {
int p;
/*
* Elmer0's interrupt cause isn't useful here because there is
* only one bit that can be set for all 4 ports. This means
* we are forced to check every PHY's interrupt status
* register to see who initiated the interrupt.
*/
for_each_port(adapter, p) {
phy = adapter->port[p].phy;
phy_cause = phy->ops->interrupt_handler(phy);
if (phy_cause & cphy_cause_link_change)
t1_link_changed(adapter, p);
}
break;
}
/* Type 1 -- System Information */
static void *
smbios_type_1_init(void *start)
{
struct smbios_type_1 *p = (struct smbios_type_1 *)start;
char product_name[50];
#ifdef LOONGSON_2G5536
char *board_family = "Loongson2";
#else
char *board_family = "Loongson3";
#endif
char loongson_version[10];
char *q;
int i;
memset(p, 0, sizeof(*p));
p->header.type = 1;
p->header.length = sizeof(struct smbios_type_1);
p->header.handle = smbios_table_handle++;
p->manufacturer_str = 1;
p->product_name_str = 2;
p->version_str = 3;
p->serial_number_str = 0;
p->wake_up_type = 0x06; /* power switch */
p->sku_str = 0;
p->family_str = 4;
board_info(product_name);
prase_name(product_name, loongson_version);
uuid_generate(p->uuid);
start += sizeof(struct smbios_type_1);
strcpy((char *)start, "Loongson");
start += strlen("Loongson") + 1;
strcpy((char *)start, product_name);
start += strlen(product_name) + 1;
strcpy((char *)start, loongson_version);
start += strlen(loongson_version) + 1;
strcpy((char *)start, board_family);
start += strlen(board_family) + 1;
*((uint8_t *)start) = 0;
return start+1;
}
int t1_elmer0_ext_intr_handler(adapter_t *adapter)
{
struct cphy *phy;
int phy_cause;
u32 cause;
t1_tpi_read(adapter, A_ELMER0_INT_CAUSE, &cause);
switch (board_info(adapter)->board) {
#ifdef CONFIG_CHELSIO_T1_1G
case CHBT_BOARD_CHT204:
case CHBT_BOARD_CHT204E:
case CHBT_BOARD_CHN204:
case CHBT_BOARD_CHT204V: {
int i, port_bit;
for_each_port(adapter, i) {
port_bit = i + 1;
if (!(cause & (1 << port_bit)))
continue;
phy = adapter->port[i].phy;
phy_cause = phy->ops->interrupt_handler(phy);
if (phy_cause & cphy_cause_link_change)
t1_link_changed(adapter, i);
}
break;
}
case CHBT_BOARD_CHT101:
if (cause & ELMER0_GP_BIT1) {
phy = adapter->port[0].phy;
phy_cause = phy->ops->interrupt_handler(phy);
if (phy_cause & cphy_cause_link_change)
t1_link_changed(adapter, 0);
}
break;
case CHBT_BOARD_7500: {
int p;
for_each_port(adapter, p) {
phy = adapter->port[p].phy;
phy_cause = phy->ops->interrupt_handler(phy);
if (phy_cause & cphy_cause_link_change)
t1_link_changed(adapter, p);
}
break;
}
/* Type 2 -- Board Information */
static void *
smbios_type_2_init(void *start)
{
struct smbios_type_2 *p = (struct smbios_type_2 *)start;
char board_name[50];
char board_version[10];
char *motherboard_serial[20];
memset(p, 0, sizeof(*p));
p->header.type = 2;
p->header.length = sizeof(struct smbios_type_2);
p->header.handle = smbios_table_handle++;
p->manufacturer_str = 1;
p->product_name_str = 2;
p->version_str = 3;
p->serial_number_str = 0;
p->asset_tag_str = 0;
p->feature_flags = 0x9;
p->location_in_chassis_str = 0;
p->chassis_handle = 0;
p->board_type = 0x0a;
p->number_contained_object_handles = 0;
p->contained_object_handles = 0;
board_info(board_name);
prase_name(board_name, board_version);
start += sizeof(struct smbios_type_2);
strcpy((char *)start, "Loongson");
start += strlen("Loongson") + 1;
strcpy((char *)start, board_name);
start += strlen(board_name) + 1;
strcpy((char *)start, board_version);
start += strlen(board_version) + 1;
*((uint8_t *)start) = 0;
return start+ 1;
}
/*
* External interrupt handler for boards using elmer0.
*/
int elmer0_ext_intr_handler(adapter_t *adapter)
{
struct cphy *phy;
int phy_cause;
u32 cause;
t1_tpi_read(adapter, A_ELMER0_INT_CAUSE, &cause);
switch (board_info(adapter)->board) {
case CHBT_BOARD_N210:
case CHBT_BOARD_N110:
if (cause & ELMER0_GP_BIT6) { /* Marvell 88x2010 interrupt */
phy = adapter->port[0].phy;
phy_cause = phy->ops->interrupt_handler(phy);
if (phy_cause & cphy_cause_link_change)
link_changed(adapter, 0);
}
break;
}
t1_tpi_write(adapter, A_ELMER0_INT_CAUSE, cause);
return 0;
}
/**
* @brief Return board revision
*
* @return REV_1 or REV_2
*/
int
board_rev ()
{
board_t b = board_info();
return b.rev;
}
unsigned board_msm_version(void)
{
board_info();
msm_version = (msm_version & 0xffff0000) >> 16;
return msm_version;
}
void
mach_init(int argc, char **argv, yamon_env_var *envp, u_long memsize)
{
bus_space_handle_t sh;
void *kernend;
const char *cp;
u_long first, last;
void *v;
int freqok, howto, i;
const struct alchemy_board *board;
extern char edata[], end[]; /* XXX */
board = board_info();
KASSERT(board != NULL);
/* clear the BSS segment */
kernend = (void *)mips_round_page(end);
memset(edata, 0, (char *)kernend - edata);
/* set CPU model info for sysctl_hw */
strcpy(cpu_model, board->ab_name);
/* save the yamon environment pointer */
yamon_envp = envp;
/* Use YAMON callbacks for early console I/O */
cn_tab = &yamon_promcd;
/*
* Set up the exception vectors and CPU-specific function
* vectors early on. We need the wbflush() vector set up
* before comcnattach() is called (or at least before the
* first printf() after that is called).
* Sets up mips_cpu_flags that may be queried by other
* functions called during startup.
* Also clears the I+D caches.
*/
mips_vector_init();
/*
* Set the VM page size.
*/
uvm_setpagesize();
/*
* Use YAMON's CPU frequency if available.
*/
freqok = yamon_setcpufreq(1);
/*
* Initialize bus space tags.
*/
au_cpureg_bus_mem_init(&alchemy_cpuregt, &alchemy_cpuregt);
aubus_st = &alchemy_cpuregt;
/*
* Calibrate the timer if YAMON failed to tell us.
*/
if (!freqok) {
bus_space_map(aubus_st, PC_BASE, PC_SIZE, 0, &sh);
au_cal_timers(aubus_st, sh);
bus_space_unmap(aubus_st, sh, PC_SIZE);
}
/*
* Perform board-specific initialization.
*/
board->ab_init();
/*
* Bring up the console.
*/
#if NCOM > 0
#ifdef CONSPEED
if (aucomcnrate == 0)
aucomcnrate = CONSPEED;
#else /* !CONSPEED */
/*
* Learn default console speed. We use the YAMON environment,
* though we could probably also figure it out by checking the
* aucom registers directly.
*/
if ((aucomcnrate == 0) && ((cp = yamon_getenv("modetty0")) != NULL))
aucomcnrate = strtoul(cp, NULL, 0);
if (aucomcnrate == 0) {
printf("FATAL: `modetty0' YAMON variable not set. Set it\n");
printf(" to the speed of the console and try again.\n");
printf(" Or, build a kernel with the `CONSPEED' "
"option.\n");
panic("mach_init");
}
#endif /* CONSPEED */
/*
* Delay to allow firmware putchars to complete.
* FIFO depth * character time.
* character time = (1000000 / (defaultrate / 10))
*/
delay(160000000 / aucomcnrate);
if (com_aubus_cnattach(UART0_BASE, aucomcnrate) != 0)
panic("mach_init: unable to initialize serial console");
#else /* NCOM > 0 */
panic("mach_init: not configured to use serial console");
#endif /* NAUCOM > 0 */
/*
* Look at arguments passed to us and compute boothowto.
*/
boothowto = RB_AUTOBOOT;
#ifdef KADB
boothowto |= RB_KDB;
#endif
for (i = 1; i < argc; i++) {
for (cp = argv[i]; *cp; cp++) {
/* Ignore superfluous '-', if there is one */
if (*cp == '-')
continue;
howto = 0;
BOOT_FLAG(*cp, howto);
if (! howto)
printf("bootflag '%c' not recognised\n", *cp);
else
boothowto |= howto;
}
}
/*
* Determine the memory size. Use the `memsize' PMON
* variable. If that's not available, panic.
*
* Note: Reserve the first page! That's where the trap
* vectors are located.
*/
#if defined(MEMSIZE)
memsize = MEMSIZE;
#else
if (memsize == 0) {
if ((cp = yamon_getenv("memsize")) != NULL)
memsize = strtoul(cp, NULL, 0);
else {
printf("FATAL: `memsize' YAMON variable not set. Set it to\n");
printf(" the amount of memory (in MB) and try again.\n");
printf(" Or, build a kernel with the `MEMSIZE' "
"option.\n");
panic("mach_init");
}
}
#endif /* MEMSIZE */
printf("Memory size: 0x%08lx\n", memsize);
physmem = btoc(memsize);
mem_clusters[mem_cluster_cnt].start = PAGE_SIZE;
mem_clusters[mem_cluster_cnt].size =
memsize - mem_clusters[mem_cluster_cnt].start;
mem_cluster_cnt++;
/*
* Load the rest of the available pages into the VM system.
*/
first = round_page(MIPS_KSEG0_TO_PHYS(kernend));
last = mem_clusters[0].start + mem_clusters[0].size;
uvm_page_physload(atop(first), atop(last), atop(first), atop(last),
VM_FREELIST_DEFAULT);
/*
* Initialize message buffer (at end of core).
*/
mips_init_msgbuf();
/*
* Initialize the virtual memory system.
*/
pmap_bootstrap();
/*
* Init mapping for u page(s) for proc0.
*/
v = (void *) uvm_pageboot_alloc(USPACE);
lwp0.l_addr = proc0paddr = (struct user *)v;
lwp0.l_md.md_regs = (struct frame *)((char *)v + USPACE) - 1;
proc0paddr->u_pcb.pcb_context[11] =
MIPS_INT_MASK | MIPS_SR_INT_IE; /* SR */
/*
* Initialize debuggers, and break into them, if appropriate.
*/
#if NKSYMS || defined(DDB) || defined(LKM)
ksyms_init(0, 0, 0);
#endif
#ifdef DDB
if (boothowto & RB_KDB)
Debugger();
#endif
}
/**
* @brief Return board model
*
* @return MODEL_A or MODEL_B
*/
int
board_model ()
{
board_t b = board_info();
return b.model;
}
unsigned board_hw_version(void)
{
board_info();
return platform_version;
}
void
cpu_reboot(int howto, char *bootstr)
{
static int waittime = -1;
const struct alchemy_board *board;
/* Take a snapshot before clobbering any registers. */
if (curproc)
savectx((struct user *)curpcb);
board = board_info();
KASSERT(board != NULL);
/* If "always halt" was specified as a boot flag, obey. */
if (boothowto & RB_HALT)
howto |= RB_HALT;
boothowto = howto;
/* If system is cold, just halt. */
if (cold) {
boothowto |= RB_HALT;
goto haltsys;
}
if ((boothowto & RB_NOSYNC) == 0 && waittime < 0) {
waittime = 0;
/*
* Synchronize the disks....
*/
vfs_shutdown();
/*
* If we've been adjusting the clock, the todr
* will be out of synch; adjust it now.
*/
resettodr();
}
/* Disable interrupts. */
splhigh();
if (boothowto & RB_DUMP)
dumpsys();
haltsys:
/* Run any shutdown hooks. */
doshutdownhooks();
if ((boothowto & RB_POWERDOWN) == RB_POWERDOWN)
if (board && board->ab_poweroff)
board->ab_poweroff();
/*
* YAMON may autoboot (depending on settings), and we cannot pass
* flags to it (at least I haven't figured out how to yet), so
* we "pseudo-halt" now.
*/
if (boothowto & RB_HALT) {
printf("\n");
printf("The operating system has halted.\n");
printf("Please press any key to reboot.\n\n");
cnpollc(1); /* For proper keyboard command handling */
cngetc();
cnpollc(0);
}
printf("reseting board...\n\n");
/*
* Try to use board-specific reset logic, which might involve a better
* hardware reset.
*/
if (board->ab_reboot)
board->ab_reboot();
#if 1
/* XXX
* For some reason we are leaving the ethernet MAC in a state where
* YAMON isn't happy with it. So just call the reset vector (grr,
* Alchemy YAMON doesn't have a "reset" command).
*/
mips_icache_sync_all();
mips_dcache_wbinv_all();
__asm volatile("jr %0" :: "r"(MIPS_RESET_EXC_VEC));
#else
printf("%s\n\n", ((howto & RB_HALT) != 0) ? "halted." : "rebooting...");
yamon_exit(boothowto);
printf("Oops, back from yamon_exit()\n\nSpinning...");
#endif
for (;;)
/* spin forever */ ; /* XXX */
/*NOTREACHED*/
}
unsigned board_machtype(void)
{
board_info();
return hw_platform;
}
unsigned board_msm_id(void)
{
board_info();
return target_msm_id;
}
/**
* @brief Return the amount of system memory
*
* @return MEM_256 or MEM_512
*/
int
board_mem ()
{
board_t b = board_info();
return b.mem;
}