static GLboolean brwProgramStringNotify( GLcontext *ctx,
GLenum target,
struct gl_program *prog )
{
struct brw_context *brw = brw_context(ctx);
int i;
if (target == GL_FRAGMENT_PROGRAM_ARB) {
struct gl_fragment_program *fprog = (struct gl_fragment_program *) prog;
struct brw_fragment_program *newFP = brw_fragment_program(fprog);
const struct brw_fragment_program *curFP =
brw_fragment_program_const(brw->fragment_program);
if (fprog->FogOption) {
_mesa_append_fog_code(ctx, fprog);
fprog->FogOption = GL_NONE;
}
if (newFP == curFP)
brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
newFP->id = brw->program_id++;
newFP->isGLSL = brw_wm_is_glsl(fprog);
}
else if (target == GL_VERTEX_PROGRAM_ARB) {
struct gl_vertex_program *vprog = (struct gl_vertex_program *) prog;
struct brw_vertex_program *newVP = brw_vertex_program(vprog);
const struct brw_vertex_program *curVP =
brw_vertex_program_const(brw->vertex_program);
if (newVP == curVP)
brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
if (newVP->program.IsPositionInvariant) {
_mesa_insert_mvp_code(ctx, &newVP->program);
}
newVP->id = brw->program_id++;
/* Also tell tnl about it:
*/
_tnl_program_string(ctx, target, prog);
}
/* Reject programs with subroutines, which are totally broken at the moment
* (all program flows return when any program flow returns, and
* the VS also hangs if a function call calls a function.
*
* See piglit glsl-{vs,fs}-functions-[23] tests.
*/
for (i = 0; i < prog->NumInstructions; i++) {
if (prog->Instructions[i].Opcode == OPCODE_CAL) {
shader_error(ctx, prog,
"i965 driver doesn't yet support uninlined function "
"calls. Move to using a single return statement at "
"the end of the function to work around it.");
return GL_FALSE;
}
}
return GL_TRUE;
}
static void
gen6_upload_wm_push_constants(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
/* BRW_NEW_FRAGMENT_PROGRAM */
const struct brw_fragment_program *fp =
brw_fragment_program_const(brw->fragment_program);
/* CACHE_NEW_WM_PROG */
const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
/* Updates the ParameterValues[i] pointers for all parameters of the
* basic type of PROGRAM_STATE_VAR.
*/
/* XXX: Should this happen somewhere before to get our state flag set? */
_mesa_load_state_parameters(ctx, fp->program.Base.Parameters);
if (prog_data->base.nr_params == 0) {
brw->wm.base.push_const_size = 0;
} else {
float *constants;
unsigned int i;
constants = brw_state_batch(brw, AUB_TRACE_WM_CONSTANTS,
prog_data->base.nr_params * sizeof(float),
32, &brw->wm.base.push_const_offset);
for (i = 0; i < prog_data->base.nr_params; i++) {
constants[i] = *prog_data->base.param[i];
}
if (0) {
fprintf(stderr, "WM constants:\n");
for (i = 0; i < prog_data->base.nr_params; i++) {
if ((i & 7) == 0)
fprintf(stderr, "g%d: ", prog_data->first_curbe_grf + i / 8);
fprintf(stderr, "%8f ", constants[i]);
if ((i & 7) == 7)
fprintf(stderr, "\n");
}
if ((i & 7) != 0)
fprintf(stderr, "\n");
fprintf(stderr, "\n");
}
brw->wm.base.push_const_size = ALIGN(prog_data->base.nr_params, 8) / 8;
}
if (brw->gen >= 7) {
gen7_upload_constant_state(brw, &brw->wm.base, true,
_3DSTATE_CONSTANT_PS);
}
}
static void
upload_ps_extra(struct brw_context *brw)
{
/* BRW_NEW_FRAGMENT_PROGRAM */
const struct brw_fragment_program *fp =
brw_fragment_program_const(brw->fragment_program);
/* BRW_NEW_FS_PROG_DATA */
const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
/* BRW_NEW_NUM_SAMPLES | _NEW_MULTISAMPLE */
const bool multisampled_fbo = brw->num_samples > 1;
gen8_upload_ps_extra(brw, &fp->program, prog_data, multisampled_fbo);
}
static void
gen6_upload_wm_push_constants(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
struct gl_context *ctx = &intel->ctx;
/* BRW_NEW_FRAGMENT_PROGRAM */
const struct brw_fragment_program *fp =
brw_fragment_program_const(brw->fragment_program);
/* Updates the ParameterValues[i] pointers for all parameters of the
* basic type of PROGRAM_STATE_VAR.
*/
/* XXX: Should this happen somewhere before to get our state flag set? */
_mesa_load_state_parameters(ctx, fp->program.Base.Parameters);
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->nr_params != 0) {
float *constants;
unsigned int i;
constants = brw_state_batch(brw, AUB_TRACE_WM_CONSTANTS,
brw->wm.prog_data->nr_params *
sizeof(float),
32, &brw->wm.push_const_offset);
for (i = 0; i < brw->wm.prog_data->nr_params; i++) {
constants[i] = convert_param(brw->wm.prog_data->param_convert[i],
brw->wm.prog_data->param[i]);
}
if (0) {
printf("WM constants:\n");
for (i = 0; i < brw->wm.prog_data->nr_params; i++) {
if ((i & 7) == 0)
printf("g%d: ", brw->wm.prog_data->first_curbe_grf + i / 8);
printf("%8f ", constants[i]);
if ((i & 7) == 7)
printf("\n");
}
if ((i & 7) != 0)
printf("\n");
printf("\n");
}
}
}
static void
upload_wm_state(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
/* BRW_NEW_FRAGMENT_PROGRAM */
const struct brw_fragment_program *fp =
brw_fragment_program_const(brw->fragment_program);
/* BRW_NEW_FS_PROG_DATA */
const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
/* _NEW_BUFFERS */
const bool multisampled_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
/* In case of non 1x per sample shading, only one of SIMD8 and SIMD16
* should be enabled. We do 'SIMD16 only' dispatch if a SIMD16 shader
* is successfully compiled. In majority of the cases that bring us
* better performance than 'SIMD8 only' dispatch.
*/
const int min_inv_per_frag = _mesa_get_min_invocations_per_fragment(
ctx, brw->fragment_program, false);
/* BRW_NEW_FS_PROG_DATA | _NEW_COLOR */
const bool dual_src_blend_enable = prog_data->dual_src_blend &&
(ctx->Color.BlendEnabled & 1) &&
ctx->Color.Blend[0]._UsesDualSrc;
/* _NEW_COLOR, _NEW_MULTISAMPLE */
const bool kill_enable = prog_data->uses_kill || ctx->Color.AlphaEnabled ||
ctx->Multisample.SampleAlphaToCoverage ||
prog_data->uses_omask;
/* Rendering against the gl-context is always taken into account. */
const bool statistic_enable = true;
/* _NEW_LINE | _NEW_POLYGON | _NEW_BUFFERS | _NEW_COLOR |
* _NEW_MULTISAMPLE
*/
gen6_upload_wm_state(brw, fp, prog_data, &brw->wm.base,
multisampled_fbo, min_inv_per_frag,
dual_src_blend_enable, kill_enable,
brw_color_buffer_write_enabled(brw),
ctx->Multisample.Enabled,
ctx->Line.StippleFlag, ctx->Polygon.StippleFlag,
statistic_enable);
}
static void
gen6_upload_wm_push_constants(struct brw_context *brw)
{
struct brw_stage_state *stage_state = &brw->wm.base;
/* BRW_NEW_FRAGMENT_PROGRAM */
const struct brw_fragment_program *fp =
brw_fragment_program_const(brw->fragment_program);
/* CACHE_NEW_WM_PROG */
const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
gen6_upload_push_constants(brw, &fp->program.Base, &prog_data->base,
stage_state, AUB_TRACE_WM_CONSTANTS);
if (brw->gen >= 7) {
gen7_upload_constant_state(brw, &brw->wm.base, true,
_3DSTATE_CONSTANT_PS);
}
}
static void brwProgramStringNotify( GLcontext *ctx,
GLenum target,
struct gl_program *prog )
{
struct brw_context *brw = brw_context(ctx);
if (target == GL_FRAGMENT_PROGRAM_ARB) {
struct gl_fragment_program *fprog = (struct gl_fragment_program *) prog;
struct brw_fragment_program *newFP = brw_fragment_program(fprog);
const struct brw_fragment_program *curFP =
brw_fragment_program_const(brw->fragment_program);
if (fprog->FogOption) {
_mesa_append_fog_code(ctx, fprog);
fprog->FogOption = GL_NONE;
}
if (newFP == curFP)
brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
newFP->id = brw->program_id++;
newFP->isGLSL = brw_wm_is_glsl(fprog);
}
else if (target == GL_VERTEX_PROGRAM_ARB) {
struct gl_vertex_program *vprog = (struct gl_vertex_program *) prog;
struct brw_vertex_program *newVP = brw_vertex_program(vprog);
const struct brw_vertex_program *curVP =
brw_vertex_program_const(brw->vertex_program);
if (newVP == curVP)
brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
if (newVP->program.IsPositionInvariant) {
_mesa_insert_mvp_code(ctx, &newVP->program);
}
newVP->id = brw->program_id++;
/* Also tell tnl about it:
*/
_tnl_program_string(ctx, target, prog);
}
}
static GLboolean
brwProgramStringNotify(struct gl_context *ctx,
GLenum target,
struct gl_program *prog)
{
struct brw_context *brw = brw_context(ctx);
const struct brw_compiler *compiler = brw->intelScreen->compiler;
switch (target) {
case GL_FRAGMENT_PROGRAM_ARB: {
struct gl_fragment_program *fprog = (struct gl_fragment_program *) prog;
struct brw_fragment_program *newFP = brw_fragment_program(fprog);
const struct brw_fragment_program *curFP =
brw_fragment_program_const(brw->fragment_program);
if (newFP == curFP)
brw->ctx.NewDriverState |= BRW_NEW_FRAGMENT_PROGRAM;
newFP->id = get_new_program_id(brw->intelScreen);
brw_add_texrect_params(prog);
prog->nir = brw_create_nir(brw, NULL, prog, MESA_SHADER_FRAGMENT, true);
brw_fs_precompile(ctx, NULL, prog);
break;
}
case GL_VERTEX_PROGRAM_ARB: {
struct gl_vertex_program *vprog = (struct gl_vertex_program *) prog;
struct brw_vertex_program *newVP = brw_vertex_program(vprog);
const struct brw_vertex_program *curVP =
brw_vertex_program_const(brw->vertex_program);
if (newVP == curVP)
brw->ctx.NewDriverState |= BRW_NEW_VERTEX_PROGRAM;
if (newVP->program.IsPositionInvariant) {
_mesa_insert_mvp_code(ctx, &newVP->program);
}
newVP->id = get_new_program_id(brw->intelScreen);
/* Also tell tnl about it:
*/
_tnl_program_string(ctx, target, prog);
brw_add_texrect_params(prog);
prog->nir = brw_create_nir(brw, NULL, prog, MESA_SHADER_VERTEX,
compiler->scalar_stage[MESA_SHADER_VERTEX]);
brw_vs_precompile(ctx, NULL, prog);
break;
}
default:
/*
* driver->ProgramStringNotify is only called for ARB programs, fixed
* function vertex programs, and ir_to_mesa (which isn't used by the
* i965 back-end). Therefore, even after geometry shaders are added,
* this function should only ever be called with a target of
* GL_VERTEX_PROGRAM_ARB or GL_FRAGMENT_PROGRAM_ARB.
*/
unreachable("Unexpected target in brwProgramStringNotify");
}
return true;
}
static void
upload_wm_state(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
const struct brw_fragment_program *fp =
brw_fragment_program_const(brw->fragment_program);
uint32_t dw2, dw4, dw5, dw6, ksp0, ksp2;
/* _NEW_BUFFERS */
bool multisampled_fbo = ctx->DrawBuffer->Visual.samples > 1;
/* CACHE_NEW_WM_PROG
*
* We can't fold this into gen6_upload_wm_push_constants(), because
* according to the SNB PRM, vol 2 part 1 section 7.2.2
* (3DSTATE_CONSTANT_PS [DevSNB]):
*
* "[DevSNB]: This packet must be followed by WM_STATE."
*/
if (brw->wm.prog_data->base.nr_params == 0) {
/* Disable the push constant buffers. */
BEGIN_BATCH(5);
OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (5 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
} else {
BEGIN_BATCH(5);
OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 |
GEN6_CONSTANT_BUFFER_0_ENABLE |
(5 - 2));
/* Pointer to the WM constant buffer. Covered by the set of
* state flags from gen6_upload_wm_push_constants.
*/
OUT_BATCH(brw->wm.base.push_const_offset +
brw->wm.base.push_const_size - 1);
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
}
dw2 = dw4 = dw5 = dw6 = ksp2 = 0;
dw4 |= GEN6_WM_STATISTICS_ENABLE;
dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0;
dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5;
/* Use ALT floating point mode for ARB fragment programs, because they
* require 0^0 == 1. Even though _CurrentFragmentProgram is used for
* rendering, CurrentProgram[MESA_SHADER_FRAGMENT] is used for this check
* to differentiate between the GLSL and non-GLSL cases.
*/
if (ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT] == NULL)
dw2 |= GEN6_WM_FLOATING_POINT_MODE_ALT;
dw2 |= (ALIGN(brw->wm.base.sampler_count, 4) / 4) <<
GEN6_WM_SAMPLER_COUNT_SHIFT;
/* CACHE_NEW_WM_PROG */
dw2 |= ((brw->wm.prog_data->base.binding_table.size_bytes / 4) <<
GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT);
dw5 |= (brw->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT;
/* CACHE_NEW_WM_PROG */
/* In case of non 1x per sample shading, only one of SIMD8 and SIMD16
* should be enabled. We do 'SIMD16 only' dispatch if a SIMD16 shader
* is successfully compiled. In majority of the cases that bring us
* better performance than 'SIMD8 only' dispatch.
*/
int min_inv_per_frag =
_mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program, false);
assert(min_inv_per_frag >= 1);
if (brw->wm.prog_data->prog_offset_16) {
dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
if (min_inv_per_frag == 1) {
dw5 |= GEN6_WM_8_DISPATCH_ENABLE;
dw4 |= (brw->wm.prog_data->base.dispatch_grf_start_reg <<
GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
dw4 |= (brw->wm.prog_data->dispatch_grf_start_reg_16 <<
GEN6_WM_DISPATCH_START_GRF_SHIFT_2);
ksp0 = brw->wm.base.prog_offset;
ksp2 = brw->wm.base.prog_offset + brw->wm.prog_data->prog_offset_16;
} else {
dw4 |= (brw->wm.prog_data->dispatch_grf_start_reg_16 <<
GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
ksp0 = brw->wm.base.prog_offset + brw->wm.prog_data->prog_offset_16;
}
}
else {
dw5 |= GEN6_WM_8_DISPATCH_ENABLE;
dw4 |= (brw->wm.prog_data->base.dispatch_grf_start_reg <<
GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
ksp0 = brw->wm.base.prog_offset;
}
/* CACHE_NEW_WM_PROG | _NEW_COLOR */
if (brw->wm.prog_data->dual_src_blend &&
(ctx->Color.BlendEnabled & 1) &&
ctx->Color.Blend[0]._UsesDualSrc) {
dw5 |= GEN6_WM_DUAL_SOURCE_BLEND_ENABLE;
}
/* _NEW_LINE */
if (ctx->Line.StippleFlag)
dw5 |= GEN6_WM_LINE_STIPPLE_ENABLE;
/* _NEW_POLYGON */
if (ctx->Polygon.StippleFlag)
dw5 |= GEN6_WM_POLYGON_STIPPLE_ENABLE;
/* BRW_NEW_FRAGMENT_PROGRAM */
if (fp->program.Base.InputsRead & VARYING_BIT_POS)
dw5 |= GEN6_WM_USES_SOURCE_DEPTH | GEN6_WM_USES_SOURCE_W;
if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
dw5 |= GEN6_WM_COMPUTED_DEPTH;
/* CACHE_NEW_WM_PROG */
dw6 |= brw->wm.prog_data->barycentric_interp_modes <<
GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT;
/* _NEW_COLOR, _NEW_MULTISAMPLE */
if (fp->program.UsesKill || ctx->Color.AlphaEnabled ||
ctx->Multisample.SampleAlphaToCoverage ||
brw->wm.prog_data->uses_omask)
dw5 |= GEN6_WM_KILL_ENABLE;
/* _NEW_BUFFERS | _NEW_COLOR */
if (brw_color_buffer_write_enabled(brw) ||
dw5 & (GEN6_WM_KILL_ENABLE | GEN6_WM_COMPUTED_DEPTH)) {
dw5 |= GEN6_WM_DISPATCH_ENABLE;
}
/* From the SNB PRM, volume 2 part 1, page 278:
* "This bit is inserted in the PS payload header and made available to
* the DataPort (either via the message header or via header bypass) to
* indicate that oMask data (one or two phases) is included in Render
* Target Write messages. If present, the oMask data is used to mask off
* samples."
*/
if(brw->wm.prog_data->uses_omask)
dw5 |= GEN6_WM_OMASK_TO_RENDER_TARGET;
/* CACHE_NEW_WM_PROG */
dw6 |= brw->wm.prog_data->num_varying_inputs <<
GEN6_WM_NUM_SF_OUTPUTS_SHIFT;
if (multisampled_fbo) {
/* _NEW_MULTISAMPLE */
if (ctx->Multisample.Enabled)
dw6 |= GEN6_WM_MSRAST_ON_PATTERN;
else
dw6 |= GEN6_WM_MSRAST_OFF_PIXEL;
if (min_inv_per_frag > 1)
dw6 |= GEN6_WM_MSDISPMODE_PERSAMPLE;
else {
dw6 |= GEN6_WM_MSDISPMODE_PERPIXEL;
/* From the Sandy Bridge PRM, Vol 2 part 1, 7.7.1 ("Pixel Grouping
* (Dispatch Size) Control"), p.334:
*
* Note: in the table below, the Valid column indicates which
* products that combination is supported on. Combinations of
* dispatch enables not listed in the table are not available on
* any product.
*
* A: Valid on all products
*
* B: Not valid on [DevSNB] if 4x PERPIXEL mode with pixel shader
* computed depth.
*
* D: Valid on all products, except when in non-1x PERSAMPLE mode
* (applies to [DevSNB+] only). Not valid on [DevSNB] if 4x
* PERPIXEL mode with pixel shader computed depth.
*
* E: Not valid on [DevSNB] if 4x PERPIXEL mode with pixel shader
* computed depth.
*
* F: Valid on all products, except not valid on [DevSNB] if 4x
* PERPIXEL mode with pixel shader computed depth.
*
* In the table that follows, the only entry with "A" in the Valid
* column is the entry where only 8 pixel dispatch is enabled.
* Therefore, when we are in PERPIXEL mode with pixel shader computed
* depth, we need to disable SIMD16 dispatch.
*/
if (dw5 & GEN6_WM_COMPUTED_DEPTH)
dw5 &= ~GEN6_WM_16_DISPATCH_ENABLE;
}
} else {
dw6 |= GEN6_WM_MSRAST_OFF_PIXEL;
dw6 |= GEN6_WM_MSDISPMODE_PERSAMPLE;
}
/* From the SNB PRM, volume 2 part 1, page 281:
* "If the PS kernel does not need the Position XY Offsets
* to compute a Position XY value, then this field should be
* programmed to POSOFFSET_NONE."
*
* "SW Recommendation: If the PS kernel needs the Position Offsets
* to compute a Position XY value, this field should match Position
* ZW Interpolation Mode to ensure a consistent position.xyzw
* computation."
* We only require XY sample offsets. So, this recommendation doesn't
* look useful at the moment. We might need this in future.
*/
if (brw->wm.prog_data->uses_pos_offset)
dw6 |= GEN6_WM_POSOFFSET_SAMPLE;
else
dw6 |= GEN6_WM_POSOFFSET_NONE;
BEGIN_BATCH(9);
OUT_BATCH(_3DSTATE_WM << 16 | (9 - 2));
OUT_BATCH(ksp0);
OUT_BATCH(dw2);
if (brw->wm.prog_data->total_scratch) {
OUT_RELOC(brw->wm.base.scratch_bo,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
ffs(brw->wm.prog_data->total_scratch) - 11);
} else {
OUT_BATCH(0);
}
OUT_BATCH(dw4);
OUT_BATCH(dw5);
OUT_BATCH(dw6);
OUT_BATCH(0); /* kernel 1 pointer */
OUT_BATCH(ksp2);
ADVANCE_BATCH();
}
static void
upload_wm_state(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
struct gl_context *ctx = &intel->ctx;
const struct brw_fragment_program *fp =
brw_fragment_program_const(brw->fragment_program);
uint32_t dw2, dw4, dw5, dw6;
/* _NEW_BUFFERS */
bool multisampled_fbo = ctx->DrawBuffer->Visual.samples > 1;
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->nr_params == 0) {
/* Disable the push constant buffers. */
BEGIN_BATCH(5);
OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (5 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
} else {
BEGIN_BATCH(5);
OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 |
GEN6_CONSTANT_BUFFER_0_ENABLE |
(5 - 2));
/* Pointer to the WM constant buffer. Covered by the set of
* state flags from gen6_upload_wm_push_constants.
*/
OUT_BATCH(brw->wm.push_const_offset +
ALIGN(brw->wm.prog_data->nr_params,
brw->wm.prog_data->dispatch_width) / 8 - 1);
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
}
dw2 = dw4 = dw5 = dw6 = 0;
dw4 |= GEN6_WM_STATISTICS_ENABLE;
dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0;
dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5;
/* Use ALT floating point mode for ARB fragment programs, because they
* require 0^0 == 1. Even though _CurrentFragmentProgram is used for
* rendering, CurrentFragmentProgram is used for this check to
* differentiate between the GLSL and non-GLSL cases.
*/
if (ctx->Shader.CurrentFragmentProgram == NULL)
dw2 |= GEN6_WM_FLOATING_POINT_MODE_ALT;
/* CACHE_NEW_SAMPLER */
dw2 |= (ALIGN(brw->sampler.count, 4) / 4) << GEN6_WM_SAMPLER_COUNT_SHIFT;
dw4 |= (brw->wm.prog_data->first_curbe_grf <<
GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
dw4 |= (brw->wm.prog_data->first_curbe_grf_16 <<
GEN6_WM_DISPATCH_START_GRF_SHIFT_2);
dw5 |= (brw->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT;
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->dispatch_width == 8) {
dw5 |= GEN6_WM_8_DISPATCH_ENABLE;
if (brw->wm.prog_data->prog_offset_16)
dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
} else {
dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
}
/* CACHE_NEW_WM_PROG | _NEW_COLOR */
if (brw->wm.prog_data->dual_src_blend &&
(ctx->Color.BlendEnabled & 1) &&
ctx->Color.Blend[0]._UsesDualSrc) {
dw5 |= GEN6_WM_DUAL_SOURCE_BLEND_ENABLE;
}
/* _NEW_LINE */
if (ctx->Line.StippleFlag)
dw5 |= GEN6_WM_LINE_STIPPLE_ENABLE;
/* _NEW_POLYGON */
if (ctx->Polygon.StippleFlag)
dw5 |= GEN6_WM_POLYGON_STIPPLE_ENABLE;
/* BRW_NEW_FRAGMENT_PROGRAM */
if (fp->program.Base.InputsRead & FRAG_BIT_WPOS)
dw5 |= GEN6_WM_USES_SOURCE_DEPTH | GEN6_WM_USES_SOURCE_W;
if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
dw5 |= GEN6_WM_COMPUTED_DEPTH;
/* CACHE_NEW_WM_PROG */
dw6 |= brw->wm.prog_data->barycentric_interp_modes <<
GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT;
/* _NEW_COLOR, _NEW_MULTISAMPLE */
if (fp->program.UsesKill || ctx->Color.AlphaEnabled ||
ctx->Multisample.SampleAlphaToCoverage)
dw5 |= GEN6_WM_KILL_ENABLE;
if (brw_color_buffer_write_enabled(brw) ||
dw5 & (GEN6_WM_KILL_ENABLE | GEN6_WM_COMPUTED_DEPTH)) {
dw5 |= GEN6_WM_DISPATCH_ENABLE;
}
dw6 |= _mesa_bitcount_64(brw->fragment_program->Base.InputsRead) <<
GEN6_WM_NUM_SF_OUTPUTS_SHIFT;
if (multisampled_fbo) {
/* _NEW_MULTISAMPLE */
if (ctx->Multisample.Enabled)
dw6 |= GEN6_WM_MSRAST_ON_PATTERN;
else
dw6 |= GEN6_WM_MSRAST_OFF_PIXEL;
dw6 |= GEN6_WM_MSDISPMODE_PERPIXEL;
} else {
dw6 |= GEN6_WM_MSRAST_OFF_PIXEL;
dw6 |= GEN6_WM_MSDISPMODE_PERSAMPLE;
}
BEGIN_BATCH(9);
OUT_BATCH(_3DSTATE_WM << 16 | (9 - 2));
OUT_BATCH(brw->wm.prog_offset);
OUT_BATCH(dw2);
if (brw->wm.prog_data->total_scratch) {
OUT_RELOC(brw->wm.scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
ffs(brw->wm.prog_data->total_scratch) - 11);
} else {
OUT_BATCH(0);
}
OUT_BATCH(dw4);
OUT_BATCH(dw5);
OUT_BATCH(dw6);
OUT_BATCH(0); /* kernel 1 pointer */
/* kernel 2 pointer */
OUT_BATCH(brw->wm.prog_offset + brw->wm.prog_data->prog_offset_16);
ADVANCE_BATCH();
}
static void
upload_wm_state(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
/* BRW_NEW_FRAGMENT_PROGRAM */
const struct brw_fragment_program *fp =
brw_fragment_program_const(brw->fragment_program);
/* BRW_NEW_FS_PROG_DATA */
const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
bool writes_depth = prog_data->computed_depth_mode != BRW_PSCDEPTH_OFF;
uint32_t dw1, dw2;
/* _NEW_BUFFERS */
const bool multisampled_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
dw1 = dw2 = 0;
dw1 |= GEN7_WM_STATISTICS_ENABLE;
dw1 |= GEN7_WM_LINE_AA_WIDTH_1_0;
dw1 |= GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5;
/* _NEW_LINE */
if (ctx->Line.StippleFlag)
dw1 |= GEN7_WM_LINE_STIPPLE_ENABLE;
/* _NEW_POLYGON */
if (ctx->Polygon.StippleFlag)
dw1 |= GEN7_WM_POLYGON_STIPPLE_ENABLE;
if (fp->program.Base.InputsRead & VARYING_BIT_POS)
dw1 |= GEN7_WM_USES_SOURCE_DEPTH | GEN7_WM_USES_SOURCE_W;
dw1 |= prog_data->computed_depth_mode << GEN7_WM_COMPUTED_DEPTH_MODE_SHIFT;
dw1 |= prog_data->barycentric_interp_modes <<
GEN7_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT;
/* _NEW_COLOR, _NEW_MULTISAMPLE */
/* Enable if the pixel shader kernel generates and outputs oMask.
*/
if (prog_data->uses_kill || ctx->Color.AlphaEnabled ||
ctx->Multisample.SampleAlphaToCoverage ||
prog_data->uses_omask) {
dw1 |= GEN7_WM_KILL_ENABLE;
}
if (_mesa_active_fragment_shader_has_atomic_ops(&brw->ctx)) {
dw1 |= GEN7_WM_DISPATCH_ENABLE;
}
/* _NEW_BUFFERS | _NEW_COLOR */
if (brw_color_buffer_write_enabled(brw) || writes_depth ||
dw1 & GEN7_WM_KILL_ENABLE) {
dw1 |= GEN7_WM_DISPATCH_ENABLE;
}
if (multisampled_fbo) {
/* _NEW_MULTISAMPLE */
if (ctx->Multisample.Enabled)
dw1 |= GEN7_WM_MSRAST_ON_PATTERN;
else
dw1 |= GEN7_WM_MSRAST_OFF_PIXEL;
if (_mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program, false) > 1)
dw2 |= GEN7_WM_MSDISPMODE_PERSAMPLE;
else
dw2 |= GEN7_WM_MSDISPMODE_PERPIXEL;
} else {
dw1 |= GEN7_WM_MSRAST_OFF_PIXEL;
dw2 |= GEN7_WM_MSDISPMODE_PERSAMPLE;
}
if (fp->program.Base.SystemValuesRead & SYSTEM_BIT_SAMPLE_MASK_IN) {
dw1 |= GEN7_WM_USES_INPUT_COVERAGE_MASK;
}
BEGIN_BATCH(3);
OUT_BATCH(_3DSTATE_WM << 16 | (3 - 2));
OUT_BATCH(dw1);
OUT_BATCH(dw2);
ADVANCE_BATCH();
}
static void
upload_wm_state(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
const struct brw_fragment_program *fp =
brw_fragment_program_const(brw->fragment_program);
bool writes_depth = false;
uint32_t dw1, dw2;
/* _NEW_BUFFERS */
bool multisampled_fbo = ctx->DrawBuffer->Visual.samples > 1;
dw1 = dw2 = 0;
dw1 |= GEN7_WM_STATISTICS_ENABLE;
dw1 |= GEN7_WM_LINE_AA_WIDTH_1_0;
dw1 |= GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5;
/* _NEW_LINE */
if (ctx->Line.StippleFlag)
dw1 |= GEN7_WM_LINE_STIPPLE_ENABLE;
/* _NEW_POLYGON */
if (ctx->Polygon.StippleFlag)
dw1 |= GEN7_WM_POLYGON_STIPPLE_ENABLE;
/* BRW_NEW_FRAGMENT_PROGRAM */
if (fp->program.Base.InputsRead & VARYING_BIT_POS)
dw1 |= GEN7_WM_USES_SOURCE_DEPTH | GEN7_WM_USES_SOURCE_W;
if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
writes_depth = fp->program.FragDepthLayout != FRAG_DEPTH_LAYOUT_UNCHANGED;
switch (fp->program.FragDepthLayout) {
case FRAG_DEPTH_LAYOUT_NONE:
case FRAG_DEPTH_LAYOUT_ANY:
dw1 |= GEN7_WM_PSCDEPTH_ON;
break;
case FRAG_DEPTH_LAYOUT_GREATER:
dw1 |= GEN7_WM_PSCDEPTH_ON_GE;
break;
case FRAG_DEPTH_LAYOUT_LESS:
dw1 |= GEN7_WM_PSCDEPTH_ON_LE;
break;
case FRAG_DEPTH_LAYOUT_UNCHANGED:
break;
}
}
/* CACHE_NEW_WM_PROG */
dw1 |= brw->wm.prog_data->barycentric_interp_modes <<
GEN7_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT;
/* _NEW_COLOR, _NEW_MULTISAMPLE */
if (fp->program.UsesKill || ctx->Color.AlphaEnabled ||
ctx->Multisample.SampleAlphaToCoverage)
dw1 |= GEN7_WM_KILL_ENABLE;
/* _NEW_BUFFERS */
if (brw_color_buffer_write_enabled(brw) || writes_depth ||
dw1 & GEN7_WM_KILL_ENABLE) {
dw1 |= GEN7_WM_DISPATCH_ENABLE;
}
if (multisampled_fbo) {
/* _NEW_MULTISAMPLE */
if (ctx->Multisample.Enabled)
dw1 |= GEN7_WM_MSRAST_ON_PATTERN;
else
dw1 |= GEN7_WM_MSRAST_OFF_PIXEL;
dw2 |= GEN7_WM_MSDISPMODE_PERPIXEL;
} else {
dw1 |= GEN7_WM_MSRAST_OFF_PIXEL;
dw2 |= GEN7_WM_MSDISPMODE_PERSAMPLE;
}
BEGIN_BATCH(3);
OUT_BATCH(_3DSTATE_WM << 16 | (3 - 2));
OUT_BATCH(dw1);
OUT_BATCH(dw2);
ADVANCE_BATCH();
}
static GLboolean brwProgramStringNotify( struct gl_context *ctx,
GLenum target,
struct gl_program *prog )
{
struct brw_context *brw = brw_context(ctx);
int i;
if (target == GL_FRAGMENT_PROGRAM_ARB) {
struct gl_fragment_program *fprog = (struct gl_fragment_program *) prog;
struct brw_fragment_program *newFP = brw_fragment_program(fprog);
const struct brw_fragment_program *curFP =
brw_fragment_program_const(brw->fragment_program);
struct gl_shader_program *shader_program;
if (newFP == curFP)
brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
newFP->id = brw->program_id++;
/* Don't reject fragment shaders for their Mesa IR state when we're
* using the new FS backend.
*/
shader_program = _mesa_lookup_shader_program(ctx, prog->Id);
if (shader_program
&& shader_program->_LinkedShaders[MESA_SHADER_FRAGMENT]) {
return GL_TRUE;
}
}
else if (target == GL_VERTEX_PROGRAM_ARB) {
struct gl_vertex_program *vprog = (struct gl_vertex_program *) prog;
struct brw_vertex_program *newVP = brw_vertex_program(vprog);
const struct brw_vertex_program *curVP =
brw_vertex_program_const(brw->vertex_program);
if (newVP == curVP)
brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
if (newVP->program.IsPositionInvariant) {
_mesa_insert_mvp_code(ctx, &newVP->program);
}
newVP->id = brw->program_id++;
/* Also tell tnl about it:
*/
_tnl_program_string(ctx, target, prog);
}
/* Reject programs with subroutines, which are totally broken at the moment
* (all program flows return when any program flow returns, and
* the VS also hangs if a function call calls a function.
*
* See piglit glsl-{vs,fs}-functions-[23] tests.
*/
for (i = 0; i < prog->NumInstructions; i++) {
struct prog_instruction *inst = prog->Instructions + i;
int r;
if (prog->Instructions[i].Opcode == OPCODE_CAL) {
shader_error(ctx, prog,
"i965 driver doesn't yet support uninlined function "
"calls. Move to using a single return statement at "
"the end of the function to work around it.\n");
return GL_FALSE;
}
if (prog->Instructions[i].Opcode == OPCODE_RET) {
shader_error(ctx, prog,
"i965 driver doesn't yet support \"return\" "
"from main().\n");
return GL_FALSE;
}
for (r = 0; r < _mesa_num_inst_src_regs(inst->Opcode); r++) {
if (prog->Instructions[i].SrcReg[r].RelAddr &&
prog->Instructions[i].SrcReg[r].File == PROGRAM_INPUT) {
shader_error(ctx, prog,
"Variable indexing of shader inputs unsupported\n");
return GL_FALSE;
}
}
if (target == GL_FRAGMENT_PROGRAM_ARB &&
prog->Instructions[i].DstReg.RelAddr &&
prog->Instructions[i].DstReg.File == PROGRAM_OUTPUT) {
shader_error(ctx, prog,
"Variable indexing of FS outputs unsupported\n");
return GL_FALSE;
}
if (target == GL_FRAGMENT_PROGRAM_ARB) {
if ((prog->Instructions[i].DstReg.RelAddr &&
prog->Instructions[i].DstReg.File == PROGRAM_TEMPORARY) ||
(prog->Instructions[i].SrcReg[0].RelAddr &&
prog->Instructions[i].SrcReg[0].File == PROGRAM_TEMPORARY) ||
(prog->Instructions[i].SrcReg[1].RelAddr &&
prog->Instructions[i].SrcReg[1].File == PROGRAM_TEMPORARY) ||
(prog->Instructions[i].SrcReg[2].RelAddr &&
prog->Instructions[i].SrcReg[2].File == PROGRAM_TEMPORARY)) {
shader_error(ctx, prog,
"Variable indexing of variable arrays in the FS "
"unsupported\n");
return GL_FALSE;
}
}
}
return GL_TRUE;
}
/* Upload a new set of constants. Too much variability to go into the
* cache mechanism, but maybe would benefit from a comparison against
* the current uploaded set of constants.
*/
static void prepare_constant_buffer(struct brw_context *brw)
{
GLcontext *ctx = &brw->intel.ctx;
const struct brw_vertex_program *vp =
brw_vertex_program_const(brw->vertex_program);
const struct brw_fragment_program *fp =
brw_fragment_program_const(brw->fragment_program);
const GLuint sz = brw->curbe.total_size;
const GLuint bufsz = sz * 16 * sizeof(GLfloat);
GLfloat *buf;
GLuint i;
if (sz == 0) {
if (brw->curbe.last_buf) {
free(brw->curbe.last_buf);
brw->curbe.last_buf = NULL;
brw->curbe.last_bufsz = 0;
}
return;
}
buf = (GLfloat *) calloc(1, bufsz);
/* fragment shader constants */
if (brw->curbe.wm_size) {
GLuint offset = brw->curbe.wm_start * 16;
_mesa_load_state_parameters(ctx, fp->program.Base.Parameters);
/* copy float constants */
for (i = 0; i < brw->wm.prog_data->nr_params; i++)
buf[offset + i] = *brw->wm.prog_data->param[i];
}
/* The clipplanes are actually delivered to both CLIP and VS units.
* VS uses them to calculate the outcode bitmasks.
*/
if (brw->curbe.clip_size) {
GLuint offset = brw->curbe.clip_start * 16;
GLuint j;
/* If any planes are going this way, send them all this way:
*/
for (i = 0; i < 6; i++) {
buf[offset + i * 4 + 0] = fixed_plane[i][0];
buf[offset + i * 4 + 1] = fixed_plane[i][1];
buf[offset + i * 4 + 2] = fixed_plane[i][2];
buf[offset + i * 4 + 3] = fixed_plane[i][3];
}
/* Clip planes: _NEW_TRANSFORM plus _NEW_PROJECTION to get to
* clip-space:
*/
assert(MAX_CLIP_PLANES == 6);
for (j = 0; j < MAX_CLIP_PLANES; j++) {
if (ctx->Transform.ClipPlanesEnabled & (1<<j)) {
buf[offset + i * 4 + 0] = ctx->Transform._ClipUserPlane[j][0];
buf[offset + i * 4 + 1] = ctx->Transform._ClipUserPlane[j][1];
buf[offset + i * 4 + 2] = ctx->Transform._ClipUserPlane[j][2];
buf[offset + i * 4 + 3] = ctx->Transform._ClipUserPlane[j][3];
i++;
}
}
}
/* vertex shader constants */
if (brw->curbe.vs_size) {
GLuint offset = brw->curbe.vs_start * 16;
GLuint nr = brw->vs.prog_data->nr_params / 4;
if (brw->vertex_program->IsNVProgram)
_mesa_load_tracked_matrices(ctx);
/* Updates the ParamaterValues[i] pointers for all parameters of the
* basic type of PROGRAM_STATE_VAR.
*/
_mesa_load_state_parameters(ctx, vp->program.Base.Parameters);
if (vp->use_const_buffer) {
/* Load the subset of push constants that will get used when
* we also have a pull constant buffer.
*/
for (i = 0; i < vp->program.Base.Parameters->NumParameters; i++) {
if (brw->vs.constant_map[i] != -1) {
assert(brw->vs.constant_map[i] <= nr);
memcpy(buf + offset + brw->vs.constant_map[i] * 4,
vp->program.Base.Parameters->ParameterValues[i],
4 * sizeof(float));
}
}
} else {
for (i = 0; i < nr; i++) {
memcpy(buf + offset + i * 4,
vp->program.Base.Parameters->ParameterValues[i],
4 * sizeof(float));
}
}
}
if (0) {
for (i = 0; i < sz*16; i+=4)
printf("curbe %d.%d: %f %f %f %f\n", i/8, i&4,
buf[i+0], buf[i+1], buf[i+2], buf[i+3]);
printf("last_buf %p buf %p sz %d/%d cmp %d\n",
brw->curbe.last_buf, buf,
bufsz, brw->curbe.last_bufsz,
brw->curbe.last_buf ? memcmp(buf, brw->curbe.last_buf, bufsz) : -1);
}
if (brw->curbe.curbe_bo != NULL &&
brw->curbe.last_buf &&
bufsz == brw->curbe.last_bufsz &&
memcmp(buf, brw->curbe.last_buf, bufsz) == 0) {
/* constants have not changed */
free(buf);
}
else {
/* constants have changed */
if (brw->curbe.last_buf)
free(brw->curbe.last_buf);
brw->curbe.last_buf = buf;
brw->curbe.last_bufsz = bufsz;
if (brw->curbe.curbe_bo != NULL &&
brw->curbe.curbe_next_offset + bufsz > brw->curbe.curbe_bo->size)
{
drm_intel_gem_bo_unmap_gtt(brw->curbe.curbe_bo);
dri_bo_unreference(brw->curbe.curbe_bo);
brw->curbe.curbe_bo = NULL;
}
if (brw->curbe.curbe_bo == NULL) {
/* Allocate a single page for CURBE entries for this batchbuffer.
* They're generally around 64b.
*/
brw->curbe.curbe_bo = dri_bo_alloc(brw->intel.bufmgr, "CURBE",
4096, 1 << 6);
brw->curbe.curbe_next_offset = 0;
drm_intel_gem_bo_map_gtt(brw->curbe.curbe_bo);
}
brw->curbe.curbe_offset = brw->curbe.curbe_next_offset;
brw->curbe.curbe_next_offset += bufsz;
brw->curbe.curbe_next_offset = ALIGN(brw->curbe.curbe_next_offset, 64);
/* Copy data to the buffer:
*/
memcpy(brw->curbe.curbe_bo->virtual + brw->curbe.curbe_offset,
buf,
bufsz);
}
brw_add_validated_bo(brw, brw->curbe.curbe_bo);
/* Because this provokes an action (ie copy the constants into the
* URB), it shouldn't be shortcircuited if identical to the
* previous time - because eg. the urb destination may have
* changed, or the urb contents different to last time.
*
* Note that the data referred to is actually copied internally,
* not just used in place according to passed pointer.
*
* It appears that the CS unit takes care of using each available
* URB entry (Const URB Entry == CURBE) in turn, and issuing
* flushes as necessary when doublebuffering of CURBEs isn't
* possible.
*/
}
