static int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg) { unsigned int timeout; /* Write the CMDCTRL without start execution. */ CQSPI_WRITEL(reg, reg_base + CQSPI_REG_CMDCTRL); /* Start execute */ reg |= CQSPI_REG_CMDCTRL_EXECUTE_MASK; CQSPI_WRITEL(reg, reg_base + CQSPI_REG_CMDCTRL); /* Polling for completion. */ timeout = cadence_qspi_init_timeout(CQSPI_TIMEOUT_MS); while (cadence_qspi_check_timeout(timeout)) { reg = CQSPI_READL(reg_base + CQSPI_REG_CMDCTRL) & CQSPI_REG_CMDCTRL_INPROGRESS_MASK; if (!reg) break; } if (reg != 0) { pr_err("QSPI: flash cmd execute time out\n"); return -EIO; } /* Polling QSPI idle status. */ if (!cadence_qspi_wait_idle(reg_base)) return -EIO; return 0; }
static int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg) { unsigned int retry = CQSPI_REG_RETRY; /* Write the CMDCTRL without start execution. */ writel(reg, reg_base + CQSPI_REG_CMDCTRL); /* Start execute */ reg |= CQSPI_REG_CMDCTRL_EXECUTE; writel(reg, reg_base + CQSPI_REG_CMDCTRL); while (retry--) { reg = readl(reg_base + CQSPI_REG_CMDCTRL); if ((reg & CQSPI_REG_CMDCTRL_INPROGRESS) == 0) break; udelay(1); } if (!retry) { printf("QSPI: flash command execution timeout\n"); return -EIO; } /* Polling QSPI idle status. */ if (!cadence_qspi_wait_idle(reg_base)) return -EIO; return 0; }
unsigned int cadence_qspi_apb_is_controller_ready(void *reg_base) { return cadence_qspi_wait_idle(reg_base); }