void hikey960_pwr_domain_off(const psci_power_state_t *target_state) { unsigned long mpidr = read_mpidr_el1(); unsigned int core = mpidr & MPIDR_CPU_MASK; unsigned int cluster = (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS; clr_ex(); isb(); dsbsy(); gicv2_cpuif_disable(); hisi_clear_cpu_boot_flag(cluster, core); hisi_powerdn_core(cluster, core); /* check if any core is powered up */ if (hisi_test_cpu_down(cluster, core)) { cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); isb(); dsbsy(); hisi_powerdn_cluster(cluster, core); } }
static void hikey_pwr_domain_suspend(const psci_power_state_t *target_state) { u_register_t mpidr = read_mpidr_el1(); unsigned int cpu = mpidr & MPIDR_CPU_MASK; unsigned int cluster = (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS; if (CORE_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE) return; if (CORE_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { /* Program the jump address for the target cpu */ hisi_pwrc_set_core_bx_addr(cpu, cluster, hikey_sec_entrypoint); gicv2_cpuif_disable(); if (SYSTEM_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE) hisi_ipc_cpu_suspend(cpu, cluster); } /* Perform the common cluster specific operations */ if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { hisi_ipc_spin_lock(HISI_IPC_SEM_CPUIDLE); cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr)); hisi_ipc_spin_unlock(HISI_IPC_SEM_CPUIDLE); if (SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { hisi_pwrc_set_cluster_wfi(1); hisi_pwrc_set_cluster_wfi(0); hisi_ipc_psci_system_off(); } else hisi_ipc_cluster_suspend(cpu, cluster); } }
void hikey_pwr_domain_off(const psci_power_state_t *target_state) { unsigned long mpidr; int cpu, cluster; mpidr = read_mpidr(); cluster = MPIDR_AFFLVL1_VAL(mpidr); cpu = MPIDR_AFFLVL0_VAL(mpidr); gicv2_cpuif_disable(); hisi_ipc_cpu_off(cpu, cluster); if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { hisi_ipc_spin_lock(HISI_IPC_SEM_CPUIDLE); cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr)); hisi_ipc_spin_unlock(HISI_IPC_SEM_CPUIDLE); hisi_ipc_cluster_off(cpu, cluster); } }
/****************************************************************************** * Helper function to remove current master from coherency *****************************************************************************/ void plat_arm_interconnect_exit_coherency(void) { cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); }
void plat_cci_disable(void) { cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); }
void plat_cci_disable(void) { #ifdef PLAT_RK_CCI_BASE cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); #endif }
static void __uniphier_cci_disable(void) { cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); }