/*------------------------------------------------------------------------* * chibios_rt::CounterSemaphore * *------------------------------------------------------------------------*/ CounterSemaphore::CounterSemaphore(cnt_t n) { chSemObjectInit(&sem, n); }
/** * @brief Initializes an empty guarded memory pool. * * @param[out] gmp pointer to a @p guarded_memory_pool_t structure * @param[in] size the size of the objects contained in this guarded * memory pool, the minimum accepted size is the size * of a pointer to void. * * @init */ void chGuardedPoolObjectInit(guarded_memory_pool_t *gmp, size_t size) { chPoolObjectInit(&gmp->pool, size, NULL); chSemObjectInit(&gmp->sem, (cnt_t)0); }
static void test_004_005_setup(void) { chSemObjectInit(&sem1, 0); }
void usartInit(USART_TypeDef* USARTx) { #if defined(DMA_REMAP_USART) && DMA_REMAP_USART SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_USART1Tx, ENABLE); SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_USART1Rx, ENABLE); #endif chSemObjectInit(&usart1_semI, 1); chSemObjectInit(&usart1_semS, 1); memset(usart_txbuf, 0, sizeof(usart_txbuf)); memset(usart_rxbuf, 0, sizeof(usart_rxbuf)); USART_InitTypeDef USART_InitStructure; DMA_InitTypeDef DMA_InitStructure; USART_InitStructure.USART_BaudRate = 115200; USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_Init(USARTx, &USART_InitStructure); /* DMA channel Tx of USART Configuration */ DMA_DeInit(DMA_CHANNEL_USART1_TX); DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&USARTx->TDR; DMA_InitStructure.DMA_BufferSize = 0; DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)usart_txbuf; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_Init(DMA_CHANNEL_USART1_TX, &DMA_InitStructure); /* Enable the USART Tx DMA request */ USART_DMACmd(USARTx, USART_DMAReq_Tx, ENABLE); /* DMA channel Rx of USART Configuration */ DMA_DeInit(DMA_CHANNEL_USART1_RX); DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&USARTx->RDR; DMA_InitStructure.DMA_BufferSize = (uint16_t)sizeof(usart_rxbuf); DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)usart_rxbuf; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_Init(DMA_CHANNEL_USART1_RX, &DMA_InitStructure); /* Enable the USART Rx DMA request */ USART_DMACmd(USARTx, USART_DMAReq_Rx, ENABLE); DMA_ITConfig(DMA_CHANNEL_USART1_RX, DMA_IT_TC, ENABLE); NVIC_EnableIRQ(DMA1_Channel4_5_IRQn); /* Enable the DMA channel */ DMA_Cmd(DMA_CHANNEL_USART1_RX, ENABLE); USART_Cmd(USARTx, ENABLE); }
/*------------------------------------------------------------------------*/ int ff_cre_syncobj(BYTE vol, _SYNC_t *sobj) { *sobj = &ff_sem[vol]; chSemObjectInit(*sobj, 1); return TRUE; }
/** * @brief Initialize the DMA engine. * * @init */ void dmaInit(void) { #if CH_CFG_USE_SEMAPHORES chSemObjectInit(&dma_lock, MSP430X_DMA_CHANNELS); #endif }
static void test_002_001_setup(void) { chSemObjectInit(&sem1, 1); }
static void test_002_002_setup(void) { chSemObjectInit(&gsem1, 0); }