void ccu_h3_register_clocks(struct aw_ccung_softc *sc) { int i; sc->resets = h3_ccu_resets; sc->nresets = nitems(h3_ccu_resets); sc->gates = h3_ccu_gates; sc->ngates = nitems(h3_ccu_gates); sc->clk_init = init_clks; sc->n_clk_init = nitems(init_clks); for (i = 0; i < nitems(nkmp_clks); i++) aw_clk_nkmp_register(sc->clkdom, nkmp_clks[i]); for (i = 0; i < nitems(nm_clks); i++) aw_clk_nm_register(sc->clkdom, nm_clks[i]); for (i = 0; i < nitems(prediv_mux_clks); i++) aw_clk_prediv_mux_register(sc->clkdom, prediv_mux_clks[i]); for (i = 0; i < nitems(mux_clks); i++) clknode_mux_register(sc->clkdom, mux_clks[i]); for (i = 0; i < nitems(div_clks); i++) clknode_div_register(sc->clkdom, div_clks[i]); for (i = 0; i < nitems(fixed_factor_clks); i++) clknode_fixed_register(sc->clkdom, fixed_factor_clks[i]); }
static int aw_cpuclk_attach(device_t dev) { struct clk_mux_def def; struct clkdom *clkdom; bus_addr_t paddr; bus_size_t psize; phandle_t node; int error, ncells, i; clk_t clk; node = ofw_bus_get_node(dev); if (ofw_reg_to_paddr(node, 0, &paddr, &psize, NULL) != 0) { device_printf(dev, "cannot parse 'reg' property\n"); return (ENXIO); } error = ofw_bus_parse_xref_list_get_length(node, "clocks", "#clock-cells", &ncells); if (error != 0) { device_printf(dev, "cannot get clock count\n"); return (error); } clkdom = clkdom_create(dev); memset(&def, 0, sizeof(def)); def.clkdef.id = 1; def.clkdef.parent_names = malloc(sizeof(char *) * ncells, M_OFWPROP, M_WAITOK); for (i = 0; i < ncells; i++) { error = clk_get_by_ofw_index(dev, 0, i, &clk); if (error != 0) { device_printf(dev, "cannot get clock %d\n", i); goto fail; } def.clkdef.parent_names[i] = clk_get_name(clk); clk_release(clk); } def.clkdef.parent_cnt = ncells; def.offset = paddr; def.shift = CPU_CLK_SRC_SEL_SHIFT; def.width = CPU_CLK_SRC_SEL_WIDTH; error = clk_parse_ofw_clk_name(dev, node, &def.clkdef.name); if (error != 0) { device_printf(dev, "cannot parse clock name\n"); error = ENXIO; goto fail; } error = clknode_mux_register(clkdom, &def); if (error != 0) { device_printf(dev, "cannot register mux clock\n"); error = ENXIO; goto fail; } if (clkdom_finit(clkdom) != 0) { device_printf(dev, "cannot finalize clkdom initialization\n"); error = ENXIO; goto fail; } OF_prop_free(__DECONST(char *, def.clkdef.parent_names)); OF_prop_free(__DECONST(char *, def.clkdef.name)); if (bootverbose) clkdom_dump(clkdom); return (0); fail: OF_prop_free(__DECONST(char *, def.clkdef.name)); return (error); }