int main() { configurePin(GPIO_MODE_OUTPUT,PIN_14,PORTG); configurePin(GPIO_MODE_OUTPUT,PIN_13,PORTG); //configurePin(GPIO_MODE_OUTPUT,PIN_5,PORTC); //configurePin(GPIO_MODE_OUTPUT,PIN_13,PORTB); configureIntPin(GPIO_MODE_INPUT,PIN_0,PORTA); int realSignal; int inputSignal; while(1) { realSignal = PORTA->IDR; inputSignal = filterSignal(PORTA->IDR); if( inputSignal != 1 ) { //writeOutHigh(PORTG,14); writeSet(PORTG,14); writeReset(PORTG,13); //writeOutLow(PORTG,13); } else { //writeOutHigh(PORTG,13); //writeOutLow(PORTG,14); writeSet(PORTG,13); writeReset(PORTG,14); } } /* delay(100000); writeOutHigh(PORTG,14); writeOutLow(PORTG,13); writeOutLow(PORTC,5); writeOutLow(PORTB,13); //writeOne(GPIO_PIN_14,GPIOG); //writeZero(GPIO_PIN_13,GPIOG); //writeZero(GPIO_PIN_5,GPIOC); //writeZero(GPIO_PIN_13,GPIOB); delay(100000); writeOutLow(PORTG,14); writeOutHigh(PORTG,13); writeOutHigh(PORTC,5); writeOutHigh(PORTB,13); //writeZero(GPIO_PIN_14,GPIOG); //writeOne(GPIO_PIN_13,GPIOG); //writeOne(GPIO_PIN_5,GPIOC); //writeOne(GPIO_PIN_13,GPIOB); */ }
Tentacle& Tentacle::configurePins(Tentacle::Action* actions) { for(int i = 0; i < numPins; i++) { configurePin(i, actions[i]); } return *this; }
inline void configureOutputPin(const Pin pin, const bool openDrain = {}, const PinOutputSpeed outputSpeed = {}, const bool initialState = {}) { static const PinConfiguration configurations[3][2] { {PinConfiguration::pushPull2MhzOutput, PinConfiguration::openDrain2MhzOutput}, {PinConfiguration::pushPull10MhzOutput, PinConfiguration::openDrain10MhzOutput}, {PinConfiguration::pushPull50MhzOutput, PinConfiguration::openDrain50MhzOutput}, }; configurePin(pin, configurations[static_cast<uint8_t>(outputSpeed)][openDrain], initialState); }
inline void configureInputPin(const Pin pin, const PinPull pull = {}) { configurePin(pin, pull == PinPull::none ? PinConfiguration::floatingInput : PinConfiguration::inputWithPullUpDown, pull == PinPull::up); }
/* * Initialize the PHYDL module */ void TI_MSPBoot_CI_PHYDL_Init(void) { unsigned long baud; unsigned short br; baud = 57600L; // Unlock the port mapping registers. PMAPPWD = 0x02D52; // Map port 4 pins to the desired functions P4MAP1 = PM_UCA1RXD; P4MAP2 = PM_UCA1TXD; // Lock the port mapping registers. PMAPPWD = 0; // setup outputs P4DIR |= BIT2; P4OUT = 0x00; // Configure the USCI pins. configurePin(0x42); // txMosiPin configurePin(0x41); // rxMisoPin configurePin(0x00); // clkPin configurePin(0x00); // ssPin // Keep the Usci in reset while we set it up. UCA1CTLW0 |= UCSWRST; // Set up the port. UCA1MCTL = UCBRF_1 + UCOS16; UCA1IRTCTL = UCIRTXPL2 + UCIRTXPL0 + UCIRTXCLK + UCIREN; baud = baud * 16; // Use the SMCLK. UCA1CTL1 |= UCSSEL_2; // Initialize the USCI state machine. UCA1CTLW0 &= ~UCSWRST; // Find the baud rate divider. switch (baud) { case 9600: br = 833; break; case 28800: br = 280; break; case 57600: br = 140; break; case 115200: br = 70; break; case 230400: br = 35; break; case 460800: br = 17; break; case 921600: br = 8; break; case 1843200: br = 4; break; default: br = 833; break; } // Set the divider on the correct port. UCA1BRW = br; TIMER_TIMEOUT_INIT(); }
inline void configureOutputPin(const Pin pin, const bool openDrain, const PinOutputSpeed outputSpeed, const PinPull pull, const bool initialState) { configurePin(pin, PinMode::Output, openDrain, outputSpeed, pull, {}, initialState); }
inline void configureInputPin(const Pin pin, const PinPull pull) { configurePin(pin, PinMode::Input, {}, {}, pull, {}, {}); }
inline void configureAnalogPin(const Pin pin) { configurePin(pin, PinMode::Analog, {}, {}, {}, {}, {}); }
inline void configureAlternateFunctionPin(const Pin pin, const bool openDrain, const PinOutputSpeed outputSpeed, const PinPull pull, const PinAlternateFunction alternateFunction) { configurePin(pin, PinMode::AlternateFunction, openDrain, outputSpeed, pull, alternateFunction, {}); }