int control_SupportsCore(u16 baseAddr) { /* Line 0xA0 - HDMICTRL */ /* Type 0x01 - TX */ /* Type 0xC1 - TX with HDCP */ return control_ProductLine(baseAddr) == 0xA0 && (control_ProductType(baseAddr) == 0x01 || control_ProductType(baseAddr) == 0xC1); }
int api_Initialize(u16 address, u8 dataEnablePolarity, u16 sfrClock, u8 force) //cmd:auto argument: 0, 1, 2500, 0 { dtd_t dtd; videoParams_t params; dataEnablePolarity = 1; api_mDataEnablePolarity = dataEnablePolarity; api_mHpd = FALSE; api_mSendGamutOk = FALSE; //????????????????? api_mSfrClock = sfrClock; // sfrClock,that are required for setting the low time of the SCL clock in each speed mode LOG_NOTICE("dwc_hdmi_tx_software_api_2.12"); LOG_NOTICE(__DATE__); LOG_TRACE1(dataEnablePolarity); /* reset error */ error_Set(NO_ERROR); api_mBaseAddress = address; if (!api_mutex_inited) { mutex_Initialize(&api_mMutex); api_mutex_inited = 1; } control_InterruptMute(api_mBaseAddress, ~0); /* disable all interrupts */ if ((api_mCurrentState < API_HPD) || (api_mCurrentState > API_EDID_READ)) { /* if EDID read do not re-read, if HPDetected, keep in same state * otherwise, NOT INIT */ api_mCurrentState = API_NOT_INIT; } /* VGA must be supported by all sinks * so use it as default configuration */ dtd_Fill(&dtd, 4, 60000); videoParams_Reset(¶ms); videoParams_SetHdmi(¶ms, TRUE); videoParams_SetDtd(¶ms, &dtd); /* params->mDtd = dtd; */ pixelClock = videoParams_GetPixelClock(¶ms); /* dtd_GetPixelClock(&(params->mDtd)); */ /* reset HAPS51 DEMO BOARD, by default mask all interrupts */ if (board_Initialize(api_mBaseAddress, pixelClock, 8) != TRUE) { return FALSE; } /* get Product Identification Register 0 */ LOG_NOTICE2("Product Line", control_ProductLine(api_mBaseAddress)); /* get Product Identification Register 1*/ LOG_NOTICE2("Product Type", control_ProductType(api_mBaseAddress)); /* if ((ProductLine == 0xA0) && ((ProductType == 0x01 || ProductType == 0xC1))) */ if (control_SupportsCore(api_mBaseAddress) != TRUE) { error_Set(ERR_HW_NOT_SUPPORTED); LOG_ERROR("Unknown device: aborting..."); return FALSE; } /* get Design Identification Register */ LOG_NOTICE2("HDMI TX Controller Design", control_Design(api_mBaseAddress)); /* get Revision Identification Register */ LOG_NOTICE2("HDMI TX Controller Revision", control_Revision(api_mBaseAddress)); /* if(ProductLine == 0xA0 && ProductType == 0xC1)*/ if (control_SupportsHdcp(api_mBaseAddress) == TRUE) { LOG_NOTICE("HDMI TX controller supports HDCP"); } /* print api_mDataEnablePolarity value ,always return TRUE */ if (video_Initialize(api_mBaseAddress, ¶ms, api_mDataEnablePolarity) != TRUE) { return FALSE; } if (audio_Initialize(api_mBaseAddress) != TRUE) { return FALSE; } if (packets_Initialize(api_mBaseAddress) != TRUE) { return FALSE; } if (hdcp_Initialize(api_mBaseAddress, api_mDataEnablePolarity) != TRUE) { return FALSE; } /* clock gate == 1 => turn off all modules */ if (control_Initialize(api_mBaseAddress, api_mDataEnablePolarity, pixelClock) != TRUE) { return FALSE; } #ifdef CONFIG_HMDI_JZ4780_DEBUG printk("jz4780 hdmi %s %d phy init\n",__func__,__LINE__); #endif control_InterruptClearAll(api_mBaseAddress); if (board_PixelClock(api_mBaseAddress, pixelClock, videoParams_GetColorResolution(¶ms))!= TRUE) { return FALSE; } #ifdef CONFIG_HMDI_JZ4780_DEBUG printk("jz4780 hdmi %s %d video configured\n",__func__,__LINE_); #endif if (video_Configure(api_mBaseAddress, ¶ms, api_mDataEnablePolarity, FALSE) != TRUE) { return FALSE; } if ((api_mCurrentState < API_HPD) || (api_mCurrentState > API_EDID_READ)) { /* if EDID read do not re-read, if HPDetected, keep in same state * otherwise, set to INIT */ api_mCurrentState = API_INIT; } /* * By default no pixel repetition and color resolution is 8 */ #ifdef CONFIG_HMDI_JZ4780_DEBUG printk("jz4780 hdmi %s %d control configured\n",__func__,__LINE_); #endif if (control_Configure(api_mBaseAddress, pixelClock, 0, 8, 0, 0, 0, 0) != TRUE) { return FALSE; } /* send AVMUTE SET (optional) */ #ifdef CONFIG_HMDI_JZ4780_DEBUG printk("jz4780 hdmi %s %d phy configured\n",__func__,__LINE_); #endif #if 0 /* enable interrupts */ access_CoreWriteByte(0x0, 0x10D2); access_CoreWriteByte(0x0, 0x10D6); access_CoreWriteByte(0x0, 0x10DA); access_CoreWriteByte(0x0, 0x0180); #endif #if 0 access_CoreWriteByte(~0x4, 0x10D2); //audio packets access_CoreWriteByte(0x0, 0x0180); //intc mute #endif api_phy_enable(PHY_ENABLE_HPD); control_InterruptMute(api_mBaseAddress, 0); if (system_InterruptHandlerRegister(TX_INT, api_EventHandler, NULL) == TRUE) { printk("=====>enable TX_INT in %s:%d\n", __func__, __LINE__); //return system_InterruptEnable(TX_INT); return TRUE; } return FALSE; }
int control_SupportsHdcp(u16 baseAddr) { /* Line 0xA0 - HDMICTRL */ /* Type 0xC1 - TX with HDCP */ return control_ProductLine(baseAddr) == 0xA0 && control_ProductType(baseAddr) == 0xC1; }