int load_text_data_line(char *buffer, struct cpuidle_datas *datas, char *format, double *begin, double *end, size_t *start) { unsigned int state, freq, cpu; double time; if (strstr(buffer, "cpu_idle")) { if (sscanf(buffer, format, &time, &state, &cpu) != 3) { fprintf(stderr, "warning: Unrecognized cpuidle " "record. The result of analysis might " "be wrong.\n"); return -1; } if (*start) { *begin = time; *start = 0; } *end = time; return store_data(time, state, cpu, datas); } if (strstr(buffer, "cpu_frequency")) { if (sscanf(buffer, format, &time, &freq, &cpu) != 3) { fprintf(stderr, "warning: Unrecognized cpufreq " "record. The result of analysis might " "be wrong.\n"); return -1; } return cpu_change_pstate(datas, cpu, freq, time); } return get_wakeup_irq(datas, buffer); }
void sparc_cpu_do_interrupt(CPUState *cs) { SPARCCPU *cpu = SPARC_CPU(cs); CPUSPARCState *env = &cpu->env; int intno = cs->exception_index; trap_state *tsptr; /* Compute PSR before exposing state. */ if (env->cc_op != CC_OP_FLAGS) { cpu_get_psr(env); } #ifdef DEBUG_PCALL if (qemu_loglevel_mask(CPU_LOG_INT)) { static int count; const char *name; if (intno < 0 || intno >= 0x180) { name = "Unknown"; } else if (intno >= 0x100) { name = "Trap Instruction"; } else if (intno >= 0xc0) { name = "Window Fill"; } else if (intno >= 0x80) { name = "Window Spill"; } else { name = excp_names[intno]; if (!name) { name = "Unknown"; } } qemu_log("%6d: %s (v=%04x)\n", count, name, intno); log_cpu_state(cs, 0); #if 0 { int i; uint8_t *ptr; qemu_log(" code="); ptr = (uint8_t *)env->pc; for (i = 0; i < 16; i++) { qemu_log(" %02x", ldub(ptr + i)); } qemu_log("\n"); } #endif count++; } #endif #if !defined(CONFIG_USER_ONLY) if (env->tl >= env->maxtl) { cpu_abort(cs, "Trap 0x%04x while trap level (%d) >= MAXTL (%d)," " Error state", cs->exception_index, env->tl, env->maxtl); return; } #endif if (env->tl < env->maxtl - 1) { env->tl++; } else { env->pstate |= PS_RED; if (env->tl < env->maxtl) { env->tl++; } } tsptr = cpu_tsptr(env); tsptr->tstate = (cpu_get_ccr(env) << 32) | ((env->asi & 0xff) << 24) | ((env->pstate & 0xf3f) << 8) | cpu_get_cwp64(env); tsptr->tpc = env->pc; tsptr->tnpc = env->npc; tsptr->tt = intno; switch (intno) { case TT_IVEC: cpu_change_pstate(env, PS_PEF | PS_PRIV | PS_IG); break; case TT_TFAULT: case TT_DFAULT: case TT_TMISS ... TT_TMISS + 3: case TT_DMISS ... TT_DMISS + 3: case TT_DPROT ... TT_DPROT + 3: cpu_change_pstate(env, PS_PEF | PS_PRIV | PS_MG); break; default: cpu_change_pstate(env, PS_PEF | PS_PRIV | PS_AG); break; } if (intno == TT_CLRWIN) { cpu_set_cwp(env, cpu_cwp_dec(env, env->cwp - 1)); } else if ((intno & 0x1c0) == TT_SPILL) { cpu_set_cwp(env, cpu_cwp_dec(env, env->cwp - env->cansave - 2)); } else if ((intno & 0x1c0) == TT_FILL) { cpu_set_cwp(env, cpu_cwp_inc(env, env->cwp + 1)); } env->tbr &= ~0x7fffULL; env->tbr |= ((env->tl > 1) ? 1 << 14 : 0) | (intno << 5); env->pc = env->tbr; env->npc = env->pc + 4; cs->exception_index = -1; }