static void __init at91sam9g45_register_clocks(void) { int i; for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) clk_register(periph_clocks[i]); clkdev_add_table(periph_clocks_lookups, ARRAY_SIZE(periph_clocks_lookups)); clkdev_add_table(usart_clocks_lookups, ARRAY_SIZE(usart_clocks_lookups)); clkdev_add_physbase(&twi0_clk, AT91SAM9G45_BASE_TWI0, NULL); clkdev_add_physbase(&twi1_clk, AT91SAM9G45_BASE_TWI1, NULL); clkdev_add_physbase(&pioA_clk, AT91SAM9G45_BASE_PIOA, NULL); clkdev_add_physbase(&pioB_clk, AT91SAM9G45_BASE_PIOB, NULL); clkdev_add_physbase(&pioC_clk, AT91SAM9G45_BASE_PIOC, NULL); clkdev_add_physbase(&pioDE_clk, AT91SAM9G45_BASE_PIOD, NULL); clkdev_add_physbase(&pioDE_clk, AT91SAM9G45_BASE_PIOE, NULL); if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11()) clk_register(&vdec_clk); clk_register(&pck0); clk_register(&pck1); }
static void __init at91sam9g45_register_clocks(void) { int i; for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) clk_register(periph_clocks[i]); clkdev_add_table(periph_clocks_lookups, ARRAY_SIZE(periph_clocks_lookups)); clkdev_add_table(usart_clocks_lookups, ARRAY_SIZE(usart_clocks_lookups)); if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11()) clk_register(&vdec_clk); clk_register(&pck0); clk_register(&pck1); }