void cpu_raise_exception_ra(CPUSPARCState *env, int tt, uintptr_t ra) { CPUState *cs = CPU(sparc_env_get_cpu(env)); cs->exception_index = tt; cpu_loop_exit_restore(cs, ra); }
/* Exceptions processing helpers */ static inline void QEMU_NORETURN do_raise_exception_err(CPURISCVState *env, uint32_t exception, uintptr_t pc) { CPUState *cs = CPU(riscv_env_get_cpu(env)); qemu_log("%s: %d\n", __func__, exception); cs->exception_index = exception; cpu_loop_exit_restore(cs, pc); }
void QEMU_NORETURN hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra) { HPPACPU *cpu = hppa_env_get_cpu(env); CPUState *cs = CPU(cpu); cs->exception_index = excp; cpu_loop_exit_restore(cs, ra); }
static inline void QEMU_NORETURN raise_exception(CPUSH4State *env, int index, uintptr_t retaddr) { CPUState *cs = CPU(sh_env_get_cpu(env)); cs->exception_index = index; cpu_loop_exit_restore(cs, retaddr); }
void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; ret = superh_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); if (ret) { /* now we have a real cpu fault */ cpu_loop_exit_restore(cs, retaddr); } }
void superh_cpu_do_unaligned_access(CPUState *cs, vaddr addr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { switch (access_type) { case MMU_INST_FETCH: case MMU_DATA_LOAD: cs->exception_index = 0x0e0; break; case MMU_DATA_STORE: cs->exception_index = 0x100; break; } cpu_loop_exit_restore(cs, retaddr); }
/* * Signal an interruption. It is executed in the main CPU loop. * is_int is TRUE if coming from the int instruction. next_eip is the * env->eip value AFTER the interrupt instruction. It is only relevant if * is_int is TRUE. */ static void QEMU_NORETURN raise_interrupt2(CPUX86State *env, int intno, int is_int, int error_code, int next_eip_addend, uintptr_t retaddr) { CPUState *cs = CPU(x86_env_get_cpu(env)); if (!is_int) { cpu_svm_check_intercept_param(env, SVM_EXIT_EXCP_BASE + intno, error_code); intno = check_exception(env, intno, &error_code); } else { cpu_svm_check_intercept_param(env, SVM_EXIT_SWINT, 0); } cs->exception_index = intno; env->error_code = error_code; env->exception_is_int = is_int; env->exception_next_eip = env->eip + next_eip_addend; cpu_loop_exit_restore(cs, retaddr); }
void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc) { cpu->exception_index = EXCP_ATOMIC; cpu_loop_exit_restore(cpu, pc); }