//
// Fill in the details of a PCMCIA slot and initialize the device
//
void
cf_hwr_init(struct cf_slot *slot)
{
static int int_init = 0;
unsigned long new_state = *SA11X0_GPIO_PIN_LEVEL;
if (!int_init) {
int_init = 1;
#ifdef CYGPKG_KERNEL
// Set up interrupts
cyg_drv_interrupt_create(SA1110_CF_DETECT,
99, // Priority - what goes here?
(cyg_addrword_t) slot, // Data item passed to interrupt handler
(cyg_ISR_t *)cf_detect_isr,
(cyg_DSR_t *)cf_detect_dsr,
&cf_detect_interrupt_handle,
&cf_detect_interrupt);
cyg_drv_interrupt_attach(cf_detect_interrupt_handle);
cyg_drv_interrupt_configure(SA1110_CF_DETECT, true, true); // Detect either edge
cyg_drv_interrupt_acknowledge(SA1110_CF_DETECT);
cyg_drv_interrupt_unmask(SA1110_CF_DETECT);
cyg_drv_interrupt_create(SA1110_CF_IRQ,
99, // Priority - what goes here?
(cyg_addrword_t) slot, // Data item passed to interrupt handler
(cyg_ISR_t *)cf_irq_isr,
(cyg_DSR_t *)cf_irq_dsr,
&cf_irq_interrupt_handle,
&cf_irq_interrupt);
cyg_drv_interrupt_attach(cf_irq_interrupt_handle);
cyg_drv_interrupt_unmask(SA1110_CF_IRQ);
#endif
cyg_drv_interrupt_configure(SA1110_CF_IRQ, false, false); // Falling edge
cyg_drv_interrupt_acknowledge(SA1110_CF_IRQ);
}
slot->attr = (unsigned char *)0x38000000;
slot->attr_length = 0x200;
slot->io = (unsigned char *)0x30000000;
slot->io_length = 0x04000000;
slot->mem = (unsigned char *)0x3C000000;
slot->mem_length = 0x04000000;
slot->int_num = SA1110_CF_IRQ;
#ifdef CYG_HAL_STARTUP_ROM
// Disable CF bus & power (idle/off)
assabet_BCR(SA1110_BCR_CF_POWER |
SA1110_BCR_CF_RESET |
SA1110_BCR_CF_BUS,
SA1110_BCR_CF_POWER_OFF |
SA1110_BCR_CF_RESET_DISABLE |
SA1110_BCR_CF_BUS_OFF);
#endif
if ((new_state & SA1110_GPIO_CF_DETECT) == SA1110_GPIO_CF_PRESENT) {
if ((_assabet_BCR & SA1110_BCR_CF_POWER) == SA1110_BCR_CF_POWER_ON) {
// Assume that the ROM environment has turned the bus on
slot->state = CF_SLOT_STATE_Ready;
} else {
slot->state = CF_SLOT_STATE_Inserted;
}
} else {
slot->state = CF_SLOT_STATE_Empty;
}
}
static cyg_uint32 netxeth_ISR(cyg_vector_t vector, cyg_addrword_t data)
{
cyg_drv_interrupt_mask(vector);
cyg_drv_interrupt_acknowledge(vector);
return CYG_ISR_HANDLED | CYG_ISR_CALL_DSR;
}
// This ISR is called only for the high speed timer under test
static int
aeb_timer1_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs)
{
cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_TIMER1);
timer1_count++;
return 0; // No need to run DSR
}
// This ISR is called only for the Abort button interrupt
static int
aeb_abort_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs)
{
cyg_hal_user_break((CYG_ADDRWORD*)regs);
cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_EXT0);
return 0; // No need to run DSR
}
static int
cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc,
CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
int res = 0;
channel_data_t* chan = (channel_data_t*)__ch_data;
cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
char c;
cyg_uint32 lsr, _c;
CYGARC_HAL_SAVE_GP();
cyg_drv_interrupt_acknowledge(chan->isr_vector);
*__ctrlc = 0;
HAL_READ_UINT32(base+AAEC_UART_STATUS, lsr);
if ( (lsr & AAEC_UART_STATUS_RxFE) != 0 ) {
HAL_READ_UINT32(base+AAEC_UART_DATA, _c);
c = (char)_c;
if( cyg_hal_is_break( &c , 1 ) )
*__ctrlc = 1;
res = CYG_ISR_HANDLED;
}
CYGARC_HAL_RESTORE_GP();
return res;
}
static void
mpc8xxx_scc_serial_DSR(serial_channel *chan)
{
mpc8xxx_sxx_serial_info *smc_chan = (mpc8xxx_sxx_serial_info *)chan->dev_priv;
volatile struct scc_regs_8260 *ctl = (volatile struct scc_regs_8260 *)smc_chan->ctl;
volatile struct cp_bufdesc *txbd;
volatile struct cp_bufdesc *rxbd = smc_chan->rxbd;
volatile t_Smc_Pram *pram = (volatile t_Smc_Pram *)smc_chan->pram;
struct cp_bufdesc *rxlast;
int i, cache_state;
if (ctl->scce & SCCE_Tx) {
// Transmit interrupt
ctl->scce = SCCE_Tx; // Reset interrupt state;
txbd = smc_chan->tbase; // First buffer
while (true) {
if ((txbd->ctrl & (_BD_CTL_Ready|_BD_CTL_Int)) == _BD_CTL_Int) {
txbd->length = 0;
txbd->ctrl &= ~_BD_CTL_Int; // Reset interrupt bit
}
if (txbd->ctrl & _BD_CTL_Wrap) {
txbd = smc_chan->tbase;
break;
} else {
txbd++;
}
}
(chan->callbacks->xmt_char)(chan);
}
while (ctl->scce & SCCE_Rx) {
// Receive interrupt
ctl->scce = SCCE_Rx; // Reset interrupt state;
rxlast = (struct cp_bufdesc *) ((char *)IMM + pram->rbptr);
while (rxbd != rxlast) {
if ((rxbd->ctrl & _BD_CTL_Ready) == 0) {
for (i = 0; i < rxbd->length; i++) {
(chan->callbacks->rcv_char)(chan, rxbd->buffer[i]);
}
// Note: the MBX860 does not seem to snoop/invalidate the data cache properly!
HAL_DCACHE_IS_ENABLED(cache_state);
if (cache_state) {
HAL_DCACHE_INVALIDATE(rxbd->buffer, smc_chan->rxsize); // Make sure no stale data
}
rxbd->length = 0;
rxbd->ctrl |= _BD_CTL_Ready;
}
if (rxbd->ctrl & _BD_CTL_Wrap) {
rxbd = smc_chan->rbase;
} else {
rxbd++;
}
}
smc_chan->rxbd = (struct cp_bufdesc *)rxbd;
}
if (ctl->scce & SCCE_Bsy) {
ctl->scce = SCCE_Bsy; // Reset interrupt state;
}
cyg_drv_interrupt_acknowledge(smc_chan->int_num);
cyg_drv_interrupt_unmask(smc_chan->int_num);
}
// This ISR is called when the ethernet interrupt occurs
static int
quicc_eth_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs)
{
cyg_drv_interrupt_mask(CYGNUM_HAL_INTERRUPT_CPM_SCC1);
cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_CPM_SCC1);
return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR); // Run the DSR
}
static int
cyg_hal_plf_screen_isr(void *__ch_data, int* __ctrlc,
CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
int res = 0;
channel_data_t* chan = (channel_data_t*)__ch_data;
char c;
CYGARC_HAL_SAVE_GP();
cyg_drv_interrupt_acknowledge(chan->isr_vector);
*__ctrlc = 0;
if ( KeyboardTest() ) {
c = KBPending;
KBPending = 0xFF;
if( cyg_hal_is_break( &c , 1 ) )
*__ctrlc = 1;
res = CYG_ISR_HANDLED;
}
CYGARC_HAL_RESTORE_GP();
return res;
}
void
kbd_init(void)
{
// Initialize environment, setup interrupt handler
cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_KBDINT,
99, // Priority - what goes here?
0, // Data item passed to interrupt handler
(cyg_ISR_t *)keyboard_isr,
(cyg_DSR_t *)keyboard_dsr,
&kbd_interrupt_handle,
&kbd_interrupt);
cyg_drv_interrupt_attach(kbd_interrupt_handle);
cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_KBDINT);
cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_KBDINT);
// Set up the mbox for keyboard data
cyg_mbox_create(&kbd_events_mbox_handle, &kbd_events_mbox);
// This semaphore is set when there is a keypress
cyg_semaphore_init(&kbd_sem, 0);
// Create a thread whose job it is to de-bounce the keyboard and
// actually process the input, turning it into a series of events
cyg_thread_create(10, // Priority - just a number
kbd_server, // entry
0, // initial parameter
"KBD_server", // Name
&kbd_server_stack[0], // Stack
STACK_SIZE, // Size
&kbd_server_thread_handle, // Handle
&kbd_server_thread_data // Thread data structure
);
cyg_thread_resume(kbd_server_thread_handle); // Start it
}
// Serial I/O - low level interrupt handler (ISR)
static cyg_uint32
vrc437x_serial_ISR(cyg_vector_t vector, cyg_addrword_t data)
{
cyg_drv_interrupt_mask(VRC437X_SCC_INT);
cyg_drv_interrupt_acknowledge(VRC437X_SCC_INT);
return CYG_ISR_CALL_DSR; // Cause DSR to be run
}
static cyg_uint32
mn10300_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data)
{
serial_channel *chan = (serial_channel *)data;
mn10300_serial_info *mn10300_chan = (mn10300_serial_info *)chan->dev_priv;
cyg_uint8 sr = mn10300_read_sr( mn10300_chan);
while( (sr & SR_RBF) != 0 )
{
register cyg_int32 head = mn10300_chan->fifo_head;
cyg_uint8 c;
int i;
HAL_READ_UINT8( mn10300_chan->base+SERIAL_RXB, c );
mn10300_chan->fifo[head++] = c;
if( head >= sizeof(mn10300_chan->fifo) )
head = 0;
mn10300_chan->fifo_head = head;
sr = mn10300_read_sr( mn10300_chan);
}
cyg_drv_interrupt_acknowledge(mn10300_chan->rx_int);
return CYG_ISR_CALL_DSR; // Cause DSR to be run
}
static cyg_uint32
sys_timer_isr(cyg_vector_t vector, cyg_addrword_t data)
{
++sys_timer_ticks;
#ifdef CYGSEM_REDBOOT_BSP_SYSCALLS_GPROF
HAL_CLOCK_RESET(CYGNUM_HAL_INTERRUPT_RTC, set_period);
#else
HAL_CLOCK_RESET(CYGNUM_HAL_INTERRUPT_RTC, CYGNUM_HAL_RTC_PERIOD);
#endif // CYGSEM_REDBOOT_BSP_SYSCALLS_GPROF
cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_RTC);
#ifdef CYGSEM_REDBOOT_BSP_SYSCALLS_GPROF
if ( timer_callback ) {
char *intrpc = (char *)0;
char *intrsp = (char *)0;
// There may be a number of ways to get the PC and (optional) SP
// information out of the HAL. Hence this is conditioned. In some
// configurations, a register-set pointer is available as
// (invisible) argument 3 to this ISR call.
#ifdef HAL_GET_PROFILE_INFO
HAL_GET_PROFILE_INFO( intrpc, intrsp );
#endif // HAL_GET_PROFILE_INFO available
CYGARC_HAL_SAVE_GP();
timer_callback( intrpc, intrsp );
CYGARC_HAL_RESTORE_GP();
}
#endif // CYGSEM_REDBOOT_BSP_SYSCALLS_GPROF
return CYG_ISR_HANDLED;
}
static int
cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc,
CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
int res = 0;
channel_data_t* chan = (channel_data_t*)__ch_data;
char c;
cyg_uint8 lsr;
CYGARC_HAL_SAVE_GP();
cyg_drv_interrupt_acknowledge(chan->isr_vector);
*__ctrlc = 0;
HAL_READ_UINT8(chan->base+CYG_DEV_LSR, lsr);
if ( (lsr & SIO_LSR_DR) != 0 ) {
HAL_READ_UINT8(chan->base+CYG_DEV_RBR, c);
if( cyg_hal_is_break( &c , 1 ) )
*__ctrlc = 1;
res = CYG_ISR_HANDLED;
}
CYGARC_HAL_RESTORE_GP();
return res;
}
static int
cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc,
CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
int res = 0;
channel_data_t* chan = (channel_data_t*)__ch_data;
char c;
cyg_uint32 lsr;
CYGARC_HAL_SAVE_GP();
cyg_drv_interrupt_acknowledge(chan->isr_vector);
*__ctrlc = 0;
HAL_READ_UINT32(chan->base+OFS_UFSTAT, lsr);
if (lsr & 0x0f)
{
HAL_READ_UINT8(chan->base+OFS_URXH, c);
if( cyg_hal_is_break( &c , 1 ) )
*__ctrlc = 1;
res = CYG_ISR_HANDLED;
}
CYGARC_HAL_RESTORE_GP();
return res;
}
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
int res = 0;
channel_data_t* chan = (channel_data_t*)__ch_data;
volatile cyg_uint32* pulBase = chan->pulBase;
char c;
cyg_uint32 status;
CYGARC_HAL_SAVE_GP();
cyg_drv_interrupt_acknowledge(chan->isr_vector);
*__ctrlc = 0;
status = pulBase[REL_Adr_uartfr / sizeof(cyg_uint32)];
if(RX_DATA(status))
{
c = (cyg_uint8)(pulBase[REL_Adr_uartdr / sizeof(cyg_uint32)] & 0xFF);
if( cyg_hal_is_break( &c , 1 ) )
*__ctrlc = 1;
res = CYG_ISR_HANDLED;
}
CYGARC_HAL_RESTORE_GP();
return res;
}