void update_speed_motor_dac(float dac_float){
uint32_t negativo = 0;
//Verificando a necessidade de alterar a rotação do motor:
if ( (dac_float < 0) && (MotorIsFoward) ){
Reverse_Motor; //Invertendo rotação do Motor
flag_revertion = !flag_revertion;
hallA = 0;
hallB = 0;
} else if ( (dac_float > 0) && (MotorIsReverse) ) {
Foward_Motor;
flag_revertion = !flag_revertion;
hallA = 0;
hallB = 0;
}
if (dac_float < 0){
dac_float = -dac_float;
negativo = 1;
}
if (dac_float > DACC_MAX_DATA){
dac_float = DACC_MAX_DATA;
}
//Transformar Valor de RPM para DAC(0-1023)
dac_val = dac_float;
while((dacc_get_interrupt_status(DACC) & DACC_ISR_TXRDY) != DACC_ISR_TXRDY);
dacc_write_conversion_data(DACC, dac_val);
if (negativo){
dac_val = -dac_val;
}
}
void update_speed_motor(float speed){
uint32_t negativo = 0;
//Verificando a necessidade de alterar a rotação do motor:
if ( (speed < 0) && (MotorIsFoward) ){
Reverse_Motor; //Invertendo rotação do Motor
//speed = -speed;
flag_revertion = !flag_revertion;
hallA = 0;
hallB = 0;
} else if ( (speed > 0) && (MotorIsReverse) ) {
Foward_Motor;
flag_revertion = !flag_revertion;
hallA = 0;
hallB = 0;
}
if (speed < 0){
speed = -speed;
negativo = 1;
}
if (speed > MOTOR_MAX_RPM){
speed = MOTOR_MAX_RPM;
}
//Transformar Valor de RPM para DAC(0-1023)
dac_val = speed*RPMtoDAC + yo;
while((dacc_get_interrupt_status(DACC) & DACC_ISR_TXRDY) != DACC_ISR_TXRDY);
dacc_write_conversion_data(DACC, dac_val);
if (negativo){
dac_val = -dac_val;
}
}
void TC0_Handler(void){
volatile uint32_t ul_dummy, status;
uint32_t valorDAC = 1024;
ul_dummy = tc_get_status(TC0,0);
UNUSED(ul_dummy);
/************************************************************************/
/* ADC */
/************************************************************************/
if(nleituraADC >= 500){
adc_start(ADC);
nleituraADC = 0;
}
nleituraADC++;
/************************************************************************/
/* Escreve um novo valor no DAC */
/************************************************************************/
status = dacc_get_interrupt_status(DACC_BASE);
/* namostra > 2*pi ?? */
if(namostra > resolucao)
namostra = 0;
ySeno = (sin(deltaTeta*namostra)+1)*((float)max_digital)/MAX_AMPLITUDE_ANAG;
dacc_write_conversion_data(DACC_BASE, ySeno);
namostra++;
}
/**
* \brief DACC interrupt handler.
*/
void DACC_Handler(void)
{
uint32_t isr = dacc_get_interrupt_status(DACC);
/** Check if one PDC buffer has been received. */
if (isr & DACC_ISR_ENDTX) {
/** Add cur_dac_buffer as next transfert for PDC. */
g_pdc_nextpacket.ul_addr = (uint32_t) dacc_out_buffer[cur_dac_buffer];
g_pdc_nextpacket.ul_size = SAMPLE_BLOCK_SIZE;
pdc_tx_init(dacc_pdc, NULL, &g_pdc_nextpacket);
/** Notify DSP task to start data processing. */
xSemaphoreGiveFromISR(dacc_notification_semaphore,
&higher_priority_task_woken);
/** Use next PDC buffer for ADC and DACC. */
cur_dac_buffer = (cur_dac_buffer + 1) % 3;
}
}
void config_dacc(void){
sysclk_enable_peripheral_clock(ID_DACC);
/* Reset DACC registers */
dacc_reset(DACC);
/* Half-Word transfer mode */
dacc_set_transfer_mode(DACC, 0);
/* Timing:
* startup - 0x10 (17 clocks)
* internal trigger clock - 0x60 (96 clocks)
*/
dacc_set_timing(DACC, 0x10, 0x60);
/*External trigger mode disabled. DACC in free running mode.*/
dacc_disable_trigger(DACC);
/* Enable DAC */
dacc_enable(DACC);
while((dacc_get_interrupt_status(DACC) & DACC_ISR_TXRDY) != DACC_ISR_TXRDY);
dacc_write_conversion_data(DACC, 0);
}
/**
* \brief SysTick IRQ handler.
*/
void SysTick_Handler(void)
{
uint32_t status;
uint32_t dac_val;
status = dacc_get_interrupt_status(DACC_BASE);
/* If ready for new data */
if ((status & DACC_ISR_TXRDY) == DACC_ISR_TXRDY) {
g_ul_index_sample++;
if (g_ul_index_sample >= SAMPLES) {
g_ul_index_sample = 0;
}
dac_val = g_uc_wave_sel ?
((g_ul_index_sample > SAMPLES / 2) ? 0 : MAX_AMPLITUDE)
: wave_to_dacc(gc_us_sine_data[g_ul_index_sample],
g_l_amplitude,
MAX_DIGITAL * 2, MAX_AMPLITUDE);
dacc_write_conversion_data(DACC_BASE, dac_val);
}
}
/**
* \brief Configure to trigger ADC by PWM Event Line.
*/
static void configure_pwm_trigger(void)
{
/* PWM frequency in Hz. */
#define PWM_FREQUENCY 2
/* Maximum duty cycle value. */
#define MAX_DUTY_CYCLE 1000
/* Enable PWMC peripheral clock. */
pmc_enable_periph_clk(ID_PWM);
/* Disable PWM channel 0. */
pwm_channel_disable(PWM, PWM_CHANNEL_0);
gpio_configure_pin(PIN_PWMC_PWMH0_TRIG, PIN_PWMC_PWMH0_TRIG_FLAG);
/* Set clock A to run at PWM_FREQUENCY * MAX_DUTY_CYCLE (clock B is not used). */
pwm_clock_t pwm_clock_setting = {
.ul_clka = PWM_FREQUENCY * MAX_DUTY_CYCLE,
.ul_clkb = 0,
.ul_mck = sysclk_get_cpu_hz()
};
pwm_init(PWM, &pwm_clock_setting);
/* Configure PWMC for channel 0 (left-aligned). */
pwm_channel_t pwm_trigger_channel = {
.channel = PWM_CHANNEL_0,
.alignment = PWM_ALIGN_LEFT,
.polarity = PWM_LOW,
.ul_prescaler = PWM_CMR_CPRE_CLKA,
.ul_period = MAX_DUTY_CYCLE,
.ul_duty = MAX_DUTY_CYCLE / 2
};
pwm_channel_init(PWM, &pwm_trigger_channel);
pwm_cmp_t pwm_comparison_setting = {
.unit = PWM_CMP_UNIT_0,
.b_enable = true,
.ul_value = MAX_DUTY_CYCLE / 2,
.b_pulse_on_line_0 = true
};
pwm_cmp_init(PWM, &pwm_comparison_setting);
/* Enable PWM channel 0. */
pwm_channel_enable(PWM, PWM_CHANNEL_0);
/* Set PWM Event Line 0 trigger. */
#if SAM3S || SAM3XA || SAM4S
adc_configure_trigger(ADC, ADC_TRIG_PWM_EVENT_LINE_0, 0);
#elif SAM3U
#ifdef ADC_12B
adc12b_configure_trigger(ADC12B, ADC12B_TRIG_PWM_EVENT_LINE_0);
#else
adc_configure_trigger(ADC, ADC_TRIG_PWM_EVENT_LINE_0);
#endif
#endif
}
#endif
/**
* \brief Read converted data through PDC channel.
*
* \param p_adc The pointer of adc peripheral.
* \param p_s_buffer The destination buffer.
* \param ul_size The size of the buffer.
*/
#if SAM3S || SAM3N || SAM3XA || SAM4S || SAM4C
static uint32_t adc_read_buffer(Adc * p_adc, uint16_t * p_s_buffer, uint32_t ul_size)
{
/* Check if the first PDC bank is free. */
if ((p_adc->ADC_RCR == 0) && (p_adc->ADC_RNCR == 0)) {
p_adc->ADC_RPR = (uint32_t) p_s_buffer;
p_adc->ADC_RCR = ul_size;
p_adc->ADC_PTCR = ADC_PTCR_RXTEN;
return 1;
} else { /* Check if the second PDC bank is free. */
if (p_adc->ADC_RNCR == 0) {
p_adc->ADC_RNPR = (uint32_t) p_s_buffer;
p_adc->ADC_RNCR = ul_size;
return 1;
} else {
return 0;
}
}
}
#elif SAM3U
#ifdef ADC_12B
static uint32_t adc12_read_buffer(Adc12b * p_adc, uint16_t * p_s_buffer,
uint32_t ul_size)
{
/* Check if the first PDC bank is free. */
if ((p_adc->ADC12B_RCR == 0) && (p_adc->ADC12B_RNCR == 0)) {
p_adc->ADC12B_RPR = (uint32_t) p_s_buffer;
p_adc->ADC12B_RCR = ul_size;
p_adc->ADC12B_PTCR = ADC12B_PTCR_RXTEN;
return 1;
} else { /* Check if the second PDC bank is free. */
if (p_adc->ADC12B_RNCR == 0) {
p_adc->ADC12B_RNPR = (uint32_t) p_s_buffer;
p_adc->ADC12B_RNCR = ul_size;
return 1;
} else {
return 0;
}
}
}
#else
static uint32_t adc_read_buffer(Adc * p_adc, uint16_t * p_s_buffer, uint32_t ul_size)
{
/* Check if the first PDC bank is free. */
if ((p_adc->ADC_RCR == 0) && (p_adc->ADC_RNCR == 0)) {
p_adc->ADC_RPR = (uint32_t) p_s_buffer;
p_adc->ADC_RCR = ul_size;
p_adc->ADC_PTCR = ADC_PTCR_RXTEN;
return 1;
} else { /* Check if the second PDC bank is free. */
if (p_adc->ADC_RNCR == 0) {
p_adc->ADC_RNPR = (uint32_t) p_s_buffer;
p_adc->ADC_RNCR = ul_size;
return 1;
} else {
return 0;
}
}
}
#endif
#endif
/**
* \brief Start ADC sample.
* Initialize ADC, set clock and timing, and set ADC to given mode.
*/
static void start_adc(void)
{
/* Enable peripheral clock. */
uint32_t i;
pmc_enable_periph_clk(ID_ADC);
/* Initialize ADC. */
/*
* Formula: ADCClock = MCK / ( (PRESCAL+1) * 2 )
* For example, MCK = 64MHZ, PRESCAL = 4, then:
* ADCClock = 64 / ((4+1) * 2) = 6.4MHz;
*/
/* Formula:
* Startup Time = startup value / ADCClock
* Startup time = 64 / 6.4MHz = 10 us
*/
adc_init(ADC, sysclk_get_cpu_hz(), 6400000, ADC_STARTUP_TIME_4);
memset((void *)&g_adc_sample_data, 0, sizeof(g_adc_sample_data));
/* Set ADC timing. */
/* Formula:
* Transfer Time = (TRANSFER * 2 + 3) / ADCClock
* Tracking Time = (TRACKTIM + 1) / ADCClock
* Settling Time = settling value / ADCClock
*
* Transfer Time = (1 * 2 + 3) / 6.4MHz = 781 ns
* Tracking Time = (1 + 1) / 6.4MHz = 312 ns
* Settling Time = 3 / 6.4MHz = 469 ns
*/
adc_configure_timing(ADC, TRACKING_TIME, ADC_SETTLING_TIME_3, TRANSFER_PERIOD);
/* Enable channel number tag. */
adc_enable_tag(ADC);
/* Enable/disable sequencer. */
if (g_adc_test_mode.uc_sequence_en) {
/* Set user defined channel sequence. */
adc_configure_sequence(ADC, ch_list, 2);
/* Enable sequencer. */
adc_start_sequencer(ADC);
/* Enable channels. */
for (i = 0; i < 2; i++) {
adc_enable_channel(ADC, (enum adc_channel_num_t)i);
}
/* Update channel number. */
g_adc_sample_data.uc_ch_num[0] = ch_list[0];
g_adc_sample_data.uc_ch_num[1] = ch_list[1];
} else {
/* Disable sequencer. */
adc_stop_sequencer(ADC);
/* Enable channels. */
adc_enable_channel(ADC, ADC_CHANNEL_POTENTIOMETER);
adc_enable_channel(ADC, ADC_TEMPERATURE_SENSOR);
/* Update channel number. */
g_adc_sample_data.uc_ch_num[0] = ADC_CHANNEL_POTENTIOMETER;
g_adc_sample_data.uc_ch_num[1] = ADC_TEMPERATURE_SENSOR;
}
/* Enable the temperature sensor. */
adc_enable_ts(ADC);
/* Set gain and offset (only single ended mode used here). */
adc_disable_anch(ADC); /* Disable analog change. */
if (g_adc_test_mode.uc_gain_en) {
adc_enable_anch(ADC);
/* gain = 2 */
adc_set_channel_input_gain(ADC, ADC_CHANNEL_POTENTIOMETER, ADC_GAINVALUE_2);
} else {
/* gain = 1 */
adc_set_channel_input_gain(ADC, ADC_CHANNEL_POTENTIOMETER, ADC_GAINVALUE_0);
}
if (g_adc_test_mode.uc_offset_en) {
adc_enable_anch(ADC);
adc_enable_channel_input_offset(ADC, ADC_CHANNEL_POTENTIOMETER);
} else {
adc_disable_channel_input_offset(ADC, ADC_CHANNEL_POTENTIOMETER);
}
/* Set Auto Calibration Mode. */
if (g_adc_test_mode.uc_auto_calib_en) {
adc_set_calibmode(ADC);
while (1) {
if ((adc_get_status(ADC) & ADC_ISR_EOCAL) ==
ADC_ISR_EOCAL)
break;
}
}
/* Set power save. */
if (g_adc_test_mode.uc_power_save_en) {
adc_configure_power_save(ADC, 1, 0);
} else {
adc_configure_power_save(ADC, 0, 0);;
}
/* Transfer with/without PDC. */
if (g_adc_test_mode.uc_pdc_en) {
adc_read_buffer(ADC, g_adc_sample_data.us_value, BUFFER_SIZE);
/* Enable PDC channel interrupt. */
adc_enable_interrupt(ADC, ADC_IER_RXBUFF);
} else {
/* Enable Data ready interrupt. */
adc_enable_interrupt(ADC, ADC_IER_DRDY);
}
/* Enable ADC interrupt. */
NVIC_EnableIRQ(ADC_IRQn);
/* Configure trigger mode and start convention. */
switch (g_adc_test_mode.uc_trigger_mode) {
case TRIGGER_MODE_SOFTWARE:
adc_configure_trigger(ADC, ADC_TRIG_SW, 0); /* Disable hardware trigger. */
break;
case TRIGGER_MODE_ADTRG:
gpio_configure_pin(PINS_ADC_TRIG, PINS_ADC_TRIG_FLAG);
adc_configure_trigger(ADC, ADC_TRIG_EXT, 0);
break;
case TRIGGER_MODE_TIMER:
configure_time_trigger();
break;
case TRIGGER_MODE_PWM:
configure_pwm_trigger();
break;
case TRIGGER_MODE_FREERUN:
adc_configure_trigger(ADC, ADC_TRIG_SW, 1);
break;
default:
break;
}
}
/**
* \brief Systick handler.
*/
void SysTick_Handler(void)
{
uint32_t status;
uint32_t dac_val;
int i = 0;
gs_ul_ms_ticks++;
status = dacc_get_interrupt_status(DACC_BASE);
/* If ready for new data */
if ((status & DACC_ISR_TXRDY) == DACC_ISR_TXRDY) {
/*dac_val = g_uc_wave_sel ?
((g_ul_index_sample > SAMPLES / 2) ? 0 : MAX_AMPLITUDE)
: wave_to_dacc(gc_us_sine_data[g_ul_index_sample],
g_l_amplitude,
MAX_DIGITAL * 2, MAX_AMPLITUDE);*/
//reading sample from ADC
adc_start(ADC);
/* Check if ADC sample is done. */
if (g_adc_sample_data.us_done == ADC_DONE_MASK) {
/*for (i = 0; i < NUM_CHANNELS; i++) {
printf("CH%02d: %04d mv. ",
(int)g_adc_sample_data.uc_ch_num[i],
(int)(g_adc_sample_data.
us_value[i] *
VOLT_REF /
MAX_DIGITAL));
}
puts("\r");*/
g_adc_sample_data.us_done = 0;
//end reading
//write to the DACC
dacc_write_conversion_data(DACC_BASE, g_adc_sample_data.us_value[0]);
}
}
}
#if SAM3S || SAM3N || SAM3XA || SAM4S || SAM4C
/**
* \brief Interrupt handler for the ADC.
*/
void ADC_Handler(void)
{
uint32_t i;
uint32_t ul_temp;
uint8_t uc_ch_num;
/* With PDC transfer */
if (g_adc_test_mode.uc_pdc_en) {
if ((adc_get_status(ADC) & ADC_ISR_RXBUFF) ==
ADC_ISR_RXBUFF) {
g_adc_sample_data.us_done = ADC_DONE_MASK;
adc_read_buffer(ADC, g_adc_sample_data.us_value, BUFFER_SIZE);
/* Only keep sample value, and discard channel number. */
for (i = 0; i < NUM_CHANNELS; i++) {
g_adc_sample_data.us_value[i] &= ADC_LCDR_LDATA_Msk;
}
}
} else { /* Without PDC transfer */
if ((adc_get_status(ADC) & ADC_ISR_DRDY) ==
ADC_ISR_DRDY) {
ul_temp = adc_get_latest_value(ADC);
for (i = 0; i < NUM_CHANNELS; i++) {
uc_ch_num = (ul_temp & ADC_LCDR_CHNB_Msk) >>
ADC_LCDR_CHNB_Pos;
if (g_adc_sample_data.uc_ch_num[i] == uc_ch_num) {
g_adc_sample_data.us_value[i] =
ul_temp &
ADC_LCDR_LDATA_Msk;
g_adc_sample_data.us_done |= 1 << i;
}
}
}
}
