int dbg_hard_stp_event() { offset_t addr; int mode; dbg_evt_t *evt; if(!dbg_hard_stp_enabled()) return VM_IGNORE; debug(DBG_HARD_STP, "sstep event [req %s]\n" ,dbg_hard_stp_requestor()?"vmm":"usr"); if(dbg_soft_resuming()) dbg_soft_resume_post(); dbg_hard_stp_disable(); if(dbg_hard_stp_requestor() == DBG_REQ_VMM) { dbg_hard_dr6_clean(); return VM_INTERN; } dbg_hard_set_dr6_dirty(1); vm_get_code_addr(&addr, 0, &mode); evt = &info->vmm.ctrl.dbg.evt; evt->type = DBG_EVT_TYPE_HARD_SSTEP; evt->addr = addr; debug(DBG_HARD_STP, "prepared sstep ctrl event for 0x%X\n", evt->addr); return VM_DONE; }
static void dbg_hard_protect_dr() { debug(DBG_HARD_BRK, "hard protect dr\n"); /* ** XXX: protect DEBUG_CTL_MSR ** vmx: load/save dbgctl + msr intercept ** svm: virt lbr stores dbgctl into vmcb ** else deny rw msr IA32_DEBUG_CTL_MSR */ __pre_access(__dr6); __pre_access(__dr7); __deny_dr_access(); info->vm.dr_shadow[0].raw = get_dr0(); info->vm.dr_shadow[1].raw = get_dr1(); info->vm.dr_shadow[2].raw = get_dr2(); info->vm.dr_shadow[3].raw = get_dr3(); info->vm.dr_shadow[4].low = __dr6.low; info->vm.dr_shadow[5].low = __dr7.low; dbg_hard_dr6_clean(); dbg_hard_brk_dr7_clean(); }