static int es8328_resume(struct snd_soc_codec *codec) { struct regmap *regmap = dev_get_regmap(codec->dev, NULL); struct es8328_priv *es8328; int ret; es8328 = snd_soc_codec_get_drvdata(codec); ret = clk_prepare_enable(es8328->clk); if (ret) { dev_err(codec->dev, "unable to enable clock\n"); return ret; } ret = regulator_bulk_enable(ARRAY_SIZE(es8328->supplies), es8328->supplies); if (ret) { dev_err(codec->dev, "unable to enable regulators\n"); return ret; } regcache_mark_dirty(regmap); ret = regcache_sync(regmap); if (ret) { dev_err(codec->dev, "unable to sync regcache\n"); return ret; } return 0; }
static int ak4613_resume(struct snd_soc_codec *codec) { struct regmap *regmap = dev_get_regmap(codec->dev, NULL); regcache_mark_dirty(regmap); return regcache_sync(regmap); }
static int ak4613_resume(struct snd_soc_component *component) { struct regmap *regmap = dev_get_regmap(component->dev, NULL); regcache_cache_only(regmap, false); return regcache_sync(regmap); }
static int mc13783_probe(struct snd_soc_component *component) { struct mc13783_priv *priv = snd_soc_component_get_drvdata(component); snd_soc_component_init_regmap(component, dev_get_regmap(component->dev->parent, NULL)); /* these are the reset values */ mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX0, 0x25893); mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX1, 0x00d35A); mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_TX, 0x420000); mc13xxx_reg_write(priv->mc13xxx, MC13783_SSI_NETWORK, 0x013060); mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_CODEC, 0x180027); mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_DAC, 0x0e0004); if (priv->adc_ssi_port == MC13783_SSI1_PORT) mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC, AUDIO_SSI_SEL, 0); else mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC, AUDIO_SSI_SEL, AUDIO_SSI_SEL); if (priv->dac_ssi_port == MC13783_SSI1_PORT) mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC, AUDIO_SSI_SEL, 0); else mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC, AUDIO_SSI_SEL, AUDIO_SSI_SEL); return 0; }
static int mt6323_probe(struct platform_device *pdev) { int ret; struct mt6323_chip *mt6323; mt6323 = devm_kzalloc(&pdev->dev, sizeof(*mt6323), GFP_KERNEL); if (!mt6323) return -ENOMEM; mt6323->dev = &pdev->dev; /* * mt6323 MFD is child device of soc pmic wrapper. * Regmap is set from its parent. */ mt6323->regmap = dev_get_regmap(pdev->dev.parent, NULL); if (!mt6323->regmap) return -ENODEV; platform_set_drvdata(pdev, mt6323); ret = mfd_add_devices(&pdev->dev, -1, mt6323_devs, ARRAY_SIZE(mt6323_devs), NULL, 0, NULL); if (ret) dev_err(&pdev->dev, "failed to add child devices: %d\n", ret); return ret; }
/** * snd_soc_codec_set_cache_io: Set up standard I/O functions. * * @codec: CODEC to configure. * @map: Register map to write to * * Register formats are frequently shared between many I2C and SPI * devices. In order to promote code reuse the ASoC core provides * some standard implementations of CODEC read and write operations * which can be set up using this function. * * The caller is responsible for allocating and initialising the * actual cache. * * Note that at present this code cannot be used by CODECs with * volatile registers. */ int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec, struct regmap *regmap) { int ret; /* Device has made its own regmap arrangements */ if (!regmap) codec->control_data = dev_get_regmap(codec->dev, NULL); else codec->control_data = regmap; if (IS_ERR(codec->control_data)) return PTR_ERR(codec->control_data); codec->write = hw_write; codec->read = hw_read; ret = regmap_get_val_bytes(codec->control_data); /* Errors are legitimate for non-integer byte * multiples */ if (ret > 0) codec->val_bytes = ret; codec->using_regmap = true; return 0; }
static int mt6351_codec_driver_probe(struct platform_device *pdev) { struct mt6351_priv *priv; priv = devm_kzalloc(&pdev->dev, sizeof(struct mt6351_priv), GFP_KERNEL); if (!priv) return -ENOMEM; dev_set_drvdata(&pdev->dev, priv); priv->dev = &pdev->dev; priv->regmap = dev_get_regmap(pdev->dev.parent, NULL); if (!priv->regmap) return -ENODEV; dev_dbg(priv->dev, "%s(), dev name %s\n", __func__, dev_name(&pdev->dev)); return devm_snd_soc_register_component(&pdev->dev, &mt6351_soc_component_driver, mt6351_dai_driver, ARRAY_SIZE(mt6351_dai_driver)); }
static int si476x_probe(struct snd_soc_component *component) { snd_soc_component_init_regmap(component, dev_get_regmap(component->dev->parent, NULL)); return 0; }
static int cpcap_rtc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct cpcap_rtc *rtc; int err; rtc = devm_kzalloc(dev, sizeof(*rtc), GFP_KERNEL); if (!rtc) return -ENOMEM; rtc->regmap = dev_get_regmap(dev->parent, NULL); if (!rtc->regmap) return -ENODEV; platform_set_drvdata(pdev, rtc); rtc->rtc_dev = devm_rtc_device_register(dev, "cpcap_rtc", &cpcap_rtc_ops, THIS_MODULE); if (IS_ERR(rtc->rtc_dev)) return PTR_ERR(rtc->rtc_dev); err = cpcap_get_vendor(dev, rtc->regmap, &rtc->vendor); if (err) return err; rtc->alarm_irq = platform_get_irq(pdev, 0); err = devm_request_threaded_irq(dev, rtc->alarm_irq, NULL, cpcap_rtc_alarm_irq, IRQF_TRIGGER_NONE, "rtc_alarm", rtc); if (err) { dev_err(dev, "Could not request alarm irq: %d\n", err); return err; } disable_irq(rtc->alarm_irq); /* Stock Android uses the 1 Hz interrupt for "secure clock daemon", * which is not supported by the mainline kernel. The mainline kernel * does not use the irq at the moment, but we explicitly request and * disable it, so that its masked and does not wake up the processor * every second. */ rtc->update_irq = platform_get_irq(pdev, 1); err = devm_request_threaded_irq(dev, rtc->update_irq, NULL, cpcap_rtc_update_irq, IRQF_TRIGGER_NONE, "rtc_1hz", rtc); if (err) { dev_err(dev, "Could not request update irq: %d\n", err); return err; } disable_irq(rtc->update_irq); err = device_init_wakeup(dev, 1); if (err) { dev_err(dev, "wakeup initialization failed (%d)\n", err); /* ignore error and continue without wakeup support */ } return 0; }
static int ak4613_suspend(struct snd_soc_codec *codec) { struct regmap *regmap = dev_get_regmap(codec->dev, NULL); regcache_cache_only(regmap, true); regcache_mark_dirty(regmap); return 0; }
static int ak4642_resume(struct snd_soc_codec *codec) { struct regmap *regmap = dev_get_regmap(codec->dev, NULL); regcache_cache_only(regmap, false); regcache_sync(regmap); return 0; }
static int ak4642_suspend(struct snd_soc_component *component) { struct regmap *regmap = dev_get_regmap(component->dev, NULL); regcache_cache_only(regmap, true); regcache_mark_dirty(regmap); return 0; }
static int pm8xxx_vib_probe(struct platform_device *pdev) { struct pm8xxx_vib *vib; struct input_dev *input_dev; int error; unsigned int val; vib = devm_kzalloc(&pdev->dev, sizeof(*vib), GFP_KERNEL); if (!vib) return -ENOMEM; vib->regmap = dev_get_regmap(pdev->dev.parent, NULL); if (!vib->regmap) return -ENODEV; input_dev = devm_input_allocate_device(&pdev->dev); if (!input_dev) return -ENOMEM; INIT_WORK(&vib->work, pm8xxx_work_handler); vib->vib_input_dev = input_dev; /* operate in manual mode */ error = regmap_read(vib->regmap, VIB_DRV, &val); if (error < 0) return error; val &= ~VIB_DRV_EN_MANUAL_MASK; error = regmap_write(vib->regmap, VIB_DRV, val); if (error < 0) return error; vib->reg_vib_drv = val; input_dev->name = "pm8xxx_vib_ffmemless"; input_dev->id.version = 1; input_dev->close = pm8xxx_vib_close; input_set_drvdata(input_dev, vib); input_set_capability(vib->vib_input_dev, EV_FF, FF_RUMBLE); error = input_ff_create_memless(input_dev, NULL, pm8xxx_vib_play_effect); if (error) { dev_err(&pdev->dev, "couldn't register vibrator as FF device\n"); return error; } error = input_register_device(input_dev); if (error) { dev_err(&pdev->dev, "couldn't register input device\n"); return error; } platform_set_drvdata(pdev, vib); return 0; }
static int sc27xx_poweroff_probe(struct platform_device *pdev) { if (regmap) return -EINVAL; regmap = dev_get_regmap(pdev->dev.parent, NULL); if (!regmap) return -ENODEV; pm_power_off = sc27xx_poweroff_do_poweroff; register_syscore_ops(&poweroff_syscore_ops); return 0; }
static int act8945a_pmic_probe(struct platform_device *pdev) { struct regulator_config config = { }; const struct regulator_desc *regulators; struct act8945a_pmic *act8945a; struct regulator_dev *rdev; int i, num_regulators; bool voltage_select; act8945a = devm_kzalloc(&pdev->dev, sizeof(*act8945a), GFP_KERNEL); if (!act8945a) return -ENOMEM; act8945a->regmap = dev_get_regmap(pdev->dev.parent, NULL); if (!act8945a->regmap) { dev_err(&pdev->dev, "could not retrieve regmap from parent device\n"); return -EINVAL; } voltage_select = of_property_read_bool(pdev->dev.parent->of_node, "active-semi,vsel-high"); if (voltage_select) { regulators = act8945a_alt_regulators; num_regulators = ARRAY_SIZE(act8945a_alt_regulators); } else { regulators = act8945a_regulators; num_regulators = ARRAY_SIZE(act8945a_regulators); } config.dev = &pdev->dev; config.dev->of_node = pdev->dev.parent->of_node; config.driver_data = act8945a; for (i = 0; i < num_regulators; i++) { rdev = devm_regulator_register(&pdev->dev, ®ulators[i], &config); if (IS_ERR(rdev)) { dev_err(&pdev->dev, "failed to register %s regulator\n", regulators[i].name); return PTR_ERR(rdev); } } platform_set_drvdata(pdev, act8945a); /* Unlock expert registers. */ return regmap_write(act8945a->regmap, ACT8945A_SYS_UNLK_REGS, 0xef); }
/** * snd_soc_codec_set_cache_io: Set up standard I/O functions. * * @codec: CODEC to configure. * @addr_bits: Number of bits of register address data. * @data_bits: Number of bits of data per register. * @control: Control bus used. * * Register formats are frequently shared between many I2C and SPI * devices. In order to promote code reuse the ASoC core provides * some standard implementations of CODEC read and write operations * which can be set up using this function. * * The caller is responsible for allocating and initialising the * actual cache. * * Note that at present this code cannot be used by CODECs with * volatile registers. */ int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec, int addr_bits, int data_bits, enum snd_soc_control_type control) { struct regmap_config config; int ret; memset(&config, 0, sizeof(config)); codec->write = hw_write; codec->read = hw_read; config.reg_bits = addr_bits; config.val_bits = data_bits; switch (control) { #if IS_ENABLED(CONFIG_REGMAP_I2C) case SND_SOC_I2C: codec->control_data = regmap_init_i2c(to_i2c_client(codec->dev), &config); break; #endif #if IS_ENABLED(CONFIG_REGMAP_SPI) case SND_SOC_SPI: codec->control_data = regmap_init_spi(to_spi_device(codec->dev), &config); break; #endif case SND_SOC_REGMAP: /* Device has made its own regmap arrangements */ codec->using_regmap = true; if (!codec->control_data) codec->control_data = dev_get_regmap(codec->dev, NULL); if (codec->control_data) { ret = regmap_get_val_bytes(codec->control_data); /* Errors are legitimate for non-integer byte * multiples */ if (ret > 0) codec->val_bytes = ret; } break; default: return -EINVAL; } return PTR_ERR_OR_ZERO(codec->control_data); }
static int init_8960(struct tsens_device *tmdev) { int ret, i; u32 reg_cntl; tmdev->tm_map = dev_get_regmap(tmdev->dev, NULL); if (!tmdev->tm_map) return -ENODEV; /* * The status registers for each sensor are discontiguous * because some SoCs have 5 sensors while others have more * but the control registers stay in the same place, i.e * directly after the first 5 status registers. */ for (i = 0; i < tmdev->num_sensors; i++) { if (i >= 5) tmdev->sensor[i].status = S0_STATUS_ADDR + 40; tmdev->sensor[i].status += i * 4; } reg_cntl = SW_RST; ret = regmap_update_bits(tmdev->tm_map, CNTL_ADDR, SW_RST, reg_cntl); if (ret) return ret; if (tmdev->num_sensors > 1) { reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18); reg_cntl &= ~SW_RST; ret = regmap_update_bits(tmdev->tm_map, CONFIG_ADDR, CONFIG_MASK, CONFIG); } else { reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16); reg_cntl &= ~CONFIG_MASK_8660; reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660; } reg_cntl |= GENMASK(tmdev->num_sensors - 1, 0) << SENSOR0_SHIFT; ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg_cntl); if (ret) return ret; reg_cntl |= EN; ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg_cntl); if (ret) return ret; return 0; }
/* liam need to make this lower power with dapm */ static int wm8974_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { u16 power1 = snd_soc_read(codec, WM8974_POWER1) & ~0x3; switch (level) { case SND_SOC_BIAS_ON: case SND_SOC_BIAS_PREPARE: power1 |= 0x1; /* VMID 50k */ snd_soc_write(codec, WM8974_POWER1, power1); break; case SND_SOC_BIAS_STANDBY: power1 |= WM8974_POWER1_BIASEN | WM8974_POWER1_BUFIOEN; if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { regcache_sync(dev_get_regmap(codec->dev, NULL)); /* Initial cap charge at VMID 5k */ snd_soc_write(codec, WM8974_POWER1, power1 | 0x3); mdelay(100); } power1 |= 0x2; /* VMID 500k */ snd_soc_write(codec, WM8974_POWER1, power1); break; case SND_SOC_BIAS_OFF: snd_soc_write(codec, WM8974_POWER1, 0); snd_soc_write(codec, WM8974_POWER2, 0); snd_soc_write(codec, WM8974_POWER3, 0); break; } codec->dapm.bias_level = level; return 0; }
static int mc13783_probe(struct snd_soc_codec *codec) { struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec); int ret; ret = snd_soc_codec_set_cache_io(codec, dev_get_regmap(codec->dev->parent, NULL)); if (ret != 0) { dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); return ret; } /* these are the reset values */ mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX0, 0x25893); mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX1, 0x00d35A); mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_TX, 0x420000); mc13xxx_reg_write(priv->mc13xxx, MC13783_SSI_NETWORK, 0x013060); mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_CODEC, 0x180027); mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_DAC, 0x0e0004); if (priv->adc_ssi_port == MC13783_SSI1_PORT) mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC, AUDIO_SSI_SEL, 0); else mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC, 0, AUDIO_SSI_SEL); if (priv->dac_ssi_port == MC13783_SSI1_PORT) mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC, AUDIO_SSI_SEL, 0); else mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC, 0, AUDIO_SSI_SEL); return 0; }
static int max77650_regulator_probe(struct platform_device *pdev) { struct max77650_regulator_desc **rdescs; struct max77650_regulator_desc *rdesc; struct regulator_config config = { }; struct device *dev, *parent; struct regulator_dev *rdev; struct regmap *map; unsigned int val; int i, rv; dev = &pdev->dev; parent = dev->parent; if (!dev->of_node) dev->of_node = parent->of_node; rdescs = devm_kcalloc(dev, MAX77650_REGULATOR_NUM_REGULATORS, sizeof(*rdescs), GFP_KERNEL); if (!rdescs) return -ENOMEM; map = dev_get_regmap(parent, NULL); if (!map) return -ENODEV; rv = regmap_read(map, MAX77650_REG_CID, &val); if (rv) return rv; rdescs[MAX77650_REGULATOR_ID_LDO] = &max77650_LDO_desc; rdescs[MAX77650_REGULATOR_ID_SBB0] = &max77650_SBB0_desc; switch (MAX77650_CID_BITS(val)) { case MAX77650_CID_77650A: case MAX77650_CID_77650C: rdescs[MAX77650_REGULATOR_ID_SBB1] = &max77650_SBB1_desc; rdescs[MAX77650_REGULATOR_ID_SBB2] = &max77650_SBB2_desc; break; case MAX77650_CID_77651A: case MAX77650_CID_77651B: rdescs[MAX77650_REGULATOR_ID_SBB1] = &max77651_SBB1_desc; rdescs[MAX77650_REGULATOR_ID_SBB2] = &max77651_SBB2_desc; break; default: return -ENODEV; } config.dev = parent; for (i = 0; i < MAX77650_REGULATOR_NUM_REGULATORS; i++) { rdesc = rdescs[i]; config.driver_data = rdesc; rdev = devm_regulator_register(dev, &rdesc->desc, &config); if (IS_ERR(rdev)) return PTR_ERR(rdev); } return 0; }
static struct regmap *si476x_get_regmap(struct device *dev) { return dev_get_regmap(dev->parent, NULL); }
static int cpcap_regulator_probe(struct platform_device *pdev) { struct cpcap_ddata *ddata; const struct of_device_id *match; struct regulator_config config; struct regulator_init_data init_data; int i; match = of_match_device(of_match_ptr(cpcap_regulator_id_table), &pdev->dev); if (!match) return -EINVAL; if (!match->data) { dev_err(&pdev->dev, "no configuration data found\n"); return -ENODEV; } ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); if (!ddata) return -ENOMEM; ddata->reg = dev_get_regmap(pdev->dev.parent, NULL); if (!ddata->reg) return -ENODEV; ddata->dev = &pdev->dev; ddata->soc = match->data; platform_set_drvdata(pdev, ddata); memset(&config, 0, sizeof(config)); memset(&init_data, 0, sizeof(init_data)); config.dev = &pdev->dev; config.regmap = ddata->reg; config.init_data = &init_data; for (i = 0; i < CPCAP_NR_REGULATORS; i++) { const struct cpcap_regulator *regulator = &ddata->soc[i]; struct regulator_dev *rdev; if (!regulator->rdesc.name) break; if (regulator->rdesc.volt_table == unknown_val_tbl) continue; config.driver_data = (void *)regulator; rdev = devm_regulator_register(&pdev->dev, ®ulator->rdesc, &config); if (IS_ERR(rdev)) { dev_err(&pdev->dev, "failed to register regulator %s\n", regulator->rdesc.name); return PTR_ERR(rdev); } } return 0; }
static struct regmap *mc13783_get_regmap(struct device *dev) { return dev_get_regmap(dev->parent, NULL); }
static int si476x_codec_probe(struct snd_soc_codec *codec) { struct regmap *regmap = dev_get_regmap(codec->dev->parent, NULL); return snd_soc_codec_set_cache_io(codec, regmap); }
static int iadc_probe(struct platform_device *pdev) { struct device_node *node = pdev->dev.of_node; struct device *dev = &pdev->dev; struct iio_dev *indio_dev; struct iadc_chip *iadc; int ret, irq_eoc; u32 res; indio_dev = devm_iio_device_alloc(dev, sizeof(*iadc)); if (!indio_dev) return -ENOMEM; iadc = iio_priv(indio_dev); iadc->dev = dev; iadc->regmap = dev_get_regmap(dev->parent, NULL); if (!iadc->regmap) return -ENODEV; init_completion(&iadc->complete); mutex_init(&iadc->lock); ret = of_property_read_u32(node, "reg", &res); if (ret < 0) return -ENODEV; iadc->base = res; ret = iadc_version_check(iadc); if (ret < 0) return -ENODEV; ret = iadc_rsense_read(iadc, node); if (ret < 0) return -ENODEV; dev_dbg(iadc->dev, "sense resistors %d and %d micro Ohm\n", iadc->rsense[IADC_INT_RSENSE], iadc->rsense[IADC_EXT_RSENSE]); irq_eoc = platform_get_irq(pdev, 0); if (irq_eoc == -EPROBE_DEFER) return irq_eoc; if (irq_eoc < 0) iadc->poll_eoc = true; ret = iadc_reset(iadc); if (ret < 0) { dev_err(dev, "reset failed\n"); return ret; } if (!iadc->poll_eoc) { ret = devm_request_irq(dev, irq_eoc, iadc_isr, 0, "spmi-iadc", iadc); if (!ret) enable_irq_wake(irq_eoc); else return ret; } else { device_init_wakeup(iadc->dev, 1); } ret = iadc_update_offset(iadc); if (ret < 0) { dev_err(dev, "failed offset calibration\n"); return ret; } indio_dev->dev.parent = dev; indio_dev->dev.of_node = node; indio_dev->name = pdev->name; indio_dev->modes = INDIO_DIRECT_MODE; indio_dev->info = &iadc_info; indio_dev->channels = iadc_channels; indio_dev->num_channels = ARRAY_SIZE(iadc_channels); return devm_iio_device_register(dev, indio_dev); }
static int pmic8xxx_pwrkey_probe(struct platform_device *pdev) { struct input_dev *pwr; int key_release_irq = platform_get_irq(pdev, 0); int key_press_irq = platform_get_irq(pdev, 1); int err; unsigned int delay; unsigned int pon_cntl; struct regmap *regmap; struct pmic8xxx_pwrkey *pwrkey; u32 kpd_delay; bool pull_up; if (of_property_read_u32(pdev->dev.of_node, "debounce", &kpd_delay)) kpd_delay = 15625; if (kpd_delay > 62500 || kpd_delay == 0) { dev_err(&pdev->dev, "invalid power key trigger delay\n"); return -EINVAL; } pull_up = of_property_read_bool(pdev->dev.of_node, "pull-up"); regmap = dev_get_regmap(pdev->dev.parent, NULL); if (!regmap) { dev_err(&pdev->dev, "failed to locate regmap for the device\n"); return -ENODEV; } pwrkey = devm_kzalloc(&pdev->dev, sizeof(*pwrkey), GFP_KERNEL); if (!pwrkey) return -ENOMEM; pwrkey->key_press_irq = key_press_irq; pwr = devm_input_allocate_device(&pdev->dev); if (!pwr) { dev_dbg(&pdev->dev, "Can't allocate power button\n"); return -ENOMEM; } input_set_capability(pwr, EV_KEY, KEY_POWER); pwr->name = "pmic8xxx_pwrkey"; pwr->phys = "pmic8xxx_pwrkey/input0"; delay = (kpd_delay << 10) / USEC_PER_SEC; delay = 1 + ilog2(delay); err = regmap_read(regmap, PON_CNTL_1, &pon_cntl); if (err < 0) { dev_err(&pdev->dev, "failed reading PON_CNTL_1 err=%d\n", err); return err; } pon_cntl &= ~PON_CNTL_TRIG_DELAY_MASK; pon_cntl |= (delay & PON_CNTL_TRIG_DELAY_MASK); if (pull_up) pon_cntl |= PON_CNTL_PULL_UP; else pon_cntl &= ~PON_CNTL_PULL_UP; err = regmap_write(regmap, PON_CNTL_1, pon_cntl); if (err < 0) { dev_err(&pdev->dev, "failed writing PON_CNTL_1 err=%d\n", err); return err; } err = devm_request_irq(&pdev->dev, key_press_irq, pwrkey_press_irq, IRQF_TRIGGER_RISING, "pmic8xxx_pwrkey_press", pwr); if (err) { dev_err(&pdev->dev, "Can't get %d IRQ for pwrkey: %d\n", key_press_irq, err); return err; } err = devm_request_irq(&pdev->dev, key_release_irq, pwrkey_release_irq, IRQF_TRIGGER_RISING, "pmic8xxx_pwrkey_release", pwr); if (err) { dev_err(&pdev->dev, "Can't get %d IRQ for pwrkey: %d\n", key_release_irq, err); return err; } err = input_register_device(pwr); if (err) { dev_err(&pdev->dev, "Can't register power key: %d\n", err); return err; } platform_set_drvdata(pdev, pwrkey); device_init_wakeup(&pdev->dev, 1); return 0; }
static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct device *parent = dev->parent; struct clk_regmap_mux_div *a53cc; struct regmap *regmap; struct clk_init_data init = { }; int ret = -ENODEV; regmap = dev_get_regmap(parent, NULL); if (!regmap) { dev_err(dev, "failed to get regmap: %d\n", ret); return ret; } a53cc = devm_kzalloc(dev, sizeof(*a53cc), GFP_KERNEL); if (!a53cc) return -ENOMEM; init.name = "a53mux"; init.parent_names = gpll0_a53cc; init.num_parents = ARRAY_SIZE(gpll0_a53cc); init.ops = &clk_regmap_mux_div_ops; init.flags = CLK_SET_RATE_PARENT; a53cc->clkr.hw.init = &init; a53cc->clkr.regmap = regmap; a53cc->reg_offset = 0x50; a53cc->hid_width = 5; a53cc->hid_shift = 0; a53cc->src_width = 3; a53cc->src_shift = 8; a53cc->parent_map = gpll0_a53cc_map; a53cc->pclk = devm_clk_get(parent, NULL); if (IS_ERR(a53cc->pclk)) { ret = PTR_ERR(a53cc->pclk); dev_err(dev, "failed to get clk: %d\n", ret); return ret; } a53cc->clk_nb.notifier_call = a53cc_notifier_cb; ret = clk_notifier_register(a53cc->pclk, &a53cc->clk_nb); if (ret) { dev_err(dev, "failed to register clock notifier: %d\n", ret); return ret; } ret = devm_clk_register_regmap(dev, &a53cc->clkr); if (ret) { dev_err(dev, "failed to register regmap clock: %d\n", ret); goto err; } ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, &a53cc->clkr.hw); if (ret) { dev_err(dev, "failed to add clock provider: %d\n", ret); goto err; } platform_set_drvdata(pdev, a53cc); return 0; err: clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb); return ret; }
/* * keypad controller should be initialized in the following sequence * only, otherwise it might get into FSM stuck state. * * - Initialize keypad control parameters, like no. of rows, columns, * timing values etc., * - configure rows and column gpios pull up/down. * - set irq edge type. * - enable the keypad controller. */ static int pmic8xxx_kp_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; unsigned int rows, cols; bool repeat; bool wakeup; struct pmic8xxx_kp *kp; int rc; unsigned int ctrl_val; rc = matrix_keypad_parse_of_params(&pdev->dev, &rows, &cols); if (rc) return rc; if (cols > PM8XXX_MAX_COLS || rows > PM8XXX_MAX_ROWS || cols < PM8XXX_MIN_COLS) { dev_err(&pdev->dev, "invalid platform data\n"); return -EINVAL; } repeat = !of_property_read_bool(np, "linux,input-no-autorepeat"); wakeup = of_property_read_bool(np, "wakeup-source") || /* legacy name */ of_property_read_bool(np, "linux,keypad-wakeup"); kp = devm_kzalloc(&pdev->dev, sizeof(*kp), GFP_KERNEL); if (!kp) return -ENOMEM; kp->regmap = dev_get_regmap(pdev->dev.parent, NULL); if (!kp->regmap) return -ENODEV; platform_set_drvdata(pdev, kp); kp->num_rows = rows; kp->num_cols = cols; kp->dev = &pdev->dev; kp->input = devm_input_allocate_device(&pdev->dev); if (!kp->input) { dev_err(&pdev->dev, "unable to allocate input device\n"); return -ENOMEM; } kp->key_sense_irq = platform_get_irq(pdev, 0); if (kp->key_sense_irq < 0) { dev_err(&pdev->dev, "unable to get keypad sense irq\n"); return kp->key_sense_irq; } kp->key_stuck_irq = platform_get_irq(pdev, 1); if (kp->key_stuck_irq < 0) { dev_err(&pdev->dev, "unable to get keypad stuck irq\n"); return kp->key_stuck_irq; } kp->input->name = "PMIC8XXX keypad"; kp->input->phys = "pmic8xxx_keypad/input0"; kp->input->id.bustype = BUS_I2C; kp->input->id.version = 0x0001; kp->input->id.product = 0x0001; kp->input->id.vendor = 0x0001; kp->input->open = pmic8xxx_kp_open; kp->input->close = pmic8xxx_kp_close; rc = matrix_keypad_build_keymap(NULL, NULL, PM8XXX_MAX_ROWS, PM8XXX_MAX_COLS, kp->keycodes, kp->input); if (rc) { dev_err(&pdev->dev, "failed to build keymap\n"); return rc; } if (repeat) __set_bit(EV_REP, kp->input->evbit); input_set_capability(kp->input, EV_MSC, MSC_SCAN); input_set_drvdata(kp->input, kp); /* initialize keypad state */ memset(kp->keystate, 0xff, sizeof(kp->keystate)); memset(kp->stuckstate, 0xff, sizeof(kp->stuckstate)); rc = pmic8xxx_kpd_init(kp, pdev); if (rc < 0) { dev_err(&pdev->dev, "unable to initialize keypad controller\n"); return rc; } rc = devm_request_any_context_irq(&pdev->dev, kp->key_sense_irq, pmic8xxx_kp_irq, IRQF_TRIGGER_RISING, "pmic-keypad", kp); if (rc < 0) { dev_err(&pdev->dev, "failed to request keypad sense irq\n"); return rc; } rc = devm_request_any_context_irq(&pdev->dev, kp->key_stuck_irq, pmic8xxx_kp_stuck_irq, IRQF_TRIGGER_RISING, "pmic-keypad-stuck", kp); if (rc < 0) { dev_err(&pdev->dev, "failed to request keypad stuck irq\n"); return rc; } rc = regmap_read(kp->regmap, KEYP_CTRL, &ctrl_val); if (rc < 0) { dev_err(&pdev->dev, "failed to read KEYP_CTRL register\n"); return rc; } kp->ctrl_reg = ctrl_val; rc = input_register_device(kp->input); if (rc < 0) { dev_err(&pdev->dev, "unable to register keypad input device\n"); return rc; } device_init_wakeup(&pdev->dev, wakeup); return 0; }
static int max77650_charger_probe(struct platform_device *pdev) { struct power_supply_config pscfg = {}; struct max77650_charger_data *chg; struct power_supply *battery; struct device *dev, *parent; int rv, chg_irq, chgin_irq; unsigned int prop; dev = &pdev->dev; parent = dev->parent; chg = devm_kzalloc(dev, sizeof(*chg), GFP_KERNEL); if (!chg) return -ENOMEM; platform_set_drvdata(pdev, chg); chg->map = dev_get_regmap(parent, NULL); if (!chg->map) return -ENODEV; chg->dev = dev; pscfg.of_node = dev->of_node; pscfg.drv_data = chg; chg_irq = platform_get_irq_byname(pdev, "CHG"); if (chg_irq < 0) return chg_irq; chgin_irq = platform_get_irq_byname(pdev, "CHGIN"); if (chgin_irq < 0) return chgin_irq; rv = devm_request_any_context_irq(dev, chg_irq, max77650_charger_check_status, IRQF_ONESHOT, "chg", chg); if (rv < 0) return rv; rv = devm_request_any_context_irq(dev, chgin_irq, max77650_charger_check_status, IRQF_ONESHOT, "chgin", chg); if (rv < 0) return rv; battery = devm_power_supply_register(dev, &max77650_battery_desc, &pscfg); if (IS_ERR(battery)) return PTR_ERR(battery); rv = of_property_read_u32(dev->of_node, "input-voltage-min-microvolt", &prop); if (rv == 0) { rv = max77650_charger_set_vchgin_min(chg, prop); if (rv) return rv; } rv = of_property_read_u32(dev->of_node, "input-current-limit-microamp", &prop); if (rv == 0) { rv = max77650_charger_set_ichgin_lim(chg, prop); if (rv) return rv; } return max77650_charger_enable(chg); }
static int pmic_mpp_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct pinctrl_pin_desc *pindesc; struct pinctrl_desc *pctrldesc; struct pmic_mpp_pad *pad, *pads; struct pmic_mpp_state *state; int ret, npins, i; u32 reg; ret = of_property_read_u32(dev->of_node, "reg", ®); if (ret < 0) { dev_err(dev, "missing base address"); return ret; } npins = platform_irq_count(pdev); if (!npins) return -EINVAL; if (npins < 0) return npins; BUG_ON(npins > ARRAY_SIZE(pmic_mpp_groups)); state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL); if (!state) return -ENOMEM; platform_set_drvdata(pdev, state); state->dev = &pdev->dev; state->map = dev_get_regmap(dev->parent, NULL); pindesc = devm_kcalloc(dev, npins, sizeof(*pindesc), GFP_KERNEL); if (!pindesc) return -ENOMEM; pads = devm_kcalloc(dev, npins, sizeof(*pads), GFP_KERNEL); if (!pads) return -ENOMEM; pctrldesc = devm_kzalloc(dev, sizeof(*pctrldesc), GFP_KERNEL); if (!pctrldesc) return -ENOMEM; pctrldesc->pctlops = &pmic_mpp_pinctrl_ops; pctrldesc->pmxops = &pmic_mpp_pinmux_ops; pctrldesc->confops = &pmic_mpp_pinconf_ops; pctrldesc->owner = THIS_MODULE; pctrldesc->name = dev_name(dev); pctrldesc->pins = pindesc; pctrldesc->npins = npins; pctrldesc->num_custom_params = ARRAY_SIZE(pmic_mpp_bindings); pctrldesc->custom_params = pmic_mpp_bindings; #ifdef CONFIG_DEBUG_FS pctrldesc->custom_conf_items = pmic_conf_items; #endif for (i = 0; i < npins; i++, pindesc++) { pad = &pads[i]; pindesc->drv_data = pad; pindesc->number = i; pindesc->name = pmic_mpp_groups[i]; pad->irq = platform_get_irq(pdev, i); if (pad->irq < 0) return pad->irq; pad->base = reg + i * PMIC_MPP_ADDRESS_RANGE; ret = pmic_mpp_populate(state, pad); if (ret < 0) return ret; } state->chip = pmic_mpp_gpio_template; state->chip.parent = dev; state->chip.base = -1; state->chip.ngpio = npins; state->chip.label = dev_name(dev); state->chip.of_gpio_n_cells = 2; state->chip.can_sleep = false; state->ctrl = pinctrl_register(pctrldesc, dev, state); if (IS_ERR(state->ctrl)) return PTR_ERR(state->ctrl); ret = gpiochip_add_data(&state->chip, state); if (ret) { dev_err(state->dev, "can't add gpio chip\n"); goto err_chip; } ret = gpiochip_add_pin_range(&state->chip, dev_name(dev), 0, 0, npins); if (ret) { dev_err(dev, "failed to add pin range\n"); goto err_range; } return 0; err_range: gpiochip_remove(&state->chip); err_chip: pinctrl_unregister(state->ctrl); return ret; }