static int __exit mx1_camera_remove(struct platform_device *pdev)
{
struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
struct mx1_camera_dev *pcdev = container_of(soc_host,
struct mx1_camera_dev, soc_host);
struct resource *res;
imx_dma_free(pcdev->dma_chan);
disable_fiq(pcdev->irq);
mxc_set_irq_fiq(pcdev->irq, 0);
release_fiq(&fh);
clk_put(pcdev->clk);
soc_camera_host_unregister(soc_host);
iounmap(pcdev->base);
res = pcdev->res;
release_mem_region(res->start, resource_size(res));
kfree(pcdev);
dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
return 0;
}
static void fiq_enable(struct platform_device *pdev, unsigned int fiq, bool enable)
{
if (enable)
enable_fiq(fiq);
else
disable_fiq(fiq);
}
static int snd_imx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct imx_pcm_runtime_data *iprtd = runtime->private_data;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
imx_ssi_set_next_poll(iprtd);
add_timer(&iprtd->timer);
if (++fiq_enable == 1)
enable_fiq(imx_pcm_fiq);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
del_timer(&iprtd->timer);
if (--fiq_enable == 0)
disable_fiq(imx_pcm_fiq);
break;
default:
return -EINVAL;
}
return 0;
}
static void eventq_get(CMD_T* cmd)
{
disable_fiq();
SETREG(SATA_EQ_CTRL, 1); // The next entry from the Event Queue is copied to SATA_EQ_DATA_0 through SATA_EQ_DATA_2.
int count=0;
while ((GETREG(SATA_EQ_DATA_2) & 8) != 0) {
count++;
if (count > 100000) {
uart_print_level_1("Warning in sata_main::eventq_get\r\n");
count=0;
}
}
UINT32 EQReadData0 = GETREG(SATA_EQ_DATA_0);
UINT32 EQReadData1 = GETREG(SATA_EQ_DATA_1);
cmd->lba = EQReadData1 & 0x3FFFFFFF;
cmd->sector_count = EQReadData0 >> 16;
cmd->cmd_type = EQReadData1 >> 31;
if(cmd->sector_count == 0)
cmd->sector_count = 0x10000;
if (g_sata_context.eq_full)
{
g_sata_context.eq_full = FALSE;
if ((GETREG(SATA_PHY_STATUS) & 0xF0F) == 0x103)
{
SETREG(SATA_CTRL_2, g_sata_action_flags);
}
}
enable_fiq();
}
static int __init mx1_camera_probe(struct platform_device *pdev)
{
struct mx1_camera_dev *pcdev;
struct resource *res;
struct pt_regs regs;
struct clk *clk;
void __iomem *base;
unsigned int irq;
int err = 0;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
irq = platform_get_irq(pdev, 0);
if (!res || (int)irq <= 0) {
err = -ENODEV;
goto exit;
}
clk = clk_get(&pdev->dev, "csi_clk");
if (IS_ERR(clk)) {
err = PTR_ERR(clk);
goto exit;
}
pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
if (!pcdev) {
dev_err(&pdev->dev, "Could not allocate pcdev\n");
err = -ENOMEM;
goto exit_put_clk;
}
pcdev->res = res;
pcdev->clk = clk;
pcdev->pdata = pdev->dev.platform_data;
if (pcdev->pdata)
pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
if (!pcdev->mclk) {
dev_warn(&pdev->dev,
"mclk_10khz == 0! Please, fix your platform data. "
"Using default 20MHz\n");
pcdev->mclk = 20000000;
}
INIT_LIST_HEAD(&pcdev->capture);
spin_lock_init(&pcdev->lock);
/*
* Request the regions.
*/
if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
err = -EBUSY;
goto exit_kfree;
}
base = ioremap(res->start, resource_size(res));
if (!base) {
err = -ENOMEM;
goto exit_release;
}
pcdev->irq = irq;
pcdev->base = base;
/* request dma */
pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
if (pcdev->dma_chan < 0) {
dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
err = -EBUSY;
goto exit_iounmap;
}
dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
pcdev);
imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
IMX_DMA_MEMSIZE_32, MX1_DMA_REQ_CSI_R, 0);
/* burst length : 16 words = 64 bytes */
imx_dma_config_burstlen(pcdev->dma_chan, 0);
/* request irq */
err = claim_fiq(&fh);
if (err) {
dev_err(&pdev->dev, "Camera interrupt register failed\n");
goto exit_free_dma;
}
set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
&mx1_camera_sof_fiq_start);
regs.ARM_r8 = (long)MX1_DMA_DIMR;
regs.ARM_r9 = (long)MX1_DMA_CCR(pcdev->dma_chan);
regs.ARM_r10 = (long)pcdev->base + CSICR1;
regs.ARM_fp = (long)pcdev->base + CSISR;
regs.ARM_sp = 1 << pcdev->dma_chan;
set_fiq_regs(®s);
mxc_set_irq_fiq(irq, 1);
enable_fiq(irq);
pcdev->soc_host.drv_name = DRIVER_NAME;
pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
pcdev->soc_host.priv = pcdev;
pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
pcdev->soc_host.nr = pdev->id;
err = soc_camera_host_register(&pcdev->soc_host);
if (err)
goto exit_free_irq;
dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
return 0;
exit_free_irq:
disable_fiq(irq);
mxc_set_irq_fiq(irq, 0);
release_fiq(&fh);
exit_free_dma:
imx_dma_free(pcdev->dma_chan);
exit_iounmap:
iounmap(base);
exit_release:
release_mem_region(res->start, resource_size(res));
exit_kfree:
kfree(pcdev);
exit_put_clk:
clk_put(clk);
exit:
return err;
}
static void floppy_disable_dma(dmach_t channel, dma_t *dma)
{
disable_fiq(dma->dma_irq);
release_fiq(&fh);
}
static void arc_disable_dma(dmach_t channel, dma_t *dma)
{
disable_fiq(dma->dma_irq);
}
void rk_fiq_disable(int irq)
{
printk("rk_fiq_enable\n");
rk_fiq_mask(irq_get_irq_data(irq));
disable_fiq(irq);
}