/* call with list_lock and dispc runtime held */ static void omap_irq_update(struct drm_device *dev) { struct omap_drm_private *priv = dev->dev_private; struct omap_drm_irq *irq; uint32_t irqmask = priv->vblank_mask; BUG_ON(!spin_is_locked(&list_lock)); list_for_each_entry(irq, &priv->irq_list, node) irqmask |= irq->irqmask; DBG("irqmask=%08x", irqmask); dispc_write_irqenable(irqmask); dispc_read_irqenable(); /* flush posted write */ }
/* dispc.irq_lock has to be locked by the caller */ static void _omap_dispc_set_irqs(void) { u32 mask; int i; struct omap_dispc_isr_data *isr_data; mask = dispc_compat.irq_error_mask; for (i = 0; i < DISPC_MAX_NR_ISRS; i++) { isr_data = &dispc_compat.registered_isr[i]; if (isr_data->isr == NULL) continue; mask |= isr_data->mask; } dispc_write_irqenable(mask); }