void TASK_SPI( void *pvParameters )
{
UNUSED( pvParameters );
spi_configureLED();
/* Create a semaphore */
rxSemaphoreLED = xSemaphoreCreateBinary();
/* Ensure that semaphore is valid */
Assert( rxSemaphoreLED );
/* Start DMA reception */
dma_start_transfer_job( &zDMA_LEDResourceRx );
for(;;)
{
/* Block task until DMA read complete */
xSemaphoreTake( rxSemaphoreLED, portMAX_DELAY );
/* Do something */
/* Respond..? */
dma_start_transfer_job( &zDMA_LEDResourceTx );
/* Yield to oncoming traffic */
taskYIELD();
}
}
/**
* \brief ECB mode encryption test with DMA.
*/
static void ecb_mode_test_dma(void)
{
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- ECB cipher mode\r\n");
printf("- DMA mode\r\n");
printf("- 4 32bit words with DMA\r\n");
printf("-----------------------------------\r\n");
//! [encryption_mode]
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_AUTO_START;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(&aes_instance,AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(&aes_instance, key128);
/* The initialization vector is not used by the ECB cipher mode. */
dma_start_transfer_job(&example_resource_tx);
aes_set_new_message(&aes_instance);
aes_clear_new_message(&aes_instance);
/* Wait DMA transfer */
while (false == state) {
}
/* Wait for the end of the encryption process. */
while (!(aes_get_status(&aes_instance) & AES_ENCRYPTION_COMPLETE)) {
}
state = false;
dma_start_transfer_job(&example_resource_rx);
/* Wait DMA transfer */
while (false == state) {
}
if ((ref_cipher_text_ecb[0] != output_data[0]) ||
(ref_cipher_text_ecb[1] != output_data[1]) ||
(ref_cipher_text_ecb[2] != output_data[2]) ||
(ref_cipher_text_ecb[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
//! [encryption_mode]
}
//! [config_dma_for_wave]
static void config_dma_for_wave(void)
{
//! [config_dma_resource_for_wave]
struct dma_resource_config config;
dma_get_config_defaults(&config);
config.trigger_action = DMA_TRIGGER_ACTON_BEAT;
config.peripheral_trigger = CONF_COMPARE_TRIGGER;
dma_allocate(&compare_dma_resource, &config);
//! [config_dma_resource_for_wave]
//! [config_dma_descriptor_for_wave]
struct dma_descriptor_config descriptor_config;
dma_descriptor_get_config_defaults(&descriptor_config);
descriptor_config.block_transfer_count = 3;
descriptor_config.beat_size = DMA_BEAT_SIZE_HWORD;
descriptor_config.dst_increment_enable = false;
descriptor_config.source_address =
(uint32_t)compare_values + sizeof(compare_values);
descriptor_config.destination_address =
(uint32_t)&CONF_PWM_MODULE->CC[CONF_PWM_CHANNEL];
dma_descriptor_create(&compare_dma_descriptor, &descriptor_config);
//! [config_dma_descriptor_for_wave]
//! [config_dma_job_for_wave]
dma_add_descriptor(&compare_dma_resource, &compare_dma_descriptor);
dma_add_descriptor(&compare_dma_resource, &compare_dma_descriptor);
dma_start_transfer_job(&compare_dma_resource);
//! [config_dma_job_for_wave]
}
//! [config_dma_for_tx]
static void _config_dma_for_tx(void)
{
//! [config_dma_resource_for_tx]
struct dma_resource_config config;
dma_get_config_defaults(&config);
config.trigger_action = DMA_TRIGGER_ACTON_BEAT;
config.peripheral_trigger = CONF_TX_TRIGGER;
dma_allocate(&tx_dma_resource, &config);
//! [config_dma_resource_for_tx]
//! [config_dma_descriptor_for_tx]
struct dma_descriptor_config descriptor_config;
dma_descriptor_get_config_defaults(&descriptor_config);
descriptor_config.block_transfer_count = 4;
descriptor_config.beat_size = DMA_BEAT_SIZE_HWORD;
descriptor_config.dst_increment_enable = false;
descriptor_config.source_address =
(uint32_t)tx_values + sizeof(tx_values);
descriptor_config.destination_address = (uint32_t)&CONF_I2S_MODULE->DATA[0];
dma_descriptor_create(&tx_dma_descriptor, &descriptor_config);
tx_dma_descriptor.DESCADDR.reg = (uint32_t)&tx_dma_descriptor;
//! [config_dma_descriptor_for_tx]
//! [config_dma_job_for_tx]
dma_add_descriptor(&tx_dma_resource, &tx_dma_descriptor);
dma_start_transfer_job(&tx_dma_resource);
//! [config_dma_job_for_tx]
}
int main(void)
{
//! [sample_resource]
struct dma_resource example_resource;
//! [sample_resource]
system_init();
//! [setup_init]
//! [setup_dma_resource]
configure_dma_resource(&example_resource);
//! [setup_dma_resource]
//! [setup_transfer_descriptor]
setup_transfer_descriptor(&example_descriptor);
//! [setup_transfer_descriptor]
//! [add_descriptor_to_dma_resource]
dma_add_descriptor(&example_resource, &example_descriptor);
//! [add_descriptor_to_dma_resource]
//! [setup_callback_register]
dma_register_callback(&example_resource, transfer_done,
DMA_CALLBACK_TRANSFER_DONE);
//! [setup_callback_register]
//! [setup_enable_callback]
dma_enable_callback(&example_resource, DMA_CALLBACK_TRANSFER_DONE);
//! [setup_enable_callback]
//! [setup_source_memory_content]
for (uint32_t i = 0; i < DATA_LENGTH; i++) {
source_memory[i] = i;
}
//! [setup_source_memory_content]
//! [setup_init]
//! [main]
//! [main_1]
dma_start_transfer_job(&example_resource);
//! [main_1]
//! [main_1_1]
dma_trigger_transfer(&example_resource);
//! [main_1_1]
//! [main_2]
while (!transfer_is_done) {
/* Wait for transfer done */
}
//! [main_2]
while (true) {
/* Nothing to do */
}
//! [main]
}
//! [config_dma_for_rx]
static void _config_dma_for_rx(void)
{
//! [config_dma_resource_for_rx]
//! [dma_setup_1]
struct dma_resource_config config;
//! [dma_setup_1]
//! [dma_setup_2]
dma_get_config_defaults(&config);
//! [dma_setup_2]
//! [dma_setup_3]
config.trigger_action = DMA_TRIGGER_ACTON_BEAT;
config.peripheral_trigger = CONF_RX_TRIGGER;
//! [dma_setup_3]
//! [dma_setup_4]
dma_allocate(&rx_dma_resource, &config);
//! [dma_setup_4]
//! [config_dma_resource_for_rx]
//! [config_dma_descriptor_for_rx]
//! [dma_setup_5]
struct dma_descriptor_config descriptor_config;
//! [dma_setup_5]
//! [dma_setup_6]
dma_descriptor_get_config_defaults(&descriptor_config);
//! [dma_setup_6]
//! [dma_setup_7]
descriptor_config.block_transfer_count = 4;
descriptor_config.beat_size = DMA_BEAT_SIZE_HWORD;
descriptor_config.step_selection = DMA_STEPSEL_SRC;
descriptor_config.src_increment_enable = false;
descriptor_config.destination_address =
(uint32_t)rx_values + sizeof(rx_values);
descriptor_config.source_address = (uint32_t)&CONF_I2S_MODULE->DATA[1];
//! [dma_setup_7]
//! [dma_setup_8]
dma_descriptor_create(&rx_dma_descriptor, &descriptor_config);
//! [dma_setup_8]
//! [dma_setup_9]
rx_dma_descriptor.DESCADDR.reg = (uint32_t)&rx_dma_descriptor;
//! [dma_setup_9]
//! [config_dma_descriptor_for_rx]
//! [config_dma_job_for_rx]
//! [dma_setup_10]
dma_add_descriptor(&rx_dma_resource, &rx_dma_descriptor);
//! [dma_setup_10]
//! [dma_setup_11]
dma_start_transfer_job(&rx_dma_resource);
//! [dma_setup_11]
//! [config_dma_job_for_rx]
}
//! [config_dma_for_capture]
static void config_dma_for_capture(void)
{
//! [config_dma_resource_for_capture]
//! [dma_setup_1]
struct dma_resource_config config;
//! [dma_setup_1]
//! [dma_setup_2]
dma_get_config_defaults(&config);
//! [dma_setup_2]
//! [dma_setup_3]
config.trigger_action = DMA_TRIGGER_ACTON_BEAT;
config.peripheral_trigger = CONF_CAPTURE_TRIGGER;
//! [dma_setup_3]
//! [dma_setup_4]
dma_allocate(&capture_dma_resource, &config);
//! [dma_setup_4]
//! [config_dma_resource_for_capture]
//! [config_dma_descriptor_for_capture]
//! [dma_setup_5]
struct dma_descriptor_config descriptor_config;
//! [dma_setup_5]
//! [dma_setup_6]
dma_descriptor_get_config_defaults(&descriptor_config);
//! [dma_setup_6]
//! [dma_setup_7]
descriptor_config.block_transfer_count = 3;
descriptor_config.beat_size = DMA_BEAT_SIZE_HWORD;
descriptor_config.step_selection = DMA_STEPSEL_SRC;
descriptor_config.src_increment_enable = false;
descriptor_config.source_address =
(uint32_t)&CONF_PWM_MODULE->CC[CONF_TCC_CAPTURE_CHANNEL];
descriptor_config.destination_address =
(uint32_t)capture_values + sizeof(capture_values);
//! [dma_setup_7]
//! [dma_setup_8]
dma_descriptor_create(&capture_dma_descriptor, &descriptor_config);
//! [dma_setup_8]
//! [config_dma_descriptor_for_capture]
//! [config_dma_job_for_capture]
//! [dma_setup_10]
dma_add_descriptor(&capture_dma_resource, &capture_dma_descriptor);
dma_add_descriptor(&capture_dma_resource, &capture_dma_descriptor);
//! [dma_setup_10]
//! [dma_setup_11]
dma_start_transfer_job(&capture_dma_resource);
//! [dma_setup_11]
//! [config_dma_job_for_capture]
}
/**
* \brief Test ECB mode encryption with DMA.
*
* \param test Current test case.
*/
static void run_ecb_mode_test_dma(const struct test_case *test)
{
/* Configure DMAC. */
configure_dma_aes_wr();
configure_dma_aes_rd();
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_AUTO_START;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(&aes_instance,AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(&aes_instance, key128);
dma_start_transfer_job(&example_resource_tx);
aes_set_new_message(&aes_instance);
aes_clear_new_message(&aes_instance);
/* Wait for the end of the encryption process. */
delay_ms(30);
dma_start_transfer_job(&example_resource_rx);
delay_ms(30);
if ((ref_cipher_text_ecb[0] != output_data[0]) ||
(ref_cipher_text_ecb[1] != output_data[1]) ||
(ref_cipher_text_ecb[2] != output_data[2]) ||
(ref_cipher_text_ecb[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "ECB mode encryption with DMA not work!");
}
/**
* \brief configure and enable DMA multiple channel (in this case it is 3)
*/
void configure_dma(void)
{
/* Configure DMA channel 0 */
configure_dma_resource(&dmac_adc_channel0, DMAC_CHANNEL0_ID);
/* Configure descriptor for channel 1 */
setup_transfer_descriptor(&dmac_adc_descriptor1, DMAC_DESCRIPTOR1_ID);
/* Assign descriptor 1 to DMA channel 0 */
dma_add_descriptor(&dmac_adc_channel0, &dmac_adc_descriptor1);
/*
* Register call back for DMA channel 0 transfer complete interrupt
* which will get triggered for every block transfer (I.e. 1024 beats
* in this case
*/
dma_register_callback(&dmac_adc_channel0, dmac_calback_channel0,
DMA_CALLBACK_TRANSFER_DONE);
/* Enable Call back for channel 0 */
dma_enable_callback(&dmac_adc_channel0, DMA_CALLBACK_TRANSFER_DONE);
/* Enable DMA channel 0 and its interrupt */
dma_start_transfer_job(&dmac_adc_channel0);
}
/**
* \brief Scrolling start.
*
* This function start the Bit mapping text.
*
* \param data Data string buffer.
* \param length Data string length.
*/
void xpro_lcd_text_bitmapping_start(uint8_t user_style)
{
/* Default config for automated bit mapping */
uint8_t config_user_style = (user_style & 0x03);
uint8_t config_size = 0;
uint8_t config_fc_value = 0;
enum slcd_frame_counter config_fc = SLCD_FRAME_COUNTER_0;
/* User buffer to load the user style. In this array new styles can be
* added as a new row with the same column width.
* At the end of the each style's array member value should be kept
* as 0x0000FF00 to calculate the block_count.
* The empty elements between the style members should be 0x0000FFFF.
*/
uint16_t i=0;
uint32_t user_style_buf[5][30] = {
{
/* STYLE 0 */
0x00000040, 0x000600e0, 0x000C0070, 0x00120000, /*'A' 0x07e4 */
0x00010005, 0x00070000, 0x000D0000, 0x00130008, /*'T' 0x8005 */
0x00010085, 0x00070070, 0x000D0060, 0x00130008, /*'M' 0x0678 */
0x00020004, 0x0008000a, 0x000E0003, 0x00140002, /*'E' 0x23a4 */
0x00020004, 0x0008002a, 0x000E0023, 0x00140022, /*'L' 0x2220 */
0x0000FF00, 0x0000FF00, 0x0000FF00, 0x0000FF00
},
{
/* STYLE 1 */
0x00000040,0x00070000,0x000D0060,0x00140002,
0x000600e0,0x000D0060,0x00130008,0x00020004,
0x000C0070,0x00130008,0x00020004,0x0008000a,
0x00120000,0x00010005,0x0008002a,0x000E0003,
0x00010085,0x00070070,0x000E0023,0x00140022,
0x0000FF00,0x0000FF00,0x0000FF00,0x0000FF00
},
{
/* STYLE 2 */
0x00000040,0x00010004,0x00020004,0x00010045,
0x00060060,0x00070070,0x00010085,0x000600E0,
0x00080022,0x0008002a,0x000C0010,0x000E0001,
0x000C0070,0x000D0060,0x000E0023,0x00130008,
0x00140022,0x0000FF00,0x0000FF00,0x0000FF00,
0x0000FF00,0x0000FF00,0x0000FF00,0x0000FF00
},
{
/* STYLE 3 */
0x00000040,0x00010044,0x0000FFFF,0x0000FFFF,
0x00020044,0x00080040,0x00000000,0x00010000,
0x000E0040,0x00140022,0x00020000,0x00080000,
0x00120020,0x00130022,0x000E0000,0x00140000,
0x000C0020,0x00060020,0x00120000,0x00130000,
0x00000040,0x000C0000,0x00060000,0x0000FF00
},
{
/* SPARE x */
0x00000040,0x00010004,0x00020004,0x00010045,
0x00060060,0x00070070,0x00010085,0x000600E0,
0x00080022,0x0008002a,0x000C0010,0x000E0001,
0x000C0070,0x000D0060,0x000E0023,0x00130008,
0x00140022,0x0000FF00,0x0000FF00,0x0000FF00,
0x0000FF00,0x0000FF00,0x0000FF00,0x0000FF00
}
};
/* Variable use to find the DMA transfer block count at runtime based
* on the user input string/style.
*/
dma_block_count = 0;
/* Clears the previous values present in the dma_source_buf */
clear_buffer();
/* used to copy the user style to dma_source buffer for the DMA transfer.
* The user style options are Style0, Style1, Style2 & Style3.
*/
while (0x0000FF00 != user_style_buf[config_user_style][i]) {
dma_source_buf[i] = user_style_buf[config_user_style][i];
/* To find the user style number of segment data */
dma_block_count++;
i++;
}
/* user configurations for automated bit mapping */
if ((uint8_t) 0x03 == config_user_style) {
config_size = 1;
config_fc_value = 0x01;
bitmapping_repeat_count = 0x05;
} else {
config_size = 3;
config_fc_value = 0x0F;
bitmapping_repeat_count = 0x01;
}
config_fc = SLCD_FRAME_COUNTER_1;
/* Disable SLCD to write the enable-protected registers */
slcd_disable();
/* write the SLCD ABM configurations in the respective registers */
slcd_set_automated_bit(config_size, config_fc);
/* Disable Frame counter to write the enable-protected registers */
slcd_disable_frame_counter(config_fc);
/* Set the frame counter configurations and enable it */
slcd_set_frame_counter(config_fc, 1, config_fc_value);
slcd_enable_frame_counter(config_fc);
/* Enable SLCD */
slcd_enable();
/* Configure DMA */
configure_dma();
/* Start DMA transfer, once DMA gets the peripheral trigger from the ABM,
* the data transfer starts.
*/
dma_start_transfer_job(&example_resource);
/* Enable ACM mode */
slcd_enable_automated_bit();
}
/**
* \brief Scrolling start.
*
* This function start the text scrolling.
*
* \param data Data string buffer.
* \param length Data string length.
*/
void xpro_lcd_text_scrolling_start(char *data)
{
/* Structures for the ACM configurations */
struct slcd_automated_char_config automated_char_config;
uint16_t i=0;
dma_block_count = 0;
/* used to copy the user scrolling string into dma_source
* buffer for the DMA transfer
* The scrolling may be runtime user input string 25char max
* or the default scrolling string in user_scrolling_str[].
*/
while (*data != '\0') {
/* Copying the scrolling string into DMA source buffer*/
dma_source_buf[i++] = DIGI_LUT[*(data++) - 32];
/* To find the scrolling string length */
dma_block_count++;
}
if (true == is_scrolling) {
/* configuration for Auto character mapping scrolling mode */
/* Get default config for the ACM mode */
slcd_automated_char_get_config_default(&automated_char_config);
/* Segment mapping order. (CMCFG.DEC bit) */
automated_char_config.order =
SLCD_AUTOMATED_CHAR_START_FROM_BOTTOM_RIGHT;
/* select the number of segment used per digit,
* it equal to number of SEG line - 1. (CMCFG.DEC).
*/
automated_char_config.seg_line_num = 3;
/* Define the number of digit per row. (ACMCFG.NDROW) */
automated_char_config.row_digit_num = XPRO_LCD_MAX_CHAR;
/* Define the index of the first segment terminal of the digit
* to display. (ACMCFG.STSEG).
*/
automated_char_config.start_seg_line = XPRO_LCD_TXT_SEG_INDEX_S;
/* Define the number of digit, it must be greater than 1.
* (ACMCFG.NDIG).
*/
automated_char_config.digit_num = XPRO_LCD_MAX_CHAR;
/* STEPS = string length - digit_num + 1. (ACMCFG.STEPS) */
automated_char_config.scrolling_step = dma_block_count - 5 + 1;
/* Select the ACM mode (ACMCFG.MODE) */
automated_char_config.mode = SLCD_AUTOMATED_CHAR_SCROLL;
/* Select the frame counter for the ACM mode. (ACMCFG.FCS) */
automated_char_config.fc = SLCD_FRAME_COUNTER_1;
/* Configure the mask value in the CMDMASK register */
automated_char_config.data_mask = 0x00FF4002;
}
/* Disable SLCD to write the enable-protected registers */
slcd_disable();
/* write the SLCD ACM configurations in the respective registers */
slcd_automated_char_set_config(&automated_char_config);
/* Disable Frame counter to write the enable-protected registers */
slcd_disable_frame_counter(automated_char_config.fc);
slcd_dma_display_memory_update_fc_sel(automated_char_config.fc);
/* Set the Frame counter configurations and enable it */
slcd_set_frame_counter(automated_char_config.fc, 0, 0x1);
slcd_enable_frame_counter(automated_char_config.fc);
/* Enable SLCD */
slcd_enable();
/* Configure DMA */
configure_dma();
/* Start DMA transfer, once DMA gets the peripheral trigger from the ACM,
* the data transfer starts.
*/
dma_start_transfer_job(&example_resource);
/* Enable ACM mode */
slcd_enable_automated_character();
}
void TASK_Bluetooth( void *pvParameters )
{
UNUSED( pvParameters );
static char rxBuffer[BLUETOOTH_MAX_RX_LEN];
static char *Rx = rxBuffer;
char Tx[BLUETOOTH_TX_BUFFER_LEN];
/* Create a semaphore */
rxSemaphoreBluetooth = xSemaphoreCreateBinary();
/* Ensure that semaphore is valid */
Assert( rxSemaphoreBluetooth );
/* Create a queue */
xBluetoothTxQueue = xQueueCreate( 3, BLUETOOTH_TX_BUFFER_LEN * sizeof( char ) );
xBluetoothRxQueue = xQueueCreate( BLUETOOTH_MAX_RX_LEN, sizeof( uint16_t ) );
/* Ensure that the queue is valid */
Assert( xBluetoothTxQueue );
Assert( xBluetoothRxQueue );
/* Start reading */
dma_start_transfer_job( &zDMA_BluetoothResourceRx );
for(;;)
{
if( xQueueReceive( xBluetoothTxQueue, Tx, ( TickType_t ) 0 ) == pdTRUE )
{
strncpy((char *)Bluetooth_TxBuffer, Tx, sizeof(FTDI_TxBuffer));
dma_start_transfer_job(&zDMA_BluetoothResourceTx);
while( !( DMA_Status & _LS(BLUETOOTH_TX_DONE) ) )
{
taskYIELD();
}
DMA_Status &= !(_LS(BLUETOOTH_TX_DONE));
}
/* Block task until DMA read complete */
if( xSemaphoreTake( rxSemaphoreBluetooth, 5 ) == pdTRUE )
{
if( xBluetoothTxQueue != 0)
{
xQueueSend( xBluetoothTxQueue, Bluetooth_RxBuffer, ( TickType_t ) 0 );
}
/* Look for backspace character */
if( *Bluetooth_RxBuffer == 127 )
{
if( Rx != rxBuffer )
{
Rx--;
*Rx = 0;
}
}
else if( *Bluetooth_RxBuffer == 13 ) // Carriage return
{
memcpy( Rx, "\0", sizeof( char ) );
/* Pass command to the main parser */
if( xParserQueue != 0 )
{
xQueueSend( xParserQueue, rxBuffer, ( TickType_t ) 10 );
}
Rx = rxBuffer;
}
else if( !strcmp( ( const char * ) Bluetooth_RxBuffer, "\027[D" ) ) // Left arrow ANSI
{
/* Move pointer around */
}
else if( !strcmp( ( const char * ) Bluetooth_RxBuffer, "\027[C" ) ) // Right arrow ANSI
{
/* Move pointer around */
}
else if( !strcmp( ( const char * ) Bluetooth_RxBuffer, "\027[A" ) ) // Up arrow ANSI
{
/* Previous command */
}
else if( !strcmp( ( const char * ) Bluetooth_RxBuffer, "\027[B" ) ) // Down arrow ANSI
{
/* Next command, if available */
}
else
{
/* Copy byte into buffer */
*Rx = ( char ) *Bluetooth_RxBuffer;
/* Reset buffer pointer on overflow */
if( Rx == &rxBuffer[BLUETOOTH_MAX_RX_LEN-1] )
{
Rx = rxBuffer;
}
else
{
Rx++;
}
}
dma_start_transfer_job( &zDMA_BluetoothResourceRx );
}
taskYIELD();
}
}
