int ext_disp_resume(void)
{
EXT_DISP_STATUS ret = EXT_DISP_STATUS_OK;
EXT_DISP_FUNC();
_ext_disp_path_lock();
if(pgc->state == EXTD_DEINIT || pgc->state == EXTD_RESUME)
{
EXT_DISP_ERR("EXTD_DEINIT/EXTD_RESUME \n");
goto done;
}
if(_should_reset_cmdq_config_handle())
{
_cmdq_reset_config_handle();
}
dpmgr_path_power_on(pgc->dpmgr_handle, CMDQ_DISABLE);
extd_drv_resume(pgc->plcm);
if(ext_disp_use_cmdq == CMDQ_ENABLE)
{
_cmdq_start_trigger_loop();
}
if(dpmgr_path_is_busy(pgc->dpmgr_handle))
{
EXT_DISP_LOG("stop display path failed, still busy\n");
ret = -1;
goto done;
}
pgc->state = EXTD_RESUME;
done:
_ext_disp_path_unlock();
EXT_DISP_LOG("ext_disp_resume done \n");
return ret;
}
int ext_disp_resume(void)
{
EXT_DISP_STATUS ret = EXT_DISP_STATUS_OK;
_ext_disp_path_lock();
if(pgc->state < EXTD_INIT)
{
DISPERR("EXTD_DEINIT \n");
goto done;
}
dpmgr_path_power_on(pgc->dpmgr_handle, CMDQ_DISABLE);
extd_drv_resume(pgc->plcm);
///dpmgr_path_start(pgc->dpmgr_handle, CMDQ_DISABLE);
if(ext_disp_use_cmdq == CMDQ_ENABLE)
_cmdq_start_trigger_loop();
if(dpmgr_path_is_busy(pgc->dpmgr_handle))
{
DISPCHECK("stop display path failed, still busy\n");
ret = -1;
goto done;
}
pgc->state = EXTD_RESUME;
done:
_ext_disp_path_unlock();
DISPMSG("ext_disp_resume done \n");
return ret;
}
int ovl2mem_input_config(ovl2mem_in_config* input)
{
int ret = -1;
int i = 0;
DISPFUNC();
_ovl2mem_path_lock(__func__);
disp_ddp_path_config *data_config;
// all dirty should be cleared in dpmgr_path_get_last_config()
data_config = dpmgr_path_get_last_config(pgc->dpmgr_handle);
data_config->dst_dirty = 0;
data_config->ovl_dirty = 0;
data_config->rdma_dirty = 0;
if(pgc->state == 0)
{
DISPMSG("ovl2mem is already sleeped\n");
_ovl2mem_path_unlock(__func__);
return 0;
}
// hope we can use only 1 input struct for input config, just set layer number
for(i = 0;i<HW_OVERLAY_COUNT;i++)
{
dprec_logger_start(DPREC_LOGGER_PRIMARY_CONFIG, input->layer|(input->layer_en<<16), input->addr);
if(input[i].layer_en)
{
if(input[i].vaddr)
{
/// _debug_pattern(0x00000000, input[i].vaddr, input[i].dst_w, input[i].dst_h, input[i].src_pitch, 0x00000000, input[i].layer, input[i].buff_idx);
}
else
{
///_debug_pattern(input[i].addr,0x00000000, input[i].dst_w, input[i].dst_h, input[i].src_pitch, 0x00000000, input[i].layer, input[i].buff_idx);
}
}
///DISPMSG("[primary], i:%d, layer:%d, layer_en:%d, dirty:%d -0x%x\n", i, input[i].layer, input[i].layer_en, input[i].dirty, input[i].addr);
if(input[i].dirty)
{
ret = _convert_disp_input_to_ovl(&(data_config->ovl_config[input[i].layer]), &input[i]);
}
data_config->ovl_dirty = 1;
dprec_logger_done(DPREC_LOGGER_PRIMARY_CONFIG, input->src_x, input->src_y);
}
if(dpmgr_path_is_busy(pgc->dpmgr_handle))
{
dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_COMPLETE, HZ/5);
}
ret = dpmgr_path_config(pgc->dpmgr_handle, data_config, pgc->cmdq_handle_config);
_ovl2mem_path_unlock(__func__);
DISPMSG("ovl2mem_input_config done\n");
return ret;
}
int dpmgr_path_is_idle(disp_path_handle dp_handle)
{
ASSERT(dp_handle != NULL);
return !dpmgr_path_is_busy(dp_handle);
}
