enum piglit_result
piglit_display(void)
{
bool pass = true;
glEnable(GL_BLEND);
glBlendEquation(GL_MAX);
glClear(GL_COLOR_BUFFER_BIT);
/* Left half of the window is the test pattern */
glViewport(0, 0, PATTERN_SIZE, PATTERN_SIZE);
draw_test_pattern();
/* Right half of the window is the reference image */
glViewport(PATTERN_SIZE, 0, PATTERN_SIZE, PATTERN_SIZE);
draw_ref_pattern();
if (!piglit_check_gl_error(GL_NO_ERROR))
pass = false;
/* Compare window halves */
pass = piglit_probe_rect_halves_equal_rgba(0, 0, 2*PATTERN_SIZE,
PATTERN_SIZE) && pass;
piglit_present_results();
return pass ? PIGLIT_PASS : PIGLIT_FAIL;
}
void lcd_attach( device_t parent, device_t self, void *aux )
{
struct imx51_ipuv3_softc *sc = device_private(self);
struct axi_attach_args *axia = aux;
bus_space_tag_t iot = axia->aa_iot;
sc->dev = self;
/* XXX move this to imx51_ipuv3.c */
{
bus_space_handle_t mipi_ioh;
uint32_t reg;
if (bus_space_map(iot, 0x83fdc000, 0x1000, 0, &mipi_ioh))
aprint_error_dev(self, "can't map MIPI HSC");
else {
bus_space_write_4(iot, mipi_ioh, 0x000, 0xf00);
reg = bus_space_read_4(iot, mipi_ioh, 0x800);
bus_space_write_4(iot, mipi_ioh, 0x800, reg | 0x0ff);
reg = bus_space_read_4(iot, mipi_ioh, 0x800);
bus_space_write_4(iot, mipi_ioh, 0x800, reg | 0x10000);
}
}
/* LCD power on */
gpio_set_direction(GPIO_NO(4, 9), GPIO_DIR_OUT);
gpio_set_direction(GPIO_NO(4, 10), GPIO_DIR_OUT);
gpio_set_direction(GPIO_NO(3, 3), GPIO_DIR_OUT);
gpio_data_write(GPIO_NO(3, 3), 1);
gpio_data_write(GPIO_NO(4, 9), 1);
delay(180 * 1000);
gpio_data_write(GPIO_NO(4, 10), 1);
gpio_set_direction(GPIO_NO(2, 13), GPIO_DIR_OUT);
gpio_data_write(GPIO_NO(2, 13), 1);
imx51_ipuv3_attach_sub(sc, aux, &sharp_panel);
#if NWSDISPLAY == 0
struct imx51_ipuv3_screen *screen;
int error;
error = imx51_ipuv3_new_screen(sc, &screen);
#ifdef LCD_DEBUG
draw_test_pattern(sc, screen);
#endif
if (error == 0) {
sc->active = screen;
imx51_ipuv3_start_dma(sc, screen);
}
#endif
}
struct s3c24x0_lcd_screen *
s3c24x0_lcd_new_screen(struct s3c24x0_lcd_softc *sc,
int virtual_width, int virtual_height, int depth)
{
struct s3c24x0_lcd_screen *scr = NULL;
int width, height;
bus_size_t size;
int error, pallet_size;
int busdma_flag = (cold ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK) |
BUS_DMA_WRITE;
paddr_t align;
const struct s3c24x0_lcd_panel_info *panel_info = sc->panel_info;
#ifdef DIAGNOSTIC
if (size > 1 << 22) {
aprint_error("%s: too big screen size\n", sc->dev.dv_xname);
return NULL;
}
#endif
width = panel_info->panel_width;
height = panel_info->panel_height;
pallet_size = 0;
switch (depth) {
case 1: case 2: case 4: case 8:
virtual_width = roundup(virtual_width, 16 / depth);
break;
case 16:
break;
case 12: case 24:
default:
aprint_error("%s: Unknown depth (%d)\n",
sc->dev.dv_xname, depth);
return NULL;
}
scr = malloc(sizeof *scr, M_DEVBUF,
M_ZERO | (cold ? M_NOWAIT : M_WAITOK));
if (scr == NULL)
return NULL;
scr->nsegs = 0;
scr->depth = depth;
scr->stride = virtual_width * depth / 8;
scr->buf_size = size = scr->stride * virtual_height;
scr->buf_va = NULL;
/* calculate the alignment for LCD frame buffer.
the buffer can't across 4MB boundary */
align = 1 << 20;
while (align < size)
align <<= 1;
error = bus_dmamem_alloc(sc->dma_tag, size, align, 0,
scr->segs, 1, &(scr->nsegs), busdma_flag);
if (error || scr->nsegs != 1)
goto bad;
error = bus_dmamem_map(sc->dma_tag, scr->segs, scr->nsegs,
size, (void **)&(scr->buf_va), busdma_flag | BUS_DMA_COHERENT);
if (error)
goto bad;
memset (scr->buf_va, 0, scr->buf_size);
/* map memory for DMA */
if (bus_dmamap_create(sc->dma_tag, 1024*1024*2, 1,
1024*1024*2, 0, busdma_flag, &scr->dma))
goto bad;
error = bus_dmamap_load(sc->dma_tag, scr->dma,
scr->buf_va, size, NULL, busdma_flag);
if (error)
goto bad;
LIST_INSERT_HEAD(&(sc->screens), scr, link);
sc->n_screens++;
#ifdef LCD_DEBUG
draw_test_pattern(sc, scr);
dump_lcdcon(__func__, sc->iot, sc->ioh);
#endif
return scr;
bad:
if (scr) {
if (scr->buf_va)
bus_dmamem_unmap(sc->dma_tag, scr->buf_va, size);
if (scr->nsegs)
bus_dmamem_free(sc->dma_tag, scr->segs, scr->nsegs);
free(scr, M_DEVBUF);
}
return NULL;
}
void lcd_attach( device_t parent, device_t self, void *aux )
{
struct imx51_ipuv3_softc *sc = device_private(self);
struct axi_attach_args *axia = aux;
bus_space_tag_t iot = axia->aa_iot;
sc->dev = self;
#if defined(IMXIPUCONSOLE)
netwalker_lcd_console = 1;
#endif
#if (NWSDISPLAY > 0)
netwalker_cnattach();
#endif
/* XXX move this to imx51_ipuv3.c */
{
bus_space_handle_t mipi_ioh;
uint32_t reg;
if (bus_space_map(iot, 0x83fdc000, 0x1000, 0, &mipi_ioh))
aprint_error_dev(self, "can't map MIPI HSC");
else {
bus_space_write_4(iot, mipi_ioh, 0x000, 0xf00);
reg = bus_space_read_4(iot, mipi_ioh, 0x800);
bus_space_write_4(iot, mipi_ioh, 0x800, reg | 0x0ff);
reg = bus_space_read_4(iot, mipi_ioh, 0x800);
bus_space_write_4(iot, mipi_ioh, 0x800, reg | 0x10000);
}
}
/* LCD power on */
gpio_set_direction(GPIO_NO(4, 9), GPIO_DIR_OUT);
gpio_set_direction(GPIO_NO(4, 10), GPIO_DIR_OUT);
gpio_set_direction(GPIO_NO(3, 3), GPIO_DIR_OUT);
gpio_data_write(GPIO_NO(3, 3), 1);
gpio_data_write(GPIO_NO(4, 9), 1);
delay(180 * 1000);
gpio_data_write(GPIO_NO(4, 10), 1);
gpio_set_direction(GPIO_NO(2, 13), GPIO_DIR_OUT);
gpio_data_write(GPIO_NO(2, 13), 1);
imx51_ipuv3_attach_sub(sc, aux, &sharp_panel);
#if NWSDISPLAY == 0
struct imx51_ipuv3_screen *screen;
int error;
error = imx51_ipuv3_new_screen(sc, 16, &screen);
#ifdef LCD_DEBUG
draw_test_pattern(sc, screen);
#endif
if (error == 0) {
sc->active = screen;
imx51_ipuv3_start_dma(sc, screen);
}
#else
struct wsemuldisplaydev_attach_args aa;
#if defined(IMXIPUCONSOLE)
aa.console = true;
#else
aa.console = false;
#endif
aa.scrdata = &netwalker_lcd_screen_list;
aa.accessops = &netwalker_lcd_accessops;
aa.accesscookie = &sc->vd;
(void) config_found(sc->dev, &aa, wsemuldisplaydevprint);
#endif
}
