int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info) { void *address = NULL; unsigned long pages; u32 *pci_gart, page_base; dma_addr_t bus_address = 0; dma_addr_t entry_addr; int i, j, ret = 0; int max_pages; /* we need to support large memory configurations */ if (dev->sg == NULL) { DRM_ERROR("no scatter/gather memory!\n"); goto done; } if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) { DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n"); ret = drm_ati_alloc_pcigart_table(dev, gart_info); if (ret) { DRM_ERROR("cannot allocate PCI GART page!\n"); goto done; } address = (void *)gart_info->dmah->vaddr; bus_address = gart_info->dmah->busaddr; } else { address = gart_info->addr; bus_address = gart_info->bus_addr; DRM_DEBUG("PCI: Gart Table: VRAM %08X mapped at %08lX\n", (unsigned int)bus_address, (unsigned long)address); } pci_gart = (u32 *) address; max_pages = (gart_info->table_size / sizeof(u32)); pages = (dev->sg->pages <= max_pages) ? dev->sg->pages : max_pages; memset(pci_gart, 0, max_pages * sizeof(u32)); KASSERT(PAGE_SIZE >= ATI_PCIGART_PAGE_SIZE, ("page size too small")); for (i = 0; i < pages; i++) { entry_addr = dev->sg->busaddr[i]; for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { page_base = (u32) entry_addr & ATI_PCIGART_PAGE_MASK; switch(gart_info->gart_reg_if) { case DRM_ATI_GART_IGP: page_base |= (upper_32_bits(entry_addr) & 0xff) << 4; page_base |= ATI_GART_READ | ATI_GART_WRITE; page_base |= ATI_GART_NOSNOOP; break; case DRM_ATI_GART_PCIE: page_base >>= 8; page_base |= (upper_32_bits(entry_addr) & 0xff) << 24; page_base |= ATI_GART_READ | ATI_GART_WRITE; page_base |= ATI_GART_NOSNOOP; break; default: case DRM_ATI_GART_PCI: break; } *pci_gart = cpu_to_le32(page_base); pci_gart++; entry_addr += ATI_PCIGART_PAGE_SIZE; } } ret = 1; done: gart_info->addr = address; gart_info->bus_addr = bus_address; return ret; }
int drm_ati_pcigart_init(drm_device_t * dev, drm_ati_pcigart_info *gart_info) { drm_sg_mem_t *entry = dev->sg; void *address = NULL; unsigned long pages; u32 *pci_gart, page_base, bus_address = 0; int i, j, ret = 0; if (!entry) { DRM_ERROR("no scatter/gather memory!\n"); goto done; } if (gart_info->gart_table_location==DRM_ATI_GART_MAIN) { DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n"); address = drm_ati_alloc_pcigart_table(); if (!address) { DRM_ERROR("cannot allocate PCI GART page!\n"); goto done; } if (!dev->pdev) { DRM_ERROR("PCI device unknown!\n"); goto done; } bus_address = pci_map_single(dev->pdev, address, ATI_PCIGART_TABLE_PAGES * PAGE_SIZE, PCI_DMA_TODEVICE); if (bus_address == 0) { DRM_ERROR("unable to map PCIGART pages!\n"); drm_ati_free_pcigart_table(address); address = 0; goto done; } } else { address = gart_info->addr; bus_address = gart_info->bus_addr; DRM_DEBUG("PCI: Gart Table: VRAM %08X mapped at %08lX\n", bus_address, (unsigned long)address); } pci_gart = (u32 *) address; pages = (entry->pages <= ATI_MAX_PCIGART_PAGES) ? entry->pages : ATI_MAX_PCIGART_PAGES; memset(pci_gart, 0, ATI_MAX_PCIGART_PAGES * sizeof(u32)); for (i = 0; i < pages; i++) { /* we need to support large memory configurations */ entry->busaddr[i] = pci_map_single(dev->pdev, page_address(entry-> pagelist[i]), PAGE_SIZE, PCI_DMA_TODEVICE); if (entry->busaddr[i] == 0) { DRM_ERROR("unable to map PCIGART pages!\n"); drm_ati_pcigart_cleanup(dev, gart_info); address = NULL; bus_address = 0; goto done; } page_base = (u32) entry->busaddr[i]; for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { if (gart_info->is_pcie) *pci_gart = (cpu_to_le32(page_base)>>8) | 0xc; else *pci_gart = cpu_to_le32(page_base); pci_gart++; page_base += ATI_PCIGART_PAGE_SIZE; } }