/*
* SLCA structure contains System Attention Indicator location
* code (FRU ID = SA). Add this information to device tree
* (under '/ibm,opal/led').
*/
void slca_dt_add_sai_node(void)
{
const struct slca_entry *s_entry;
struct dt_node *led_node, *sai_node;
s_entry = slca_get_sai_entry();
if (!s_entry)
return;
/* Create /ibm,opal node, if its not created already */
if (!opal_node)
return;
/* Crete LED parent node */
led_node = dt_find_by_path(opal_node, DT_PROPERTY_LED_NODE);
if (!led_node)
return;
if (s_entry->loc_code_len == 0 ||
s_entry->loc_code_len > LOC_CODE_SIZE)
return;
/* Create SAI node */
sai_node = dt_new(led_node, s_entry->loc_code);
assert(sai_node);
dt_add_property_string(sai_node,
DT_PROPERTY_LED_TYPES, LED_TYPE_ATTENTION);
}
/*
* Helper function for adding /ibm,opal/consoles/serial@<xyz> nodes
*/
struct dt_node *add_opal_console_node(int index, const char *type,
uint32_t write_buffer_size)
{
struct dt_node *con, *consoles;
char buffer[32];
consoles = dt_find_by_name(opal_node, "consoles");
if (!consoles) {
consoles = dt_new(opal_node, "consoles");
assert(consoles);
dt_add_property_cells(consoles, "#address-cells", 1);
dt_add_property_cells(consoles, "#size-cells", 0);
}
con = dt_new_addr(consoles, "serial", index);
assert(con);
snprintf(buffer, sizeof(buffer), "ibm,opal-console-%s", type);
dt_add_property_string(con, "compatible", buffer);
dt_add_property_cells(con, "#write-buffer-size", write_buffer_size);
dt_add_property_cells(con, "reg", index);
dt_add_property_string(con, "device_type", "serial");
return con;
}
void ipmi_rtc_init(void)
{
struct dt_node *np = dt_new(opal_node, "rtc");
dt_add_property_strings(np, "compatible", "ibm,opal-rtc");
opal_register(OPAL_RTC_READ, ipmi_opal_rtc_read, 2);
opal_register(OPAL_RTC_WRITE, ipmi_opal_rtc_write, 2);
/* Initialise the rtc cache */
ipmi_get_sel_time();
}
void fsp_epow_init(void)
{
struct dt_node *np;
fsp_register_client(&fsp_epow_client, FSP_MCLASS_SERVICE);
opal_register(OPAL_GET_EPOW_STATUS, fsp_opal_get_epow_status, 2);
np = dt_new(opal_node, "epow");
dt_add_property_strings(np, "compatible", "ibm,opal-v3-epow");
dt_add_property_strings(np, "epow-classes", "power", "temperature", "cooling");
prlog(PR_TRACE, "FSP EPOW support initialized\n");
}
void ipmi_opal_init(void)
{
struct dt_node *opal_ipmi;
opal_ipmi = dt_new(opal_node, "ipmi");
dt_add_property_strings(opal_ipmi, "compatible", "ibm,opal-ipmi");
dt_add_property_cells(opal_ipmi, "ibm,ipmi-interface-id",
IPMI_DEFAULT_INTERFACE);
dt_add_property_cells(opal_ipmi, "interrupts",
ilog2(ipmi_backend->opal_event_ipmi_recv));
opal_register(OPAL_IPMI_SEND, opal_ipmi_send, 3);
opal_register(OPAL_IPMI_RECV, opal_ipmi_recv, 3);
}
static bool add_address_range(struct dt_node *root,
const struct HDIF_ms_area_id *id,
const struct HDIF_ms_area_address_range *arange)
{
struct dt_node *mem;
u64 reg[2];
char *name;
u32 chip_id;
size_t namesz = sizeof("memory@") + STR_MAX_CHARS(reg[0]);
name = (char*)malloc(namesz);
prlog(PR_DEBUG, " Range: 0x%016llx..0x%016llx "
"on Chip 0x%x mattr: 0x%x\n",
(long long)arange->start, (long long)arange->end,
pcid_to_chip_id(arange->chip), arange->mirror_attr);
/* reg contains start and length */
reg[0] = cleanup_addr(be64_to_cpu(arange->start));
reg[1] = cleanup_addr(be64_to_cpu(arange->end)) - reg[0];
chip_id = pcid_to_chip_id(be32_to_cpu(arange->chip));
if (be16_to_cpu(id->flags) & MS_AREA_SHARED) {
/* Only enter shared nodes once. */
mem = find_shared(root, be16_to_cpu(id->share_id),
reg[0], reg[1]);
if (mem) {
append_chip_id(mem, chip_id);
return true;
}
}
snprintf(name, namesz, "memory@%llx", (long long)reg[0]);
mem = dt_new(root, name);
dt_add_property_string(mem, "device_type", "memory");
dt_add_property_cells(mem, "ibm,chip-id", chip_id);
dt_add_property_u64s(mem, "reg", reg[0], reg[1]);
if (be16_to_cpu(id->flags) & MS_AREA_SHARED)
dt_add_property_cells(mem, DT_PRIVATE "share-id",
be16_to_cpu(id->share_id));
free(name);
return true;
}
static void add_mem_node(uint64_t start, uint64_t len)
{
struct dt_node *mem;
u64 reg[2];
char *name;
name = (char*)malloc(sizeof("memory@") + STR_MAX_CHARS(reg[0]));
assert(name);
/* reg contains start and length */
reg[0] = cpu_to_be64(start);
reg[1] = cpu_to_be64(len);
sprintf(name, "memory@%llx", (long long)start);
mem = dt_new(dt_root, name);
dt_add_property_string(mem, "device_type", "memory");
dt_add_property(mem, "reg", reg, sizeof(reg));
free(name);
}
void nvram_read_complete(bool success)
{
struct dt_node *np;
/* Read not successful, error out and free the buffer */
if (!success) {
free(nvram_image);
nvram_size = 0;
return;
}
/* Check and maybe format nvram */
nvram_check();
/* Add nvram node */
np = dt_new(opal_node, "nvram");
dt_add_property_cells(np, "#bytes", nvram_size);
dt_add_property_string(np, "compatible", "ibm,opal-nvram");
/* Mark ready */
nvram_ready = true;
}
static struct dt_node *flash_add_dt_node(struct flash *flash, int id)
{
int i;
int rc;
const char *name;
bool ecc;
struct ffs_handle *ffs;
int ffs_part_num, ffs_part_start, ffs_part_size;
struct dt_node *flash_node;
struct dt_node *partition_container_node;
struct dt_node *partition_node;
flash_node = dt_new_addr(opal_node, "flash", id);
dt_add_property_strings(flash_node, "compatible", "ibm,opal-flash");
dt_add_property_cells(flash_node, "ibm,opal-id", id);
dt_add_property_u64(flash_node, "reg", flash->size);
dt_add_property_cells(flash_node, "ibm,flash-block-size",
flash->block_size);
if (flash->no_erase)
dt_add_property(flash_node, "no-erase", NULL, 0);
/* we fix to 32-bits */
dt_add_property_cells(flash_node, "#address-cells", 1);
dt_add_property_cells(flash_node, "#size-cells", 1);
/* Add partition container node */
partition_container_node = dt_new(flash_node, "partitions");
dt_add_property_strings(partition_container_node, "compatible", "fixed-partitions");
/* we fix to 32-bits */
dt_add_property_cells(partition_container_node, "#address-cells", 1);
dt_add_property_cells(partition_container_node, "#size-cells", 1);
/* Add partitions */
for (i = 0, name = NULL; i < ARRAY_SIZE(part_name_map); i++) {
name = part_name_map[i].name;
rc = ffs_init(0, flash->size, flash->bl, &ffs, 1);
if (rc) {
prerror("FLASH: Can't open ffs handle\n");
continue;
}
rc = ffs_lookup_part(ffs, name, &ffs_part_num);
if (rc) {
/* This is not an error per-se, some partitions
* are purposefully absent, don't spam the logs
*/
prlog(PR_DEBUG, "FLASH: No %s partition\n", name);
continue;
}
rc = ffs_part_info(ffs, ffs_part_num, NULL,
&ffs_part_start, NULL, &ffs_part_size, &ecc);
if (rc) {
prerror("FLASH: Failed to get %s partition info\n", name);
continue;
}
partition_node = dt_new_addr(partition_container_node, "partition", ffs_part_start);
dt_add_property_strings(partition_node, "label", name);
dt_add_property_cells(partition_node, "reg", ffs_part_start, ffs_part_size);
if (part_name_map[i].id != RESOURCE_ID_KERNEL_FW) {
/* Mark all partitions other than the full PNOR and the boot kernel
* firmware as read only. These two partitions are the only partitions
* that are properly erase block aligned at this time.
*/
dt_add_property(partition_node, "read-only", NULL, 0);
}
}
partition_node = dt_new_addr(partition_container_node, "partition", 0);
dt_add_property_strings(partition_node, "label", "PNOR");
dt_add_property_cells(partition_node, "reg", 0, flash->size);
return flash_node;
}
int main(void)
{
struct dt_node *root, *c1, *c2, *gc1, *gc2, *gc3, *ggc1, *i;
const struct dt_property *p;
struct dt_property *p2;
unsigned int n;
root = dt_new_root("root");
assert(!list_top(&root->properties, struct dt_property, list));
c1 = dt_new(root, "c1");
assert(!list_top(&c1->properties, struct dt_property, list));
c2 = dt_new(root, "c2");
assert(!list_top(&c2->properties, struct dt_property, list));
gc1 = dt_new(c1, "gc1");
assert(!list_top(&gc1->properties, struct dt_property, list));
gc2 = dt_new(c1, "gc2");
assert(!list_top(&gc2->properties, struct dt_property, list));
gc3 = dt_new(c1, "gc3");
assert(!list_top(&gc3->properties, struct dt_property, list));
ggc1 = dt_new(gc1, "ggc1");
assert(!list_top(&ggc1->properties, struct dt_property, list));
for (n = 0, i = dt_first(root); i; i = dt_next(root, i), n++) {
assert(!list_top(&i->properties, struct dt_property, list));
dt_add_property_cells(i, "visited", 1);
}
assert(n == 6);
for (n = 0, i = dt_first(root); i; i = dt_next(root, i), n++) {
p = list_top(&i->properties, struct dt_property, list);
assert(strcmp(p->name, "visited") == 0);
assert(p->len == sizeof(u32));
assert(fdt32_to_cpu(*(u32 *)p->prop) == 1);
}
assert(n == 6);
dt_add_property_cells(c1, "some-property", 1, 2, 3);
p = dt_find_property(c1, "some-property");
assert(p);
assert(strcmp(p->name, "some-property") == 0);
assert(p->len == sizeof(u32) * 3);
assert(fdt32_to_cpu(*(u32 *)p->prop) == 1);
assert(fdt32_to_cpu(*((u32 *)p->prop + 1)) == 2);
assert(fdt32_to_cpu(*((u32 *)p->prop + 2)) == 3);
/* Test freeing a single node */
assert(!list_empty(&gc1->children));
dt_free(ggc1);
assert(list_empty(&gc1->children));
/* Test rodata logic. */
assert(!is_rodata("hello"));
assert(is_rodata(__rodata_start));
strcpy(__rodata_start, "name");
ggc1 = dt_new(root, __rodata_start);
assert(ggc1->name == __rodata_start);
/* Test string node. */
dt_add_property_string(ggc1, "somestring", "someval");
assert(dt_has_node_property(ggc1, "somestring", "someval"));
assert(!dt_has_node_property(ggc1, "somestrin", "someval"));
assert(!dt_has_node_property(ggc1, "somestring", "someva"));
assert(!dt_has_node_property(ggc1, "somestring", "somevale"));
/* Test resizing property. */
p = p2 = __dt_find_property(c1, "some-property");
assert(p);
n = p2->len;
while (p2 == p) {
n *= 2;
dt_resize_property(&p2, n);
}
assert(dt_find_property(c1, "some-property") == p2);
list_check(&c1->properties, "properties after resizing");
dt_del_property(c1, p2);
list_check(&c1->properties, "properties after delete");
/* No leaks for valgrind! */
dt_free(root);
return 0;
}
