/**
* @brief EDMA channel allocation.
*
* @param[in] channel the channel number
*
* @special
*/
void edmaChannelRelease(edma_channel_t channel) {
chDbgCheck((channel < 0) && (channel >= SPC5_EDMA_NCHANNELS),
"edmaChannelAllocate");
chDbgAssert(channels[channel] != NULL,
"edmaChannelRelease(), #1",
"not allocated");
/* Enforcing a stop.*/
edmaChannelStop(channel);
/* Clearing ISR sources for the channel.*/
SPC5_EDMA.CIRQR.R = channel;
SPC5_EDMA.CEEIR.R = channel;
SPC5_EDMA.CER.R = channel;
/* The channels is flagged as available.*/
channels[channel] = NULL;
}
/**
* @brief EDMA channel release.
*
* @param[in] channel the channel number
*
* @special
*/
void edmaChannelRelease(edma_channel_t channel) {
osalDbgCheck((channel >= 0) && (channel < SPC5_EDMA_NCHANNELS));
osalDbgAssert(channels[channel] != NULL, "not allocated");
/* Enforcing a stop.*/
edmaChannelStop(channel);
#if SPC5_EDMA_HAS_MUX
/* Disabling the MUX slot.*/
SPC5_DMAMUX.CHCONFIG[channel].R = 0;
#endif
/* Clearing ISR sources for the channel.*/
SPC5_EDMA.CIRQR.R = channel;
SPC5_EDMA.CEEIR.R = channel;
SPC5_EDMA.CER.R = channel;
/* The channels is flagged as available.*/
channels[channel] = NULL;
}
