void eeprom_write(uint8_t address, uint8_t *data, uint32_t length){
do{
int writelen = length;
if(length > 16){
writelen = 16;
}
length -= writelen;
eeprom_enable_write();
eeprom_select();
uint8_t header [2] = {0x02, address};
spiSend(&EEPROM_SPI_BUS, 2, header);
spiSend(&EEPROM_SPI_BUS, writelen, data);
eeprom_unselect();
//change where next writecycle writes and from where in the write array
if(length > 0){
address += writelen;
data += writelen;
}
uint8_t status = eeprom_get_status();
while ( status & 0x01){
status = eeprom_get_status();
}
} while(length > 0);
}
void eeprom_chip_erase()
{
eeprom_enable_write(1);
spi_select(EEPROM_SS_PORT, EEPROM_SS_PIN);
_delay_us(10);
spi_write(EEPROM_CE); // chip erase
spi_unselect(EEPROM_SS_PORT, EEPROM_SS_PIN);
// czekaj na zakoñczenie operacji kasowania
while ( (eeprom_status() & 0x01) ) // Write In Progress (WIP)
_delay_ms(1);
eeprom_enable_write(1);
}
unsigned char eeprom_is_size(unsigned long n)
{
unsigned char temp;
temp = eeprom_read(0L);
eeprom_enable_write(1);
if (eeprom_read(n) == temp)
{
eeprom_write(0L, temp+1);
if (eeprom_read(n) == temp+1)
{
eeprom_write(0L, temp-1);
return 1;
}
}
return 0;
}
void eeprom_tests(){
printf("EEPROM TESTS:\n\r");
printf("\tWrite protection on upper 1/4: " );
eeprom_set_status(0x66);
uint8_t status = eeprom_get_status();
if((status & 0x80) == 0){
printf("Pass\n\r");
}
else{
printf("Fail - 0x%x\n\r", status);
chThdSleepMilliseconds(100);
return;
}
// test if write enable latch is set
printf("\tEnabling write: ");
eeprom_enable_write();
chThdSleepMilliseconds(100);
status = eeprom_get_status();
if(status & 0x02){
printf("Pass\n\r");
}
else{
printf("Fail - 0x%x\n\r", status);
chThdSleepMilliseconds(100);
return;
}
chThdSleepMilliseconds(100);
// test write and read from eeprom
uint32_t testint = 123485;
eeprom_write(0x00, (uint8_t *)&testint, sizeof(uint32_t));
uint32_t verify = 0;
eeprom_read(0x00, (uint8_t *)&verify, sizeof(uint32_t));
printf("\tTesting write: ");
if(verify == testint){
printf("Pass - %i\n\r", verify);
}
else{
printf("Fail - %i\n\r", verify);
}
chThdSleepMilliseconds(100);
//test write larger than 16
static uint8_t testarray[34] = {
[0] = 1,
[1] = 2,
[2] = 3,
[3] = 4,
[4] = 5,
[5] = 6,
[6] = 7,
[7] = 8,
[8] = 9,
[9] = 10,
[10] = 11,
[11] = 12,
[12] = 13,
[13] = 14,
[14] = 15,
[15] = 16,
[16] = 17,
[17] = 18,
[18] = 19,
[19] = 20,
[20] = 21,
[21] = 22,
[22] = 23,
[23] = 24,
[24] = 25,
[25] = 26,
[26] = 27,
[27] = 28,
[28] = 29,
[29] = 30,
[30] = 31,
[31] = 32,
[32] = 33,
[33] = 34,
};
printf("\tWriting and reading back long array:\n\r");
eeprom_write(0x00, testarray, sizeof(testarray) );
static uint8_t verifyarray[sizeof(testarray)];
eeprom_read(0x00, verifyarray, sizeof(testarray));
for(unsigned int i = 0; i < sizeof(testarray); i++)
{
if(testarray[i] == verifyarray[i]) {
printf("\tarray [%i]: pass\n\r", i);
}
else{
printf("\tarray [%i]: fail\n\r", i);
}
}
chThdSleepMilliseconds(100);
}
unsigned int firmware_handle_packet(unsigned char* data)
{
firmware_packet *packet = (firmware_packet*) data;
rs_text_P(PSTR("Firmware: offset "));
rs_hex( packet->offset >> 16);
rs_hex( packet->offset >> 8);
rs_hex( packet->offset);
rs_send(' ');
rs_send('#');
rs_hex(packet->op);
switch (packet->op) {
// pakiet z danymi strony do wgrania do pamieci
case FIRMWARE_OP_SEND:
// na poczatku aktualizacji wyczysc cala pamiec
if (packet->offset == 0L) {
eeprom_enable_write(1);
eeprom_chip_erase();
}
// wlacz zapis do pamieci EEPROM
eeprom_enable_write(1);
// zapisz dane do pamieci
eeprom_page_write(packet->offset, packet->data, packet->len);
//rs_dump(packet->data, packet->len);
// odsylamy pakiet z potwierdzeniem wgrania danych
packet->op = FIRMWARE_OP_SEND_OK;
return 6 + packet->len;
// weryfikacja danych (odeslij zawartosci podanej strony)
case FIRMWARE_OP_VERIFY:
// pobierz cala strone
packet->len = 255;
// pobierz dane
eeprom_page_read(packet->offset, packet->data, packet->len);
//rs_dump(packet->data, packet->len+1);
// odsylamy pakiet z danymi z pamieci (skrypt aktualizujacy dokona porownania)
return 6 + packet->len + 1;
// pakiet z blednym kodem operacji
default:
packet->op = 0;
packet->offset = 0UL;
packet->len = 0;
return 6;
}
return 0;
}