xcpt_t board_button_irq(int id, xcpt_t irqhandler) { xcpt_t oldhandler = NULL; if (id >=0 && id < NUM_BUTTONS) { irqstate_t flags; /* Disable interrupts until we are done. This guarantees that the * following operations are atomic. */ flags = enter_critical_section(); /* Get/set the old button handler * * REVISIT: Keeping copies of the hander in RAM seems wasteful * since the OS already has this information internally. */ #if 0 /* REVISIT */ oldhandler = g_button_handlers[id]; g_button_handlers[id] = irqhandler; #else oldhandler = NULL; #endif /* Are we attaching or detaching? */ if (irqhandler != NULL) { /* Configure the interrupt */ efm32_gpioirq(g_button_configs[id]); /* Attach and enable the interrupt */ (void)irq_attach(g_button_irqs[id], irqhandler); efm32_gpioirqenable(g_button_irqs[id]); } else { /* Disable and detach the interrupt */ efm32_gpioirqdisable(g_button_irqs[id]); (void)irq_detach(g_button_irqs[id]); } leave_critical_section(flags); } /* Return the old button handler (so that it can be restored) */ return oldhandler; }
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) { if (id >=0 && id < NUM_BUTTONS) { irqstate_t flags; /* Disable interrupts until we are done. This guarantees that the * following operations are atomic. */ flags = enter_critical_section(); /* Are we attaching or detaching? */ if (irqhandler != NULL) { /* Configure the interrupt */ efm32_gpioirq(g_button_configs[id]); /* Attach and enable the interrupt */ (void)irq_attach(g_button_irqs[id], irqhandler, arg); efm32_gpioirqenable(g_button_irqs[id]); } else { /* Disable and detach the interrupt */ efm32_gpioirqdisable(g_button_irqs[id]); (void)irq_detach(g_button_irqs[id]); } leave_critical_section(flags); } /* Return the old button handler (so that it can be restored) */ return OK; }
void up_enable_irq(int irq) { uintptr_t regaddr; uint32_t regval; uint32_t bit; if (efm32_irqinfo(irq, ®addr, &bit, NVIC_ENA_OFFSET) == 0) { /* Modify the appropriate bit in the register to enable the interrupt. * For normal interrupts, we need to set the bit in the associated * Interrupt Set Enable register. For other exceptions, we need to * set the bit in the System Handler Control and State Register. */ if (irq >= EFM32_IRQ_INTERRUPTS) { putreg32(bit, regaddr); } else { regval = getreg32(regaddr); regval |= bit; putreg32(regval, regaddr); } } #ifdef CONFIG_EFM32_GPIO_IRQ else { /* Maybe it is a (derived) PIO IRQ */ efm32_gpioirqenable(irq); } #endif efm32_dumpnvic("enable", irq); }