void hw_init(void) { /* Disable watchdog */ at91_disable_wdt(); /* At this stage the main oscillator * is supposed to be enabled PCK = MCK = MOSC */ writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR); /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT); /* PCK = PLLA/2 = 3 * MCK */ pmc_cfg_mck(BOARD_PRESCALER, PLL_LOCK_TIMEOUT); /* Switch MCK on PLLA output */ pmc_cfg_mck(0x1302, PLL_LOCK_TIMEOUT); /* Enable External Reset */ writel(AT91C_RSTC_KEY_UNLOCK | AT91C_RSTC_URSTEN, AT91C_BASE_RSTC + RSTC_RMR); /* Init timer */ timer_init(); #ifdef CONFIG_SCLK slowclk_enable_osc32(); #endif /* Initialize dbgu */ initialize_dbgu(); #ifdef CONFIG_DDR2 /* Initialize DDRAM Controller */ ddramc_init(); #endif #ifdef CONFIG_USER_HW_INIT hw_init_hook(); #endif #if defined(CONFIG_NANDFLASH_RECOVERY) || defined(CONFIG_DATAFLASH_RECOVERY) /* Init the recovery buttons pins */ recovery_buttons_hw_init(); #endif /* do some special init */ ek_special_hw_init(); }
void hw_init(void) { /* Disable watchdog */ at91_disable_wdt(); /* * At this stage the main oscillator * is supposed to be enabled PCK = MCK = MOSC */ pmc_init_pll(0); /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */ pmc_cfg_plla(PLLA_SETTINGS); /* Switch PCK/MCK on Main clock output */ pmc_cfg_mck(BOARD_PRESCALER_MAIN_CLOCK); /* Switch PCK/MCK on PLLA output */ pmc_cfg_mck(BOARD_PRESCALER_PLLA); /* Enable External Reset */ writel(AT91C_RSTC_KEY_UNLOCK | AT91C_RSTC_URSTEN, AT91C_BASE_RSTC + RSTC_RMR); /* Init timer */ timer_init(); /* Initialize dbgu */ initialize_dbgu(); #ifdef CONFIG_DDR2 /* Initialize DDRAM Controller */ ddramc_init(); #endif #if defined(CONFIG_NANDFLASH_RECOVERY) || defined(CONFIG_DATAFLASH_RECOVERY) /* Init the recovery buttons pins */ recovery_buttons_hw_init(); #endif /* do some special init */ ek_special_hw_init(); }