void* host_init_fsi( void *io_pArgs )
{
errlHndl_t l_err = NULL;
ISTEP_ERROR::IStepError l_stepError;
TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_init_fsi entry" );
do
{
l_err = FSI::initializeHardware( );
if (l_err)
{
// This error should get returned
l_stepError.addErrorDetails(l_err);
errlCommit( l_err, ISTEP_COMP_ID );
break;
}
// Only reset the I2C Masters if FSP is not running
if ( !INITSERVICE::spBaseServicesEnabled() )
{
l_err = I2C::i2cResetActiveMasters(I2C::I2C_ALL, false);
if (l_err)
{
// Commit this error
errlCommit( l_err, ISTEP_COMP_ID );
}
}
} while (0);
TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_init_fsi exit" );
return l_stepError.getErrorHandle();
}
///
/// @brief sync handle response
///
void BTSyncMessage::response(msg_q_t i_msgQ)
{
// Send the response to the original caller of sendrecv()
int rc = msg_respond(i_msgQ, iv_msg);
if (rc)
{
// Not much we're going to do here, so lets commit an error and
// the original request will timeout.
IPMI_TRAC(ERR_MRK "msg_respond() i/o error (response) %d", rc);
/*@
* @errortype ERRL_SEV_UNRECOVERABLE
* @moduleid IPMI::MOD_IPMISRV_REPLY
* @reasoncode IPMI::RC_INVALID_QRESPONSE
* @userdata1 rc from msg_respond()
* @devdesc msg_respond() failed
* @custdesc Firmware error during system boot
*/
errlHndl_t err = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
IPMI::MOD_IPMISRV_REPLY,
IPMI::RC_INVALID_QRESPONSE,
rc,
0,
true);
err->collectTrace(IPMI_COMP_NAME);
errlCommit(err, IPMI_COMP_ID);
// Frotz the response data
delete[] iv_data;
iv_data = NULL;
}
}
errlHndl_t checkForIplAttentions()
{
errlHndl_t err = NULL;
assert(!Singleton<Service>::instance().running());
TargetHandleList list;
getTargetService().getAllChips(list, TYPE_PROC);
TargetHandleList::iterator tit = list.begin();
while(tit != list.end())
{
err = Singleton<Service>::instance().handleAttentions(*tit);
if(err)
{
errlCommit(err, ATTN_COMP_ID);
}
tit = list.erase(tit);
}
return 0;
}
///
/// @brief sync msg transmit
///
bool BTSyncMessage::xmit(void)
{
errlHndl_t err = BTMessage::phy_xmit();
if (err)
{
// Something went wrong, so we need to respond back with the error
iv_errl = err;
msg_q_t mq = Singleton<IpmiRP>::instance().msgQueue();
int rc = msg_respond(mq, iv_msg);
if (rc)
{
// Yuk. We can't respond back to our caller with that error. So,
// we'll commit it. I don't see much sense in creating another
// error log, so we'll just trace the msg_respond() failure.
IPMI_TRAC(ERR_MRK "msg_respond() i/o error (transmit) %d", rc);
err->collectTrace(IPMI_COMP_NAME);
errlCommit(err, IPMI_COMP_ID);
iv_errl = NULL;
}
}
// If we had an i/o error we want the idle loop to stop
// If we got EAGAIN we want the idle loop to stop as we just
// put a message on the queue which couldn't be sent.
return (iv_state != 0);
}
void SyncMessage::response(msg_q_t i_msgQ)
{
errlHndl_t err = NULL;
// Send the response to the original caller of sendrecv()
int rc = msg_respond(i_msgQ, iv_msg);
if (rc)
{
TRACFCOMP( g_trac_trustedboot,
ERR_MRK "SyncMessage::response msg_respond failure %d",
rc);
/*@
* @errortype ERRL_SEV_UNRECOVERABLE
* @moduleid MOD_TPM_SYNCRESPONSE
* @reasoncode RC_MSGRESPOND_FAIL
* @userdata1 rc from msq_respond()
* @devdesc msg_respond() failed
* @custdesc Firmware error during system boot
*/
err = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
MOD_TPM_SYNCRESPONSE,
RC_MSGRESPOND_FAIL,
rc,
0,
true);
err->collectTrace(SECURE_COMP_NAME);
err->collectTrace(TRBOOT_COMP_NAME);
// Log this failure here since we can't reply to caller
errlCommit(err, TRBOOT_COMP_ID);
}
}
//
// Wrapper function to call proc_fbc_eff_config_aggregate
//
void* call_host_fbc_eff_config_aggregate( void *io_pArgs )
{
errlHndl_t l_errl = NULL;
ISTEP_ERROR::IStepError l_stepError;
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
"call_host_fbc_eff_config_aggregate entry" );
TARGETING::TargetHandleList l_procChips;
getAllChips( l_procChips, TARGETING::TYPE_PROC);
for (const auto & l_procChip: l_procChips)
{
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>l_fapi2CpuTarget(l_procChip);
FAPI_INVOKE_HWP(l_errl,p9_fbc_eff_config_aggregate,l_fapi2CpuTarget);
if(l_errl)
{
l_stepError.addErrorDetails(l_errl);
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
"ERROR : call_proc_fbc_eff_config_aggregate, PLID=0x%x",
l_errl->plid() );
errlCommit(l_errl, HWPF_COMP_ID);
}
}
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
"call_host_fbc_eff_config_aggregate exit" );
return l_stepError.getErrorHandle();
}
/**
* @brief Starts OCCs on all Processors in the node
* This is intended to be used for Open Power.
*
* @return errlHndl_t Error log if OCC load failed
*/
errlHndl_t activateOCCs(bool i_useSRAM)
{
TRACUCOMP( g_fapiTd,ENTER_MRK"activateOCCs(%d)", i_useSRAM );
errlHndl_t l_errl = NULL;
TARGETING::Target* l_failedOccTarget = NULL;
#ifdef CONFIG_HTMGT
bool occStartSuccess = true;
#endif
l_errl = loadnStartAllOccs (l_failedOccTarget, i_useSRAM);
if (l_errl)
{
errlCommit (l_errl, HWPF_COMP_ID);
#ifdef CONFIG_HTMGT
occStartSuccess = false;
#endif
}
//TODO RTC:116027
//HB configures/enables the occ buffers
//TODO RTC:115636
//HB enables the scon-via-i2c logic on the OCCs
#ifdef CONFIG_HTMGT
// Report OCC status to HTMGT
if (!i_useSRAM)
{
HTMGT::processOccStartStatus(occStartSuccess,l_failedOccTarget);
}
#endif
TRACUCOMP( g_fapiTd,EXIT_MRK"activateOCC" );
return l_errl;
}
/** Enable chip attentions
*
* @return 0 on success else return code
*/
int enableAttns(void)
{
// TODO RTC 134050 Post init setups are temporarily here because
// Opal has not set up pnor or ipmi before calling rt_main.
static bool onlyCallApplyTempOverridesOnce = false;
if (!onlyCallApplyTempOverridesOnce)
{
ATTN_SLOW("ATTN_RT::enableAttns - call initialzation routines");
postInitCalls_t* rtPost = getPostInitCalls();
rtPost->callApplyTempOverrides();
onlyCallApplyTempOverridesOnce = true;
}
ATTN_SLOW(ENTER_MRK"ATTN_RT::enableAttns");
int rc = 0;
errlHndl_t err = NULL;
err = Singleton<Service>::instance().enableAttns();
if(err)
{
errlCommit(err, ATTN_COMP_ID);
rc = -1;
}
ATTN_SLOW(EXIT_MRK"ATTN_RT::enableAttns rc: %d", rc);
return rc;
}
int enable_occ_actuation (int i_occ_activation)
{
int rc = 0;
#ifdef CONFIG_HTMGT
errlHndl_t err = HTMGT::enableOccActuation(0 != i_occ_activation);
if (err)
{
rc = err->reasonCode();
if (0 == rc)
{
// If there was a failure, be sure to return non-zero status
rc = -1;
}
TRACFCOMP (g_fapiTd,ERR_MRK"enable_occ_actuation: OCC state change"
" failed with rc=0x%04X (actuate=%d)",
err->reasonCode(), i_occ_activation);
errlCommit (err, HWPF_COMP_ID);
}
#else
rc = -1;
TRACFCOMP(g_fapiTd,ERR_MRK"Unexpected call to enable_occ_actuation(%d)"
" when HTMGT is not enabled", i_occ_activation);
#endif
return rc;
}
/*******Protected Methods**************/
RtPnor::RtPnor()
{
errlHndl_t l_err = readTOC();
if (l_err)
{
errlCommit(l_err, PNOR_COMP_ID);
}
}
/*******Protected Methods**************/
RtPnor::RtPnor()
{
do {
errlHndl_t l_err = getMasterProcId();
if (l_err)
{
errlCommit(l_err, PNOR_COMP_ID);
break;
}
l_err = readTOC();
if (l_err)
{
errlCommit(l_err, PNOR_COMP_ID);
break;
}
} while (0);
}
//******************************************************************************
//TodSvc::todInit
//******************************************************************************
errlHndl_t TodSvc::todInit()
{
TOD_ENTER();
errlHndl_t l_errHdl = NULL;
bool l_isTodRunning = false;
do
{
//Check if the Chip TOD logic is already Running
l_errHdl = TOD::isTodRunning(l_isTodRunning);
if ( l_errHdl )
{
TOD_INF("Call to isTodRunning() failed , cannot initialize the"
"Chip TOD logic ");
break;
}
if ( l_isTodRunning )
{
TOD_ERR("Cannot initialize the TOD logic while the Chip TOD logic"
"is already running");
/*@
* @errortype
* @moduleid TOD_INIT_ALREADY_RUNNING
* @reasoncode TOD_INVALID_ACTION
* @userdata1 EMOD_TOD_INIT
* @userdata2 ChipTOD logic HW state, 1=running,
* zero otherwise
* @devdesc Error: Initialization of chip TOD logic cannot be
* done when its already in the running state
* @custdesc Host failed to boot because there was a problem
* configuring Time Of Day on the Host processors
*/
l_errHdl = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_INFORMATIONAL,
TOD_INIT_ALREADY_RUNNING,
TOD_INVALID_ACTION,
EMOD_TOD_INIT,
l_isTodRunning);
break;
}
//Call the hardware procedure to initialize the Chip TOD logic to the
//running state using the PRIMARY TOD topology.
l_errHdl = todInitHwp();
if( l_errHdl )
{
TOD_ERR("TOD initialization failed for primary topology : HWP");
l_errHdl->setSev(ERRORLOG::ERRL_SEV_UNRECOVERABLE);
errlCommit(l_errHdl, TOD_COMP_ID);
break;
}
}while(0);
TOD_EXIT();
return l_errHdl;
}
void resolveMcs(uint64_t i_mcs, void * i_data)
{
ResolveMcsArgs * args = static_cast<ResolveMcsArgs *>(i_data);
uint64_t mciFirScomData;
TargetHandle_t mcs = getTargetService().getMcs(args->proc, i_mcs);
// read the MCI fir to determine what type of attention
// centaur reporting
errlHndl_t err = getScom(mcs, MCI::address, mciFirScomData);
if(err)
{
errlCommit(err, ATTN_COMP_ID);
}
else
{
// pick the highest priority attention
for(uint64_t type = INVALID_ATTENTION_TYPE;
type != END_ATTENTION_TYPE;
++type)
{
uint64_t mask;
if(!MCI::getCheckbits(type, mask))
{
// this object doesn't support
// this attention type
continue;
}
if(mask & mciFirScomData)
{
AttnData d;
d.targetHndl = getTargetService().getMembuf(mcs);
if(!d.targetHndl)
{
// this membuf not functional
// or nothing is attached to this MCS
break;
}
d.attnType = static_cast<ATTENTION_VALUE_TYPE>(type);
args->list->add(Attention(d, args->ops));
break;
}
}
}
}
//******************************************************************************
// fapiLogError
//******************************************************************************
void fapiLogError(fapi::ReturnCode & io_rc,
fapi::fapiErrlSeverity_t i_sev,
bool i_unitTestError)
{
// ENUM CONVERSION FAPI to PLATFORM
errlHndl_t l_pError = NULL;
FAPI_INF("fapiLogError: logging error");
// Convert a FAPI severity to a ERRORLOG severity
ERRORLOG::errlSeverity_t l_sev = ERRORLOG::ERRL_SEV_UNRECOVERABLE;
switch (i_sev)
{
case fapi::FAPI_ERRL_SEV_RECOVERED:
l_sev = ERRORLOG::ERRL_SEV_RECOVERED;
break;
case fapi::FAPI_ERRL_SEV_PREDICTIVE:
l_sev = ERRORLOG::ERRL_SEV_PREDICTIVE;
break;
case fapi::FAPI_ERRL_SEV_UNRECOVERABLE:
// l_sev set above
break;
default:
FAPI_ERR("severity (i_sev) of %d is unknown",i_sev);
}
// Convert the return code to an error log.
// This will set the return code to FAPI_RC_SUCCESS and clear any PLAT Data,
// HWP FFDC data, and Error Target associated with it.
l_pError = fapiRcToErrl(io_rc, l_sev);
// Commit the error log. This will delete the error log and set the handle
// to NULL.
if (i_unitTestError)
{
errlCommit(l_pError, CXXTEST_COMP_ID);
}
else
{
errlCommit(l_pError, HWPF_COMP_ID);
}
}
/**
* @brief This function will perform the steps required to do a read from
* the Hostboot DVPD data.
*
* @param[in] i_opType - Operation Type - See DeviceFW::OperationType in
* driververif.H
*
* @param[in] i_target - Processor Target device
*
* @param [in/out] io_buffer - Pointer to the data that was read from
* the target device. This parameter, when set to NULL, will return
* the keyword size value in io_buflen.
*
* @param [in/out] io_buflen - Length of the buffer to be read or written
* to/from the target. This value should indicate the size of the
* io_buffer parameter that has been allocated. Being returned it
* will indicate the number of valid bytes in the buffer being
* returned. This parameter will contain the size of a keyword when
* the io_buffer parameter is passed in NULL.
*
* @param [in] i_accessType - Access Type - See DeviceFW::AccessType in
* usrif.H
*
* @param [in] i_args - This is an argument list for the device driver
* framework.
*
* @return errlHndl_t - NULL if successful, otherwise a pointer to the
* error log.
*/
errlHndl_t dvpdRead ( DeviceFW::OperationType i_opType,
TARGETING::Target * i_target,
void * io_buffer,
size_t & io_buflen,
int64_t i_accessType,
va_list i_args )
{
errlHndl_t err = NULL;
IpVpdFacade::input_args_t args;
args.record = ((dvpdRecord)va_arg( i_args, uint64_t ));
args.keyword = ((dvpdKeyword)va_arg( i_args, uint64_t ));
args.location = ((VPD::vpdCmdTarget)va_arg( i_args, uint64_t ));
TRACSSCOMP( g_trac_vpd,
ENTER_MRK"dvpdRead(0x%.8X):rec=%d,kw=%d,loc=%d",
TARGETING::get_huid(i_target),
args.record,
args.keyword,
args.location);
#ifdef CONFIG_SECUREBOOT
// Load the secure section just in case if we're using it
bool l_didload = false;
err = Singleton<DvpdFacade>::instance().
loadUnloadSecureSection( args, i_target, true, l_didload );
#endif
if( !err )
{
err = Singleton<DvpdFacade>::instance().read(i_target,
io_buffer,
io_buflen,
args);
}
#ifdef CONFIG_SECUREBOOT
if( l_didload )
{
errlHndl_t err2 = Singleton<DvpdFacade>::instance().
loadUnloadSecureSection( args, i_target, false, l_didload );
if( err2 && !err )
{
err = err2;
err2 = nullptr;
}
else if( err2 )
{
err2->plid(err->plid());
errlCommit( err2, VPD_COMP_ID );
}
}
#endif
return err;
}
void* call_cen_arrayinit (void *io_pArgs)
{
IStepError l_StepError;
errlHndl_t l_err = NULL;
TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_cen_arrayinit entry" );
TARGETING::TargetHandleList l_membufTargetList;
getAllChips(l_membufTargetList, TYPE_MEMBUF);
TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "call_cen_arrayinit: %d membufs found",
l_membufTargetList.size());
for (const auto & l_membuf_target : l_membufTargetList)
{
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
"cen_arrayinit HWP target HUID %.8x",
TARGETING::get_huid(l_membuf_target));
// call the HWP with each target
fapi2::Target <fapi2::TARGET_TYPE_MEMBUF_CHIP> l_fapi_membuf_target
(l_membuf_target);
FAPI_INVOKE_HWP(l_err, cen_arrayinit, l_fapi_membuf_target);
// process return code.
if ( l_err )
{
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
"ERROR 0x%.8X: cen_arrayinit HWP on target HUID %.8x",
l_err->reasonCode(), TARGETING::get_huid(l_membuf_target) );
// capture the target data in the elog
ErrlUserDetailsTarget(l_membuf_target).addToLog( l_err );
// Create IStep error log and cross reference to error that occurred
l_StepError.addErrorDetails( l_err );
// Commit Error
errlCommit( l_err, ISTEP_COMP_ID );
}
else
{
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
"SUCCESS : cen_arrayinit HWP");
}
}
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_cen_arrayinit exit" );
return l_StepError.getErrorHandle();
}
Service::~Service()
{
ATTN_SLOW("Service::~Service() enter");
errlHndl_t err = disableAttns();
if(err)
{
errlCommit(err, ATTN_COMP_ID);
}
ATTN_SLOW("Service::~Service() exit");
}
// Runtime processCallout
bool rt_processCallout(errlHndl_t &io_errl,
uint8_t * i_pData,
uint64_t i_Size,
bool i_DeferredOnly)
{
HWAS::callout_ud_t *pCalloutUD = (HWAS::callout_ud_t *)i_pData;
if(i_DeferredOnly)
{
if ((pCalloutUD->type == HWAS::HW_CALLOUT) &&
((pCalloutUD->deconfigState == HWAS::DELAYED_DECONFIG) ||
(pCalloutUD->deconfigState == HWAS::DECONFIG)))
{
pCalloutUD->deconfigState = HWAS::NO_DECONFIG;
TRACFCOMP( g_trac_errl, ERR_MRK
"Runtime errorlog callout with DELAYED_DECONFIG or "
"DECONFIG not allowed! Changed to NO_DECONFIG. "
" plid: 0x%X. Deconfig State: 0x%x", io_errl->plid(),
pCalloutUD->deconfigState);
}
}
// Gard callouts are handled by the HWSV if there is an FSP
// if we attempt to create a gard record it requires us to read
// PNOR which we cannot do on FSP based machines
if(!INITSERVICE::spBaseServicesEnabled())
{
if ((pCalloutUD->type == HWAS::HW_CALLOUT) &&
(pCalloutUD->gardErrorType != HWAS::GARD_NULL))
{
TARGETING::Target *pTarget = NULL;
uint8_t * l_uData = (uint8_t *)(pCalloutUD + 1);
bool l_err = HWAS::retrieveTarget(l_uData, pTarget, io_errl);
if (!l_err)
{
errlHndl_t errl = HWAS::theDeconfigGard().platCreateGardRecord
(pTarget,
io_errl->eid(),
pCalloutUD->gardErrorType);
if (errl)
{
TRACFCOMP( g_trac_errl, ERR_MRK
"rt_processCallout: error from platCreateGardRecord");
errlCommit(errl, HWAS_COMP_ID);
}
}
}
}
return true;
}
Service::~Service()
{
errlHndl_t err = stop();
if(err)
{
errlCommit(err, ATTN_COMP_ID);
}
sync_cond_destroy(&iv_cond);
mutex_destroy(&iv_mutex);
}
///
/// @brief handle the read of an event (OEM SEL)
///
void BTAsyncReadEventMessage::response(msg_q_t)
{
do {
// If our completion code isn't CC_OK, lets log that fact. There's
// not much we can do, but at least this might give a hint that
// something is awry.
if (iv_cc != IPMI::CC_OK)
{
IPMI_TRAC(ERR_MRK "read event message (%x:%x seq %d) "
"completion code %x",
iv_netfun, iv_cmd, iv_seq, iv_cc);
if (iv_cc == IPMI::CC_CMDSPC1)
{
// We got a completion code with 0x80, which is no data
// Let's trace the event, but not log an error.
IPMI_TRAC(ERR_MRK "SEL returned with no data, not logging "
"an error");
break;
}
/*@
* @errortype ERRL_SEV_INFORMATIONAL
* @moduleid IPMI::MOD_IPMISRV_REPLY
* @reasoncode IPMI::RC_READ_EVENT_FAILURE
* @userdata1 command of message
* @userdata2 completion code
* @devdesc an async completion code was not CC_OK
* @custdesc Unexpected IPMI completion code from the BMC
*/
errlHndl_t err = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_INFORMATIONAL,
IPMI::MOD_IPMISRV_REPLY,
IPMI::RC_READ_EVENT_FAILURE,
iv_cmd,
iv_cc,
true);
err->collectTrace(IPMI_COMP_NAME);
errlCommit(err, IPMI_COMP_ID);
break;
}
// Before we self destruct, we need to turn the data collected in to
// a record we can pass to the waiting event handler.
Singleton<IpmiRP>::instance().postEvent(new IPMI::oemSEL(iv_data));
} while(false);
// Yes, this is OK - there is no further reference to this object.
delete this;
}
bool isFunctional(const TARGETING::Target* i_pTarget)
{
//--------------------------------------------------------------------------
// Local Variables
//--------------------------------------------------------------------------
errlHndl_t l_errl = NULL;
bool l_isFunctional = false;
//--------------------------------------------------------------------------
// Code
//--------------------------------------------------------------------------
if(i_pTarget)
{
// For now return true if state is FUNCTIONAL else false.
// There are total 4 HWAS functional states can exist:
// NON FUNCTIONAL,FUNCTIONAL,CM FUNCTIONAL and DUMP FUNCTIONAL.
// In-order to consider CM & DUMP FUNCTIONAL states we need to check
// whether system is in CM/DUMP mode. Since the CM/DUMP mode support
// is not available, we'll continue using FUNCTIONAL state only.
// Later we need to check for appropriate mode and state.
// @TODO via RTC: 69925
l_isFunctional =
i_pTarget->getAttr<TARGETING::ATTR_HWAS_STATE>().functional;
}
else
{
// If i_pTarget is NULL then create an error log
TOD_ERR("Input Target handle is null");
//Create error
/*@
* @errortype
* @moduleid TOD_FUNCTIONAL_TARGET
* @reasoncode TOD_INVALID_TARGET
* @devdesc NULL Target is supplied as an input
* @custdesc Service Processor Firmware encountered an internal
* error
*/
l_errl = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_INFORMATIONAL,
TOD_FUNCTIONAL_TARGET,
TOD_INVALID_TARGET);
errlCommit(l_errl, TOD_COMP_ID);
}
return l_isFunctional;
}
void Daemon::writeScratchReg(uint64_t i_value)
{
size_t l_size = sizeof(uint64_t);
errlHndl_t l_errl =
deviceWrite(TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL,
&i_value, l_size,
DEVICE_SCOM_ADDRESS(MB_SCRATCH_REGISTER_1));
if (l_errl)
{
errlCommit(l_errl, TRACE_COMP_ID);
}
}
void AsyncMessage::response(msg_q_t i_msgQ)
{
if (NULL != iv_errl)
{
TRACFCOMP(g_trac_trustedboot,
ERR_MRK "AsyncMessage::respond with error log");
// Since we can't pass back to the caller we will commit the log
errlCommit(iv_errl, TRBOOT_COMP_ID);
delete iv_errl;
iv_errl = NULL;
}
delete this;
}
///
/// @brief async msg transmit
///
bool BTAsyncMessage::xmit(void)
{
errlHndl_t err = BTMessage::phy_xmit();
if (err)
{
// Not much we're going to do here, so just commit the error.
err->collectTrace(IPMI_COMP_NAME);
errlCommit(err, IPMI_COMP_ID);
}
// If we had an i/o error we want the idle loop to stop.
// If we got EAGAIN we want the idle loop to stop as we just
// put a message on the queue which couldn't be sent.
return (iv_state != 0);
}
// Runtime processCallout
bool rt_processCallout(errlHndl_t &io_errl,
uint8_t * i_pData,
uint64_t i_Size,
bool i_DeferredOnly)
{
HWAS::callout_ud_t *pCalloutUD = (HWAS::callout_ud_t *)i_pData;
if(i_DeferredOnly)
{
if ((pCalloutUD->type == HWAS::HW_CALLOUT) &&
((pCalloutUD->deconfigState == HWAS::DELAYED_DECONFIG) ||
(pCalloutUD->deconfigState == HWAS::DECONFIG)))
{
pCalloutUD->deconfigState = HWAS::NO_DECONFIG;
TRACFCOMP( g_trac_errl, ERR_MRK
"Runtime errorlog callout with DELAYED_DECONFIG or "
"DECONFIG not allowed! Changed to NO_DECONFIG. "
" plid: 0x%X. Deconfig State: 0x%x", io_errl->plid(),
pCalloutUD->deconfigState);
}
}
if ((pCalloutUD->type == HWAS::HW_CALLOUT) &&
(pCalloutUD->gardErrorType != HWAS::GARD_NULL))
{
TARGETING::Target *pTarget = NULL;
uint8_t * l_uData = (uint8_t *)(pCalloutUD + 1);
bool l_err = HWAS::retrieveTarget(l_uData, pTarget, io_errl);
if (!l_err)
{
errlHndl_t errl = HWAS::theDeconfigGard().platCreateGardRecord(pTarget,
io_errl->eid(),
pCalloutUD->gardErrorType);
if (errl)
{
TRACFCOMP( g_trac_errl, ERR_MRK
"rt_processCallout: error from platCreateGardRecord");
errlCommit(errl, HWAS_COMP_ID);
}
}
}
return true;
}
uint64_t Daemon::readScratchReg()
{
size_t l_size = sizeof(uint64_t);
uint64_t value = 0;
errlHndl_t l_errl =
deviceRead(TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL,
&value, l_size,
DEVICE_SCOM_ADDRESS(MB_SCRATCH_REGISTER_1));
if (l_errl)
{
errlCommit(l_errl, TRACE_COMP_ID);
}
return value;
}
errlHndl_t Service::stop()
{
ATTN_SLOW("shutting down...");
mutex_lock(&iv_mutex);
tid_t intrTask = iv_intrTask;
tid_t prdTask = iv_prdTask;
msg_q_t q = iv_intrTaskQ;
iv_intrTask = 0;
iv_prdTask = 0;
mutex_unlock(&iv_mutex);
if(intrTask)
{
errlHndl_t err = configureInterrupts(q, DOWN);
if(err)
{
errlCommit(err, ATTN_COMP_ID);
}
msg_t * shutdownMsg = msg_allocate();
shutdownMsg->type = SHUTDOWN;
msg_sendrecv(q, shutdownMsg);
msg_free(shutdownMsg);
task_wait_tid(intrTask, 0, 0);
msg_q_destroy(q);
}
if(prdTask)
{
sync_cond_signal(&iv_cond);
task_wait_tid(prdTask, 0, 0);
}
ATTN_SLOW("..shutdown complete");
return 0;
}
/** Disable chip attentions
*
* @return 0 on success else return code
*/
int disableAttns(void)
{
ATTN_SLOW(ENTER_MRK"ATTN_RT::disableAttns");
int rc = 0;
errlHndl_t err = NULL;
err = Singleton<Service>::instance().disableAttns();
if(err)
{
errlCommit(err, ATTN_COMP_ID);
rc = -1;
}
ATTN_SLOW(EXIT_MRK"ATTN_RT::disableAttns rc: %d", rc);
return rc;
}
void* host_set_ipl_parms( void *io_pArgs )
{
ISTEP_ERROR::IStepError l_stepError;
errlHndl_t l_err;
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_set_ipl_parms entry" );
//Read out the semi persistent area.
Util::semiPersistData_t l_semiData;
Util::readSemiPersistData(l_semiData);
// If magic number set, then this is warm reboot:
// 1) increment boot count
if(l_semiData.magic == Util::PERSIST_MAGIC)
{
l_semiData.reboot_cnt++;
}
// else magic number is not set, then this is first, cold boot:
// 1) set magic num, boot count
// 2) clear all gard records of type GARD_Reconfig
else
{
memset(&l_semiData, 0x0, sizeof(Util::semiPersistData_t));
l_semiData.magic = Util::PERSIST_MAGIC;
l_err = HWAS::clearGardByType(HWAS::GARD_Reconfig);
if (l_err)
{
TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
"ERROR 0x%.8X: clearGardByType( )",
l_err->reasonCode() );
// Create IStep error log and cross ref error that occurred
l_stepError.addErrorDetails( l_err );
errlCommit( l_err, ISTEP_COMP_ID );
}
}
//Write update data back out
Util::writeSemiPersistData(l_semiData);
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_set_ipl_parms exit" );
return l_stepError.getErrorHandle();
}
// ----------------------------------------------------------------------------
// configureBootOptions()
// ----------------------------------------------------------------------------
void AST2400BootConfig::configureBootOptions(uint8_t i_bootOptions )
{
// clear gard records?
if( i_bootOptions & CLEAR_GARD_RECORDS )
{
TRACFCOMP(g_bc_trace,
"configureBootOptions()"
" clearing gard records");
errlHndl_t errl = HWAS::theDeconfigGard().clearGardRecords(NULL);
if(errl)
{
errl->collectTrace( "BOOT_CFG", 512 );
errlCommit(errl,INITSVC_COMP_ID);
}
}
}
