/*
* Sets the hardware clock date and time to @aval.
* Context: user, interrupt (adjtimex).
*/
static int rtc_set_time(struct exi_device *dev, unsigned long aval)
{
u32 req;
int retval;
/*
* We may get called from the timer interrupt. In that case,
* we could fail if the exi channel used to access the RTC
* is busy. If this happens, we just return an error. The timer
* interrupt code is prepared to deal with such case.
*/
/* select the RTC device */
retval = exi_dev_select(dev);
if (!retval) {
/* send the appropriate command */
req = 0xa0000000;
exi_dev_write(dev, &req, sizeof(req));
/* set the new time and date value */
exi_dev_write(dev, &aval, sizeof(aval));
/* deselect the RTC device */
exi_dev_deselect(dev);
}
return retval;
}
/*
* Loads the SRAM contents.
* Context: user.
*/
static void sram_load(struct exi_device *dev)
{
struct gcnrtc_drvdata *drvdata = exi_get_drvdata(dev);
struct gcn_sram *sram = &drvdata->sram;
u32 req;
exi_dev_take(dev);
/* select the SRAM device */
exi_dev_select(dev);
/* send the appropriate command */
req = 0x20000100;
exi_dev_write(dev, &req, sizeof(req));
/* read the SRAM data */
exi_dev_read(dev, sram, sizeof(*sram));
/* deselect the SRAM device */
exi_dev_deselect(dev);
exi_dev_give(dev);
return;
}
/*
* Gets the hardware clock date and time.
* Context: user.
*/
static unsigned long rtc_get_time(struct exi_device *dev)
{
unsigned long a = 0;
/* select the RTC device */
if (exi_dev_select(dev) == 0) {
/* send the appropriate command */
a = 0x20000000;
exi_dev_write(dev, &a, sizeof(a));
/* read the time and date value */
exi_dev_read(dev, &a, sizeof(a));
/* deselect the RTC device */
exi_dev_deselect(dev);
}
return a;
}
/*
* Loads the SRAM contents.
* Context: user.
*/
static void sram_load(struct exi_device *dev)
{
struct rtc_private *priv = exi_get_drvdata(dev);
struct gcn_sram *sram = &priv->sram;
u32 req;
/* select the SRAM device */
if (exi_dev_select(dev) == 0) {
/* send the appropriate command */
req = 0x20000100;
exi_dev_write(dev, &req, sizeof(req));
/* read the SRAM data */
exi_dev_read(dev, sram, sizeof(*sram));
/* deselect the SRAM device */
exi_dev_deselect(dev);
}
return;
}
/*
* Gets the hardware clock date and time.
* Context: user.
*/
static unsigned long gcnrtc_read_time(struct exi_device *dev)
{
unsigned long a = 0;
exi_dev_take(dev);
/* select the SRAM device */
exi_dev_select(dev);
/* send the appropriate command */
a = 0x20000000;
exi_dev_write(dev, &a, sizeof(a));
/* read the time and date value */
exi_dev_read(dev, &a, sizeof(a));
/* deselect the RTC device */
exi_dev_deselect(dev);
exi_dev_give(dev);
return a;
}
static int sd_reset_sequence(struct sd_host *host)
{
struct sd_command *cmd = &host->cmd;
u8 d;
int i;
int retval = 0;
u32 cmd_ret = 0;
host->card.state = 0;
/*
* Wait at least 80 dummy clock cycles with the card deselected
* and with the MOSI line continuously high.
*/
exi_dev_take(host->exi_device);
exi_dev_deselect(host->exi_device);
for (i = 0; i < SD_IDLE_CYCLES; i++) {
d = 0xff;
exi_dev_write(host->exi_device, &d, sizeof(d));
}
exi_dev_give(host->exi_device);
/*
* Send a CMD0, card must ack with "idle state" (0x01).
* This puts the card into SPI mode and soft resets it.
* CRC checking is disabled by default.
*/
for (i = 0; i < 255; i++) {
/* CMD0 */
sd_cmd_go_idle_state(cmd);
retval = sd_run_no_data_command(host, cmd);
if (retval < 0) {
retval = -ENODEV;
goto out;
}
if (retval == R1_SPI_IDLE) {
break;
}
}
if (retval != R1_SPI_IDLE) {
retval = -ENODEV;
goto out;
}
/*
* Send CMD8 and CMD58 for SDHC support
*/
for (i = 0; i < 8; i++) {
sd_cmd_crc(cmd, SD_SEND_IF_COND, 0x01AA, 0x87); //CMD8 + Check and CRC
retval = sd_start_command(host, cmd);
if(retval==0x01) {
memset(&cmd_ret, 0, sizeof(cmd_ret));
spi_read(host, &cmd_ret, sizeof(cmd_ret));
sd_end_command(host);
if (cmd_ret == 0x01AA) { //Check if CMD8 is alright
sd_cmd(cmd, MMC_SPI_READ_OCR, 0);//CMD58
retval = sd_start_command(host, cmd);
memset(&cmd_ret, 0, sizeof(cmd_ret));
spi_read(host, &cmd_ret, sizeof(cmd_ret));
sd_end_command(host);
if(retval==0x01) { //Everything is alright
break;
}
}
break;
}
else if(retval==0x05) {
//NO SDHC-Card
break;
}
}
/*
* Send a ACMD41 to activate card initialization process.
* SD card must ack with "ok" (0x00).
* MMC card will report "invalid command" (0x04).
*/
for (i = 0; i < 65535; i++) {
/* ACMD41 = CMD55 + CMD41 */
sd_cmd(cmd, MMC_APP_CMD, 0);
retval = sd_run_no_data_command(host, cmd);
if (retval < 0) {
retval = -ENODEV;
goto out;
}
sd_cmd(cmd, SD_APP_OP_COND, (1<<30)|0x100000);
retval = sd_run_no_data_command(host, cmd);
if (retval < 0) {
retval = -ENODEV;
goto out;
}
if (retval == 0x00) {
/* we found a SD card */
mmc_card_set_present(&host->card);
host->card.type = MMC_TYPE_SD;
break;
} else if(retval != 0x01) {
DBG("ACMD41 return: %d\n", retval);
}
if ((retval & R1_SPI_ILLEGAL_COMMAND)) {
/* this looks like a MMC card */
break;
}
}
/*
* MMC cards require CMD1 to activate card initialization process.
* MMC card must ack with "ok" (0x00)
*/
if (!mmc_card_sd(&host->card)) {
for (i = 0; i < 65535; i++) {
sd_cmd(cmd, MMC_SEND_OP_COND, 0);
retval = sd_run_no_data_command(host, cmd);
if (retval < 0) {
retval = -ENODEV;
goto out;
}
if (retval == 0x00) {
/* we found a MMC card */
mmc_card_set_present(&host->card);
break;
}
}
if (retval != 0x00) {
DBG("MMC card, bad, retval=%02x\n", retval);
sd_card_set_bad(host);
}
}
out:
return retval;
}
static inline void spi_write(struct sd_host *host, void *data, size_t len)
{
exi_dev_write(host->exi_device, data, len);
}