static void exynos_pm_prepare(void) { exynos_set_delayed_reset_assertion(false); /* Set wake-up mask registers */ exynos_pm_set_wakeup_mask(); s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save)); exynos_pm_enter_sleep_mode(); /* ensure at least INFORM0 has the resume address */ pmu_raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0); }
static void exynos_pm_resume(void) { u32 cpuid = read_cpuid_part(); if (exynos_pm_central_resume()) goto early_wakeup; /* For release retention */ exynos_pm_release_retention(); if (cpuid == ARM_CPU_PART_CORTEX_A9) scu_enable(S5P_VA_SCU); if (call_firmware_op(resume) == -ENOSYS && cpuid == ARM_CPU_PART_CORTEX_A9) exynos_cpu_restore_register(); early_wakeup: /* Clear SLEEP mode set in INFORM1 */ pmu_raw_writel(0x0, S5P_INFORM1); exynos_set_delayed_reset_assertion(true); }