int exynos_power_init(void) { struct udevice *dev; int ret; ret = pmic_get("max77686", &dev); if (!ret) { /* TODO([email protected]): Move into the clock/pmic API */ ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0, MAX77686_32KHCP_EN); if (ret) return ret; ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_BBAT, 0, MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V); if (ret) return ret; } else { ret = pmic_get("s5m8767-pmic", &dev); /* TODO([email protected]): Use driver model to access clock */ #ifdef CONFIG_PMIC_S5M8767 if (!ret) s5m8767_enable_32khz_cp(dev); #endif } if (ret == -ENODEV) return 0; ret = regulators_enable_boot_on(false); if (ret) return ret; ret = exynos_set_regulator("vdd_mif", 1100000); if (ret) return ret; /* * This would normally be 1.3V, but since we are running slowly 1.1V * is enough. For spring it helps reduce CPU temperature and avoid * hangs with the case open. 1.1V is minimum voltage borderline for * chained bootloaders. */ ret = exynos_set_regulator("vdd_arm", 1100000); if (ret) return ret; ret = exynos_set_regulator("vdd_int", 1012500); if (ret) return ret; ret = exynos_set_regulator("vdd_g3d", 1200000); if (ret) return ret; return 0; }
int exynos_power_init(void) { struct udevice *dev; int ret; ret = pmic_get("max77686", &dev); if (!ret) { /* TODO([email protected]): Move into the clock/pmic API */ ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0, MAX77686_32KHCP_EN); if (ret) return ret; ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_BBAT, 0, MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V); if (ret) return ret; } else { ret = pmic_get("s5m8767-pmic", &dev); /* TODO([email protected]): Use driver model to access clock */ #ifdef CONFIG_PMIC_S5M8767 if (!ret) s5m8767_enable_32khz_cp(dev); #endif } if (ret == -ENODEV) return 0; ret = regulators_enable_boot_on(false); if (ret) return ret; ret = exynos_set_regulator("vdd_mif", 1100000); if (ret) return ret; ret = exynos_set_regulator("vdd_arm", 1300000); if (ret) return ret; ret = exynos_set_regulator("vdd_int", 1012500); if (ret) return ret; ret = exynos_set_regulator("vdd_g3d", 1200000); if (ret) return ret; return 0; }