/* print board registers; if slot is zero, print all boards */
void
fadc250Mon(int slot)
{
int id, start, end, kk, jj;
nfadc = faGetNfadc();
if(slot==0)
{
start = 0;
end = nfadc;
}
else if((id = faId(slot)) >= 0)
{
start = id;
end = start + 1;
}
else
{
return;
}
printf("nfadc=%d\n",nfadc);
for(kk=start; kk<end; kk++)
{
faStatus(faSlot(kk),0);
}
return;
}
/* download setting into all found FADCs */
int
fadc250DownloadAll()
{
int slot, ii, jj, nsamples, threshold;
float ped;
#if 0
int updateThresholds = 1;
#endif
printf("\n\nfadc250DownloadAll reached, nfadc=%d\n",nfadc);
for(jj=0; jj<nfadc; jj++)
{
slot = faSlot(jj);
faSetProcMode(slot,
fa250[slot].mode,
fa250[slot].winOffset,
fa250[slot].winWidth,
fa250[slot].nsb,
fa250[slot].nsa,
fa250[slot].npeak, 0);
faChanDisable(slot, fa250[slot].chDisMask);
faThresholdIgnore(slot, fa250[slot].thrIgnoreMask);
faSetHitbitTrigWidth(slot, fa250[slot].trigWidth);
faSetHitbitTrigMask(slot, fa250[slot].trigMask);
faSetHitbitMinTOT(slot, fa250[slot].trigMinTOT);
faSetHitbitMinMultiplicity(slot, fa250[slot].trigMinMult);
faSetCompression(slot,fa250[slot].compression);
for(ii=0; ii<NCHAN; ii++)
{
faSetChannelDelay(slot, ii, fa250[slot].delay[ii] / 4);
faSetDAC(slot, fa250[slot].dac[ii], (1<<ii));
faSetChannelGain(slot, ii, fa250[slot].gain[ii]);
ped = fa250[slot].ped[ii] * (float)(fa250[slot].nsa+fa250[slot].nsb);
faSetChannelPedestal(slot, ii, (int)ped);
/* if threshold=0, don't add pedestal since user is disabling zero suppression */
if(fa250[slot].thr[ii] > 0)
faSetChThreshold(slot, ii, ((int)fa250[slot].ped[ii])+fa250[slot].thr[ii]);
else
faSetChThreshold(slot, ii, 0);
}
}
return(0);
}
/* upload setting from all found FADCs */
int
fadc250UploadAll(char *string, int length)
{
int slot, i, ii, jj, len1, len2;
char *str, sss[1024];
unsigned int tmp, val[FA_MAX_ADC_CHANNELS], adcChanEnabled;
unsigned short sval[FA_MAX_ADC_CHANNELS];
float fval[FA_MAX_ADC_CHANNELS];
for(jj=0; jj<nfadc; jj++)
{
slot = faSlot(jj);
faGetProcMode(slot,
&fa250[slot].mode,
&fa250[slot].winOffset,
&fa250[slot].winWidth,
&fa250[slot].nsb,
&fa250[slot].nsa,
&fa250[slot].npeak);
fa250[slot].chDisMask = faGetChanMask(slot);
fa250[slot].thrIgnoreMask = faGetThresholdIgnoreMask(slot);
fa250[slot].trigWidth = faGetHitbitTrigWidth(slot);
fa250[slot].trigMask = faGetHitbitTrigMask(slot);
fa250[slot].trigMinTOT = faGetHitbitMinTOT(slot);
fa250[slot].trigMinMult = faGetHitbitMinMultiplicity(slot);
fa250[slot].compression = faGetCompression(slot);
for(i=0;i<FA_MAX_ADC_CHANNELS;i++)
{
fa250[slot].delay[i] = 4*faGetChannelDelay(slot, i);
fa250[slot].dac[i] = faGetChannelDAC(slot, i);
fa250[slot].ped[i] = faGetChannelPedestal(slot, i);
fa250[slot].ped[i] = ((float)fa250[slot].ped[i])/(fa250[slot].nsa+fa250[slot].nsb); /* go back from integral to amplitude */
fa250[slot].thr[i] = faGetChThreshold(slot, i);
if(fa250[slot].thr[i] > 0)
{
fa250[slot].thr[i] = fa250[slot].thr[i] - (int)fa250[slot].ped[i]; /* MUST SUBTRACT PEDESTAL TO BE CONSISTENT WITH DOWNLOADED THRESHOLD */
}
fa250[slot].gain[i] = faGetChannelGain(slot, i);
}
}
if(length)
{
str = string;
str[0] = '\0';
for(jj=0; jj<nfadc; jj++)
{
slot = faSlot(jj);
sprintf(sss,"FADC250_SLOT %d\n",slot);
ADD_TO_STRING;
sprintf(sss,"FADC250_MODE %d\n", fa250[slot].mode);
ADD_TO_STRING;
sprintf(sss,"FADC250_COMPRESSION %d\n", fa250[slot].compression);
ADD_TO_STRING;
sprintf(sss,"FADC250_W_OFFSET %d\n", fa250[slot].winOffset*FA_ADC_NS_PER_CLK);
ADD_TO_STRING;
sprintf(sss,"FADC250_W_WIDTH %d\n", fa250[slot].winWidth*FA_ADC_NS_PER_CLK);
ADD_TO_STRING;
sprintf(sss,"FADC250_NSA %d\n", fa250[slot].nsa*FA_ADC_NS_PER_CLK);
ADD_TO_STRING;
sprintf(sss,"FADC250_NSB %d\n", fa250[slot].nsb*FA_ADC_NS_PER_CLK);
ADD_TO_STRING;
sprintf(sss,"FADC250_NPEAK %d\n", fa250[slot].npeak);
ADD_TO_STRING;
sprintf(sss,"FADC250_TRG_MASK %d\n", fa250[slot].trigMask);
ADD_TO_STRING;
sprintf(sss, "FADC250_TRG_WIDTH %d\n", fa250[slot].trigWidth);
ADD_TO_STRING;
sprintf(sss, "FADC250_TRG_MINTOT %d\n", fa250[slot].trigMinTOT);
ADD_TO_STRING;
sprintf(sss, "FADC250_TRG_MINMULT %d\n", fa250[slot].trigMinMult);
ADD_TO_STRING;
adcChanEnabled = 0xFFFF^fa250[slot].chDisMask;
sprintf(sss,"FADC250_ADC_MASK");
ADD_TO_STRING;
for(i=0; i<16; i++)
{
sprintf(sss," %d",(adcChanEnabled>>(15-i))&0x1);
ADD_TO_STRING;
}
sprintf(sss,"\n");
ADD_TO_STRING;
sprintf(sss,"FADC250_TET_IGNORE_MASK");
ADD_TO_STRING;
for(i=0; i<16; i++)
{
sprintf(sss," %d",(fa250[jj].thrIgnoreMask>>(15-i))&0x1);
ADD_TO_STRING;
}
sprintf(sss,"\n");
ADD_TO_STRING;
sprintf(sss,"FADC250_ALLCH_DAC");
ADD_TO_STRING;
for(i=0; i<16; i++)
{
sprintf(sss," %d",fa250[slot].dac[i]);
ADD_TO_STRING;
}
sprintf(sss,"\n");
ADD_TO_STRING;
sprintf(sss,"FADC250_ALLCH_PED");
ADD_TO_STRING;
for(i=0; i<16; i++)
{
sprintf(sss," %7.3f", fa250[slot].ped[i]);
ADD_TO_STRING;
}
sprintf(sss,"\n");
ADD_TO_STRING;
sprintf(sss,"FADC250_ALLCH_TET");
ADD_TO_STRING;
for(i=0; i<16; i++)
{
sprintf(sss," %d",fa250[slot].thr[i]);
ADD_TO_STRING;
}
sprintf(sss,"\n");
ADD_TO_STRING;
sprintf(sss,"FADC250_ALLCH_DELAY");
ADD_TO_STRING;
for(i=0; i<16; i++)
{
sprintf(sss," %d",fa250[slot].delay[i]);
ADD_TO_STRING;
}
sprintf(sss,"\n");
ADD_TO_STRING;
sprintf(sss,"FADC250_ALLCH_GAIN");
ADD_TO_STRING;
for(i=0; i<16; i++)
{
sprintf(sss," %7.3f",fa250[slot].gain[i]);
ADD_TO_STRING;
}
sprintf(sss,"\n");
ADD_TO_STRING;
}
CLOSE_STRING;
}
}
int
main(int argc, char *argv[])
{
GEF_STATUS status;
char *filename;
int inputchar=10;
int ch, ifa=0;
unsigned int cfw=0;
FILE *f;
fa250Ped ped;
printf("\nJLAB fadc pedestal measurement\n");
printf("----------------------------\n");
progName = argv[0];
if(argc != 2)
{
printf(" ERROR: Must specify one arguments\n");
Usage();
exit(-1);
}
else
filename = argv[1];
status = vmeOpenDefaultWindows();
fadcA32Base=0x09000000;
int iFlag = (DIST_ADDR)<<10;
/* Sync Source */
iFlag |= (1<<0); /* P2 */
/* Trigger Source */
iFlag |= (1<<2); // VXS Input Trigger
/* Clock Source */
iFlag |= (0<<5); // Internal Clock Source
iFlag |= (1<<18); // Skip firmware check
/* iFlag |= (1<<16); // Skip initialization */
#ifdef SKIPSS
faInit((unsigned int)(FADC_ADDR),(1<<19),NFADC+2,iFlag);
#else
faInit((unsigned int)(FADC_ADDR),(1<<19),NFADC,iFlag);
#endif
fadc250Config("");
if(nfadc==0)
{
printf(" Unable to initialize any FADCs.\n");
goto CLOSE;
}
f = fopen(filename, "wt");
#ifdef NEWFORMAT
for(ifa=0; ifa<nfadc; ifa++)
{
if(f) fprintf(f, "FADC250_SLOT %d\nFADC250_ALLCH_PED", faSlot(ifa));
for(ch=0; ch<16; ch++)
{
if(faMeasureChannelPedestal(faSlot(ifa), ch, &ped) != OK)
{
printf(" Unabled to measure pedestal on slot %d, ch %d...\n", faSlot(ifa), ch);
fclose(f);
goto CLOSE;
}
if(f) fprintf(f, " %8.3f", ped.avg);
}
if(f) fprintf(f, "\n");
}
#else
for(ifa=0; ifa<nfadc; ifa++)
{
for(ch=0; ch<16; ch++)
{
if(faMeasureChannelPedestal(faSlot(ifa), ch, &ped) != OK)
{
printf(" Unabled to measure pedestal on slot %d, ch %d...\n", faSlot(ifa), ch);
fclose(f);
goto CLOSE;
}
if(f) fprintf(f, "%3d %3d %8.3f %8.3f\n", faSlot(ifa),ch,ped.avg,ped.rms);
}
}
#endif
if(f)
fclose(f);
else
printf(" Unable to open pedestal file %s\n", filename);
CLOSE:
status = vmeCloseDefaultWindows();
if (status != GEF_SUCCESS)
{
printf("vmeCloseDefaultWindows failed: code 0x%08x\n",status);
return -1;
}
exit(0);
}
int
main(int argc, char *argv[])
{
GEF_STATUS status;
int fpga_choice, firmware_choice=0;
char *mcs_filename;
int inputchar=10;
int ifa=0;
unsigned int cfw=0;
printf("\nJLAB fadc firmware update\n");
printf("----------------------------\n");
progName = argv[0];
if(argc<3)
{
printf(" ERROR: Must specify two arguments\n");
Usage();
exit(-1);
}
else
{
fpga_choice = atoi(argv[1]);
mcs_filename = argv[2];
}
if( (fpga_choice != 1) &&
(fpga_choice != 2) )
{
printf(" ERROR: Invalid FPGA choice (%d)\n",fpga_choice);
Usage();
exit(-1);
}
if(fadcFirmwareReadMcsFile(mcs_filename) != OK)
{
exit(-1);
}
status = vmeOpenDefaultWindows();
fadcA32Base=0x09000000;
int iFlag = (DIST_ADDR)<<10;
/* Sync Source */
iFlag |= (1<<0); /* P2 */
/* Trigger Source */
iFlag |= (1<<2); // VXS Input Trigger
/* Clock Source */
iFlag |= (0<<5); // Internal Clock Source
iFlag |= (1<<18); // Skip firmware check
/* iFlag |= (1<<16); // Skip initialization */
#ifdef SKIPSS
faInit((unsigned int)(FADC_ADDR),(1<<19),NFADC+2,iFlag);
#else
faInit((unsigned int)(FADC_ADDR),(1<<19),NFADC,iFlag);
#endif
if(nfadc==0)
{
printf(" Unable to initialize any FADCs.\n");
goto CLOSE;
}
for(ifa=0; ifa<nfadc; ifa++)
{
cfw = faGetFirmwareVersions(faSlot(ifa),0);
printf("%2d: Control Firmware Version: 0x%04x Proc Firmware Version: 0x%04x\n",
faSlot(ifa),cfw&0xFFFF,(cfw>>16)&0xFFFF);
}
printf(" Will update firmware for ");
if(fpga_choice==1)
{
firmware_choice = FADC_FIRMWARE_FX70T;
printf("FX70T (Control FPGA) ");
}
else if(fpga_choice==2)
{
firmware_choice = FADC_FIRMWARE_LX110;
printf("LX110 (Processing FPGA) ");
}
printf(" with file: \n %s\n",mcs_filename);
printf(" <ENTER> to continue... or q and <ENTER> to quit without update\n");
inputchar = getchar();
if((inputchar == 113) ||
(inputchar == 81))
{
printf(" Exiting without update\n");
goto CLOSE;
}
fadcFirmwareGLoad(firmware_choice,0);
goto CLOSE;
CLOSE:
status = vmeCloseDefaultWindows();
if (status != GEF_SUCCESS)
{
printf("vmeCloseDefaultWindows failed: code 0x%08x\n",status);
return -1;
}
exit(0);
}
