int
cgeightmatch(struct device *parent, void *vcf, void *aux)
{
struct cfdata *cf = vcf;
struct confargs *ca = aux;
struct romaux *ra = &ca->ca_ra;
if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
return (0);
if (!CPU_ISSUN4 || ca->ca_bustype != BUS_OBIO)
return (0);
/*
* Make sure there's hardware there.
*/
if (probeget(ra->ra_vaddr, 4) == -1)
return (0);
/*
* Check the pfour register.
*/
if (fb_pfour_id(ra->ra_vaddr) == PFOUR_ID_COLOR24)
return (1);
return (0);
}
int
bwtwomatch(struct device *parent, void *vcf, void *aux)
{
struct cfdata *cf = vcf;
struct confargs *ca = aux;
struct romaux *ra = &ca->ca_ra;
if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
return (0);
#if 0
if (CPU_ISSUN4 && cf->cf_unit != 0)
return (0);
#endif
if (ca->ca_bustype == BUS_SBUS)
return (1);
/*
* Make sure there's hardware there.
*/
if (probeget(ra->ra_vaddr, 4) == -1)
return (0);
switch (ca->ca_bustype) {
case BUS_VME16:
case BUS_VME32:
return (1);
case BUS_OBIO:
#if defined(SUN4)
if (CPU_ISSUN4) {
/*
* Check for a pfour framebuffer, but do not match the
* overlay planes for color pfour framebuffers.
*/
switch (fb_pfour_id(ra->ra_vaddr)) {
case PFOUR_ID_BW:
case PFOUR_NOTPFOUR:
return (1);
case PFOUR_ID_COLOR8P1: /* bwtwo in ... */
case PFOUR_ID_COLOR24: /* ...overlay plane */
default:
return (0);
}
}
#endif
return (1);
default:
return (0);
}
}
int
bwtwo_pfour_probe(void *vaddr, void *arg)
{
cfdata_t cf = arg;
switch (fb_pfour_id(vaddr)) {
case PFOUR_ID_BW:
case PFOUR_ID_COLOR8P1: /* bwtwo in ... */
case PFOUR_ID_COLOR24: /* ...overlay plane */
/* This is wrong; should be done in bwtwo_attach() */
cf->cf_flags |= FB_PFOUR;
/* FALLTHROUGH */
case PFOUR_NOTPFOUR:
return (1);
}
return (0);
}
/*
* Attach a display. We need to notice if it is the console, too.
*/
static void
bw2attach(device_t parent, device_t self, void *args)
{
struct bw2_softc *sc = device_private(self);
struct fbdevice *fb = &sc->sc_fb;
struct confargs *ca = args;
struct fbtype *fbt;
void *p4reg;
int p4id, tmp;
int pixeloffset; /* offset to framebuffer */
sc->sc_dev = self;
fbt = &fb->fb_fbtype;
fbt->fb_type = FBTYPE_SUN2BW;
fbt->fb_width = 1152; /* default - see below */
fbt->fb_height = 900; /* default - see below */
fbt->fb_depth = 1;
fbt->fb_cmsize = 0;
fbt->fb_size = BW2_FBSIZE; /* default - see below */
fb->fb_driver = &bw2fbdriver;
fb->fb_private = sc;
fb->fb_name = device_xname(self);
fb->fb_flags = device_cfdata(self)->cf_flags;
/* Set up default pixel offset. May be changed below. */
pixeloffset = 0;
/* Does it have a P4 register? */
p4reg = bus_mapin(ca->ca_bustype, ca->ca_paddr, 4);
p4id = fb_pfour_id(p4reg);
if (p4id != P4_NOTFOUND)
fb->fb_pfour = p4reg;
else
bus_mapout(p4reg, 4);
switch (p4id) {
case P4_NOTFOUND:
pixeloffset = 0;
break;
case P4_ID_BW:
pixeloffset = P4_BW_OFF;
break;
default:
aprint_error("%s: bad p4id=0x%x\n", fb->fb_name, p4id);
/* Must be some kinda color... */
/* FALLTHROUGH */
case P4_ID_COLOR8P1:
case P4_ID_COLOR24:
sc->sc_ovtype = p4id;
pixeloffset = P4_COLOR_OFF_OVERLAY;
break;
}
sc->sc_phys = ca->ca_paddr + pixeloffset;
/*
* Determine width and height as follows:
* If it has a P4 register, use that;
* else if unit==0, use the EEPROM size,
* else make our best guess.
*/
if (fb->fb_pfour)
fb_pfour_setsize(fb);
/* XXX device_unit() abuse */
else if (device_unit(self) == 0)
fb_eeprom_setsize(fb);
else {
/* Guess based on machine ID. */
switch (cpu_machine_id) {
#ifdef _SUN3_
case ID_SUN3_60:
/*
* Only the model 60 can have hi-res.
* Look at the "resolution" jumper.
*/
tmp = bus_peek(BUS_OBMEM, BW2_CR_PADDR, 1);
if ((tmp != -1) && (tmp & 0x80) == 0)
goto high_res;
break;
case ID_SUN3_260:
/* The Sun3/260 is ALWAYS high-resolution! */
/* fall through */
high_res:
fbt->fb_width = 1600;
fbt->fb_height = 1280;
fbt->fb_size = BW2_FBSIZE_HIRES;
break;
#endif /* SUN3 */
default:
/* Leave the defaults set above. */
break;
}
}
aprint_normal(" (%dx%d)\n", fbt->fb_width, fbt->fb_height);
/* Make sure video is on. */
tmp = 1;
bw2svideo(fb, &tmp);
/* Let /dev/fb know we are here. */
fb_attach(fb, 1);
}
static int
bw2match(device_t parent, cfdata_t cf, void *args)
{
struct confargs *ca = args;
int mid, p4id, peekval;
void *p4reg;
/* No default address support. */
if (ca->ca_paddr == -1)
return 0;
/*
* Slight hack here: The low four bits of the
* config flags, if set, restrict the match to
* that machine "implementation" only.
*/
mid = cf->cf_flags & IDM_IMPL_MASK;
if (mid != 0 && (mid != (cpu_machine_id & IDM_IMPL_MASK)))
return 0;
/*
* Make sure something is there, and if so,
* see if it looks like a P4 register.
*/
p4reg = bus_tmapin(ca->ca_bustype, ca->ca_paddr);
peekval = peek_long(p4reg);
p4id = (peekval == -1) ? P4_NOTFOUND : fb_pfour_id(p4reg);
bus_tmapout(p4reg);
if (peekval == -1)
return 0;
/*
* The config flag 0x40 if set means we should match
* only on a CG? overlay plane. We can use only the
* CG4 and CG8, which both have a P4 register.
*/
if (cf->cf_flags & 0x40) {
switch (p4id) {
case P4_ID_COLOR8P1:
case P4_ID_COLOR24:
return 1;
case P4_NOTFOUND:
default:
return 0;
}
}
/*
* OK, we are expecting a plain old BW2, and
* there may or may not be a P4 register.
*/
switch (p4id) {
case P4_ID_BW:
case P4_NOTFOUND:
return 1;
default:
#ifdef DEBUG
aprint_debug("bwtwo at 0x%lx match p4id=0x%x fails\n",
ca->ca_paddr, p4id & 0xFF);
#endif
break;
}
return 0;
}
static int
cg8_pfour_probe(void *vaddr, void *arg)
{
return (fb_pfour_id(vaddr) == PFOUR_ID_COLOR24);
}
static int
cg6_pfour_probe(void *vaddr, void *arg)
{
return (fb_pfour_id(vaddr) == PFOUR_ID_FASTCOLOR);
}
/*
* Attach a display.
*/
static void
cgsixattach(device_t parent, device_t self, void *aux)
{
struct cgsix_softc *sc = device_private(self);
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba;
struct eeprom *eep = (struct eeprom *)eeprom_va;
struct fbdevice *fb = &sc->sc_fb;
bus_space_handle_t bh;
int constype, isconsole;
const char *name;
sc->sc_dev = self;
oba = &uoba->uoba_oba4;
/* Remember cookies for cgsix_mmap() */
sc->sc_bustag = oba->oba_bustag;
sc->sc_paddr = (bus_addr_t)oba->oba_paddr;
fb->fb_device = sc->sc_dev;
fb->fb_type.fb_type = FBTYPE_SUNFAST_COLOR;
fb->fb_flags = device_cfdata(sc->sc_dev)->cf_flags & FB_USERMASK;
fb->fb_type.fb_depth = 8;
fb_setsize_eeprom(fb, fb->fb_type.fb_depth, 1152, 900);
sc->sc_ramsize = 1024 * 1024; /* All our cgsix's are 1MB */
/*
* Dunno what the PROM has mapped, though obviously it must have
* the video RAM mapped. Just map what we care about for ourselves
* (the FHC, THC, and Brooktree registers).
*/
if (bus_space_map(oba->oba_bustag,
oba->oba_paddr + CGSIX_BT_OFFSET,
sizeof(*sc->sc_bt),
BUS_SPACE_MAP_LINEAR,
&bh) != 0) {
printf("%s: cannot map brooktree registers\n", device_xname(self));
return;
}
sc->sc_bt = (struct bt_regs *)bh;
if (bus_space_map(oba->oba_bustag,
oba->oba_paddr + CGSIX_FHC_OFFSET,
sizeof(*sc->sc_fhc),
BUS_SPACE_MAP_LINEAR,
&bh) != 0) {
printf("%s: cannot map FHC registers\n", device_xname(self));
return;
}
sc->sc_fhc = (int *)bh;
if (bus_space_map(oba->oba_bustag,
oba->oba_paddr + CGSIX_THC_OFFSET,
sizeof(*sc->sc_thc),
BUS_SPACE_MAP_LINEAR,
&bh) != 0) {
printf("%s: cannot map THC registers\n", device_xname(self));
return;
}
sc->sc_thc = (struct cg6_thc *)bh;
if (bus_space_map(oba->oba_bustag,
oba->oba_paddr + CGSIX_TEC_OFFSET,
sizeof(*sc->sc_tec),
BUS_SPACE_MAP_LINEAR,
&bh) != 0) {
printf("%s: cannot map TEC registers\n", device_xname(self));
return;
}
sc->sc_tec = (struct cg6_tec_xxx *)bh;
if (bus_space_map(oba->oba_bustag,
oba->oba_paddr + CGSIX_FBC_OFFSET,
sizeof(*sc->sc_fbc),
BUS_SPACE_MAP_LINEAR,
&bh) != 0) {
printf("%s: cannot map FBC registers\n", device_xname(self));
return;
}
sc->sc_fbc = (struct cg6_fbc *)bh;
if (fb_pfour_id(sc->sc_fhc) == PFOUR_ID_FASTCOLOR) {
fb->fb_flags |= FB_PFOUR;
name = "cgsix/p4";
} else
name = "cgsix";
constype = (fb->fb_flags & FB_PFOUR) ? EE_CONS_P4OPT : EE_CONS_COLOR;
/*
* Check to see if this is the console if there's no eeprom info
* to be found, or if it's the correct framebuffer type.
*/
if (eep == NULL || eep->eeConsole == constype)
isconsole = fb_is_console(0);
else
isconsole = 0;
if (bus_space_map(oba->oba_bustag,
oba->oba_paddr + CGSIX_RAM_OFFSET,
sc->sc_ramsize,
BUS_SPACE_MAP_LINEAR,
&bh) != 0) {
printf("%s: cannot map pixels\n", device_xname(self));
return;
}
sc->sc_fb.fb_pixels = (void *)bh;
cg6attach(sc, name, isconsole);
}
void
bwtwoattach(struct device *parent, struct device *self, void *args)
{
struct bwtwo_softc *sc = (struct bwtwo_softc *)self;
struct confargs *ca = args;
int node = ca->ca_ra.ra_node;
int isconsole = 0;
int sbus = 1;
char *nam;
printf(": ");
/*
* Map the control register.
*/
#if defined(SUN4)
if (CPU_ISSUN4 && ca->ca_bustype == BUS_OBIO &&
fb_pfour_id(ca->ca_ra.ra_vaddr) != PFOUR_NOTPFOUR) {
SET(sc->sc_sunfb.sf_flags, FB_PFOUR);
sc->sc_sunfb.sf_pfour = (volatile u_int32_t *)
mapiodev(ca->ca_ra.ra_reg, 0, sizeof(u_int32_t));
} else
#endif
{
sc->sc_reg = (volatile struct fbcontrol *)
mapiodev(ca->ca_ra.ra_reg, BWREG_REG,
sizeof(struct fbcontrol));
}
/* Set up default pixel offset. May be changed below. */
sc->sc_pixeloffset = BWREG_MEM;
switch (ca->ca_bustype) {
case BUS_OBIO:
if (CPU_ISSUN4M) /* 4m has framebuffer on obio */
goto obp_name;
sbus = node = 0;
#if defined(SUN4)
if (ISSET(sc->sc_sunfb.sf_flags, FB_PFOUR)) {
nam = "p4";
sc->sc_pixeloffset = PFOUR_BW_OFF;
} else
#endif
nam = NULL;
break;
case BUS_VME32:
case BUS_VME16:
sbus = node = 0;
nam = NULL;
break;
case BUS_SBUS:
obp_name:
#if defined(SUN4C) || defined(SUN4M)
nam = getpropstring(node, "model");
#endif
break;
}
if (nam != NULL && *nam != '\0')
printf("%s, ", nam);
#if defined(SUN4)
if (CPU_ISSUN4) {
struct eeprom *eep = (struct eeprom *)eeprom_va;
int constype = ISSET(sc->sc_sunfb.sf_flags, FB_PFOUR) ?
EE_CONS_P4OPT : EE_CONS_BW;
/*
* Assume this is the console if there's no eeprom info
* to be found.
*/
if (eep == NULL || eep->eeConsole == constype)
isconsole = 1;
else
/*
* On sun4 systems without on-board framebuffers (such as
* the 4/3xx models), the PROM will accept the EE_CONS_BW
* setting although the framebuffer is a P4.
* Accept this setting as well.
*/
if (eep->eeConsole == EE_CONS_BW)
isconsole = 1;
}
#endif
if (CPU_ISSUN4COR4M)
isconsole = node == fbnode;
sc->sc_phys = ca->ca_ra.ra_reg[0];
sc->sc_bustype = ca->ca_bustype;
/* enable video */
bwtwo_burner(sc, 1, 0);
fb_setsize(&sc->sc_sunfb, 1, 1152, 900, node, ca->ca_bustype);
printf("%dx%d\n", sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height);
sc->sc_sunfb.sf_ro.ri_bits = mapiodev(ca->ca_ra.ra_reg,
sc->sc_pixeloffset, round_page(sc->sc_sunfb.sf_fbsize));
sc->sc_sunfb.sf_ro.ri_hw = sc;
fbwscons_init(&sc->sc_sunfb, isconsole ? 0 : RI_CLEAR);
if (isconsole) {
fbwscons_console_init(&sc->sc_sunfb, -1);
}
fbwscons_attach(&sc->sc_sunfb, &bwtwo_accessops, isconsole);
}
